NCV78514 ONSEMI | Alldatasheet
Document overview
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Technical content
Features
Support for MCU Less Application Integrated Derating Mechanisms Fixed Switching Frequency at 400 kHz Input Operating Range from 5 V – 21 V Warm Start Management below 9 V Withstands Load Dump up to 45 V Output V oltage Range up to 60 V External Programmable Current 200 mA − 1500 mA Pulse Width Modulation from 80 Hz to 600 Hz LED Current Dimming Frequency 400 Hz External NTC / PTC for LED−temperature Spread Spectrum Status and Error Mode Handling AEC−Q100 Qualified and PPAP Capable Figure 1. Typical Application Circuit
ORDERING INFORMATION
NCV78514PA0R2G TSSOP16 −EP (Pb−Free) 4000 / Tape & Reel MARKING DIAGRAM L514001= Specific Device Code A = Assembly Location L = Wafer Lot YW = Year & Work Week /C0071 = Pb−Free Indicator Microdot TSSOP16−EP CASE 948BV 16 9 L514 001 ALYW/C0071 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Typical Application Fog Lamp Cornering Light Logo Projection Logo Lighting
Figure 2. Block Diagram
Figure 3. Pin Out (Top View) Table 1. PIN FUNCTION DESCRIPTION Pi filter. Pin 1 and pin 2 must be connected together. 3 DIM Enable/disable function, including LED current dimming function and error status function. 4 AGND Must be connected directly to the analog ground plane. 5 VDD 3V3 low dropout output pin. A capacitor must be connected between this pin and ground. Must not be used for external load. and ground. Must not be used for external load. 8 LSSG Gate drive of the boost, low side NMOS.
9 SNSN Voltage feedback of the current sense, LED side
10 ISET LED current−encoding resistor connection (RSET connection or VSET voltage).
11 SNSP Voltage feedback of the current sense, H−Bridge side
12 TCS Temperature coefficient sensor connection. Compatible with both NTC and PTC sensors. 15, 16 SW Switching node for the inductor connection. Pin 15 and pin 16 must be connected together.
Pin voltages listed below are referenced to ground plane. Table 2. MAXIMUM RATINGS should not be assumed, damage may occur and reliability may be affected.
- The maximum functional operating temperature range can be limited by the IC thermal shutdown: P_TJ_OFF.
missions profile(s) in the application. Table 3. RECOMMENDED OPERATING CONDITIONS the Recommended Operating Ranges limits may affect device reliability.
- The parametric characteristics of the circuit are not guaranteed outside the parametric operating junction temperature range.
- A mission profile describes the application specific conditions such as, but not limited to, the cumulative operating conditions over life time,
device is operated by the customer, etc. No more than 100 cumulated hours in life time above P_TJ.
www.onsemi.com Table 4. THERMAL INFORMATION (Note 4)
- Includes also typical solder thickness under the Exposed Pad (EP).
ELECTRICAL CHARACTERISTICS
In the electrical table of this section, the Min and Max Limits apply for ambient temperature from −40C to 125C and junction temperature from −40C to +150 C and for VBAT from 5 V to 21 V unless otherwise specified. Typical values are referenced to TJ = + 25C, VBAT = 14.0 V . Table 5. BAT ELECTRICAL CHARACTERISTIC TABLE Table 6. POWER TREE TABLE
- Loaded up to the minimum clamp value
Table 7. DC−DC CONVERTER TABLE
Table 7. DC−DC CONVERTER TABLE (continued) Table 8. DIM TABLE
Table 8. DIM TABLE (continued)
- An input duty cycle on DIM pin over 98 % is considered as a 100 % output duty cycle.
- P_DIM_DC_ACC represents the digital reconstruction of the DIM input duty cycle. The ILED average and P_FULL_STARTUP depend on
- A 4.5 V overdrive on DIM slope must be respected to not create additional delay on the PWM reconstruction.
Table 9. RSET PARAMETRIC TABLE Table 10. LED CURRENT CONTROL WITH LOW VBAT TABLE
Table 11. IC THERMAL THRESHOLDS TABLE P_TJ_OFF Protection for the maximum Junction Temperature. DC to DC is turned off over this value. Table 12. THERMAL COEFFICIENT SENSOR PIN TABLES Table 13. SNSP AND SNSN THRESHOLDS TABLE P_SNSPN_SHORT Differential voltage of the VLED N and P pins. The comparator is debounced. performance may not be indicated by the Electrical Characteristics if operated under different conditions.
www.onsemi.com DETAILED OPERATING DESCRIPTION BAT ELECTRICAL DESCRIPTION For a proper operation and a safe start −up sequence, an under−voltage comparator senses the BAT pin. Its own wide hysteresis protects against slow battery rising and falling behavior. An overvoltage comparator turns off the DC −to−DC controller in case of a too high or inappropriate battery voltage is applied. The IC starts again when the input voltage retrieves to normal level, below the OVLO_operating minus hysteresis. POWER TREE The single channel LED driver is supplied from the BAT pin. BAT can be supplied from the car battery, for instance by a SmartFET. Two local supplies are generated from BAT: VDD and VDRV . VDD supplies most of the internal circuitry and is decoupled with the CVDD capacitor. VDRV supplies the driver of the external low side Boost switch and is decoupled with the CVDRV capacitor. No external components or system (except the respective decoupling capacitors and potential TCS pull −up resistor) are allowed to be connected to VDD and VDRV pins. DC−DC BUCK – BOOST CONVERTER OPERATION The NCV78514 is powered from an automotive battery and operates with a fixed switching frequency SWITCH_FREQ, DIM mode (duty cycle modulation). It is designed to supply a constant current between ILED_MAX and ILED_MIN into a single LED string, programmed by a pull −down resistor connected on ISET pin. The synchronous Buck integrates the high side and the low side switch. Whereas the asynchronous boost utilizes an external low side N−MOSFET and a Schottky diode. The constant LED current is achieved by sensing peak current through integrated high side switch. The sensed peak current is compared to voltage over the RSENSE resistor, which is in series with LED string. The output voltage varies with number of LEDs in series and programmed output current. When the input voltage is well above the differential output voltage between LED+ and LED − (V oltage across the LEDs), the DC−DC converter is in buck mode (BAT > VLED). Consequently, the LSSG pin used to drive the low side switch in boost mode, is then deactivated (retained to GND). Upon the buck operation, integrated high side and low side switches, transfer the energy from the input to the inductor. Their resistances are represented by the P_HSS_RON and P_LSS_RON parameters. The high side switch is driven from bootstrap capacitor Cboot (HSS gate voltage = BAT + VDD − Vf). During the ton time, HSS is turned on, and LSS is made non−conductive. The peak current is tracked during this phase. The conductivity of integrated switches is inverted during the toff phase. Behaving like a synchronous buck converter until the maximum duty cycle is reached (DC_Buck_Max). In case of the BAT is close to the output voltage, the IC enters in the 4−phases cycle, called the Buck−Boost mode. The LSSG is then re −activated and the 3 switches (both integrated switches and external N −MOSFET) will be alternatively controlled, where the sequence depends on BA T voltage in reference to VLED. During boost phase, LSS is open and HSS is closed. Allowing to continuously track the Inductor IPEAK current. The ton boost phase (inductor current increasing phase) is when external N−MOSFET is on, and no current crosses the schottky diode (VLED > schottky anode voltage). The external N −MOSFET is made non −conductive during the inductor discharge phase (toff). The inductor is protected by an IPEAK protection. The current is measured internally, through the high side switch. The IPEAK is set at P_IPEAK. The maximum output power will be limited in case of IPEAK event. The output power limitation due to IPEAK protection mainly occurs in Boost mode and in case of Battery cranking. In case of IPEAK event, no error is reported to DIM pin. SPREAD SPECTRUM FREQUENCY MODULATION Spread spectrum is a technique using frequency modulation to achieve lower peak electromagnetic interference (EMI). It is an elegant and complementary solution with filtering and shielding techniques to improve EMC performance. In order to “spread” the peak to broader band, the internal oscillator frequency is modulated, decreasing the peak amplitude at the center frequency and at the frequency’s harmonics. This results in lower system EMI compared to the typical narrow band signal produced by oscillators and most clock generators. The adopted spread spectrum technic results in double peak triangle modulation, on FSSMB frequency range, and FSSMB frequency modulation. DIM PIN − DIMMING DESCRIPTION The average current through the LEDs can be reduced in a dimming fashion, with an external signal applied on DIM pin. The input signal frequency at DIM can be freely chosen in the DIM_FREQ frequency range while the output frequency is constant at FREQ_OUT. The input signal is validated by the device before actual dimming is applied on LED string (two periods). An input frequency outside the DIM_FREQ_IN range is considered as no DIM available (or disappearance) thus the LED string is maintained off (or switched off).
Figure 6. Dimming Modes Functional Flow Diagram is done to achieve a good stability of the Buck − Boost. (DIM_DC_ACC) or overall stability. turned off only after a delay of DIM_MISS. resistor series choice and tolerance of them. P_UVLO_STARTING, rising edge. considered as an out of range, and LED current is turned off. A new power on reset sequence is then required.
and a maximum derating is applied on the LED current. creates larger change of output current than NTC. resistor divider, to set TCS pin voltage to half of VLDO. current derating (whichever results in lower LED current). so, the profile is expressed below. Figure 11. Current Derating TCS Voltage
through the DIM pin by changing current consumption. The different errors types are described below. is reported to DIM pin in this case. string, through the SNSP and SNSN sense pins. voltage drops below P_VOUT_L. brightness is recovered as soon as the error disappear. The second situation occurs, when LED string opens. A LED string error is reported via DIM pin. start up timer is elapsed or if the LEDs are already ON. automatically rearms until the RSET recovers a valid value. SNSP and SNSN pins are used for the regulation loop. error and the LED current is stopped. Figure 12. DIM Pin, Diagnostic Current Sink The P_DIM_IQ is de−activated on UVLO, falling edge. The different errors are described in the below table.
Table 14. ILED DERATING SUMMARY TABLE Table 15. PROTECTIONS AND ERROR MANAGEMENT SUMMARY TABLE Table 16. TIMING TABLE SUMMARY VLED L Debounce 5 ms after bob_running. Debounce 8 /C0109s in running mode. SNSP&N opened Debounce 150 /C0109s in running mode. SNSP&N shorted Blanking 8 ms after bob_running. Debounce 150 /C0109s in running mode.
Figure 13. Functional State Machine be of importance for the IC design. (somehow) during the concept phase. without the help of external components. targets are agreed during the concept phase. with conductive 150 Ohm method – ref. account for the IC design by onsemi.
www.onsemi.com Application level EMC performance will depend on the use of the IC (ASIC) component in an application environment: The influence of the application environment is typically caused by or related to (but not limited to) the board design, values and tolerances of external components, presence of external non−linear elements, size, housing, wire harness and the variations of all these over different applications. For example, EMC signals disturbing directly within the signal band of normal operation cannot be distinguished by the IC from normal operating signals. Therefore, onsemi cannot take responsibility on application level EMC testing, application EMC performances or application solutions for EMC. onsemi is willing to cooperate with the customer to find root causes for application level EMC issues, if the necessary information is provided to document that a potential root −cause for application level EMC issues may be in the ASIC. A potential correction in the ASIC itself for an application level EMC issue (if feasible) will need to follow an agreed change procedure. Remark: please refer to the application schematic for recommended components.
Figure 14. Application Board Schematic
Table 17. BILL OF MATERIAL
TSSOP16, 4.4x5 EXPOSED PAD CASE 948BV ISSUE O DATE 22 JUN 2017 TOP VIEW BOTTOM VIEWEND VIEW SIDE VIEW LAND PATTERN Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153 variations ABT. SYMBOL MIN NOM MAX θ A b c D E e 0º 8º L 0.05 0.85 0.19 0.13 0.45 4.90 6.30 4.30
0.65 BSC
1.00 REF
1.10 0.15 0.95 0.30 0.20 0.75 5.10 6.50 4.50 N P R S 0.90 6.50 4.60 0.37 1.00 6.70 4.80 0.47 X Y
3.33 REF
2.76 REF
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