674R-01ILF

ICS674-01 IDT | Alldatasheet

Document overview

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• PDF pages: 8

Technical content

Features

• Packaged in 28-pin SSOP (150 mil body)
• Pb (lead) free package, RoHS compliant
• General purpose programmable divider
• Supports ICS673 PLL Building Block
• User determines the divide by setting input pins
• Pull-ups on all select inputs
• Includes one 7-bit Divider for OUTA
• Includes one 9-bit Divider and one selectable Post Divider for OUTB
• Industrial temperature range available
• 25 mA drive capability at TTL levels
• Advanced, low power CMOS process
• Operating voltage of 3.3 V or 5 V Block Diagram OUTB VDD INA OUTADivider A (7-Bit) Divider B (9-Bit)INB Post Divider A6:A0 B8:B0

9 GND

S2:S0

USER CONFIGURABLE DIVIDER CLOCK DIVIDER IDT™ / ICS™ USER CONFIGURABLE DIVIDER 2 ICS674-01 REV H 051310 Pin Assignment Post Divider Table Pin Descriptions INA INB GND OUTB GND GND B2 B7 B3 B6 OUTA VDD VDD S1 A1 A6 A3 28 pin (150 mil) SSOP Pin 5 Pin 4 Pin 3 Post Divide 000 1 0 001 2 010 8 011 4 100 5 101 7 110 1 111 6 Pin Number Pin Name Pin Type Pin Description 1, 2, 24 - 28 A5, A6, A0-A4 Input Divider A word input pins. Forms a number from 1 to 127. Internal pull-up resistors. See page 3 for details. 3 - 5 S0, S1, S2 Input Select pins for Post Divider. See table above. Internal pull-up resistors. 6, 23 VDD Power Connect to VDD. 7 INA Input Divider A input. 8 INB Input Divider B input. 9, 19 - 20 GND Power Connect to ground. 10 - 18 B0 - B8 Input Divider B word input pins. Forms a number from 4 to 511. Internal pull-up resistors. See page 3 for details. 21 OUTB Output Divider B output. 22 OUTA Output Divider A output.

USER CONFIGURABLE DIVIDER CLOCK DIVIDER IDT™ / ICS™ USER CONFIGURABLE DIVIDER 3 ICS674-01 REV H 051310 External Components The ICS674-01 requires a minimum number of external components for proper operation. A 0.01µF decoupling capacitor should be connected between each VDD and GND as close to the device as possible. A series termination resistor of 33Ω should be used in series with OUTA and OUTB pins. Determining (setting) the Divider The user has full control in setting the desired divide. The user should connect the appropriate divider select input pins directly to ground (or VDD, although this is not required because of internal pull-ups) during Printed Circuit Board layout, ensuring that the ICS674-01 will automatically produce the correct divide when all components are soldered. It is also possible to connect the inputs to parallel I/O ports in order to change divides. The divides of the ICS674-01 can be determined by the following equations: Divide A = DAW + 2 Where Divider A Word (DAW) = 1 to 127 (0 is not permitted) Divide B = (DBW+8) x PD Where Divider B Word (DBW) = 4 to 511 (0, 1, 2, 3 are not permitted) Post Divider (PD) = values on page 2 For example, suppose Divide A is desired to be 61 and Divide B is desired to be 284, then DAW = 59, DBW = 276, and PD = 1. This means A6:A0 is 0111011, B8:B0 is 100010100 and S2:S0 is 110. Since all inputs have pull-ups, it is only necessary to ground the zero pins, namely A6, A2, B7, B6, B5, B1, B0, and S0. These configuration pins can be changed at any time during operation.

USER CONFIGURABLE DIVIDER CLOCK DIVIDER IDT™ / ICS™ USER CONFIGURABLE DIVIDER 4 ICS674-01 REV H 051310 Using the ICS674-01 with the ICS673-01: The ICS674-01 may be used with the ICS673-01 to build a frequency synthesizer. The following example shows a typical application when the reference clock is in the MHz range: If the reference is in the kHz range, for example 8 kHz, the following configuration may be more typical: Note that in both examples, Divide B is connected to the output of the ICS673. This is because Divide B has a higher operating frequency than Divide A. Reference Clock Ouput ClockDivide A Post Divide ICS674-01 Divide B ICS673-01 REFIN FBIN CLK1 CLK2 Reference Clock Ouput Clock Post Divide ICS674-01 Divide B ICS673-01 REFIN FBIN CLK1 CLK2 Divide A

USER CONFIGURABLE DIVIDER CLOCK DIVIDER IDT™ / ICS™ USER CONFIGURABLE DIVIDER 5 ICS674-01 REV H 051310 Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS674-01. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Recommended Operation Conditions VDD=5 V ±10%, Ambient temperature -40 to +85° C, unless stated otherwise Item Rating Supply Voltage, VDD 7 V All Inputs and Outputs -0.5 V to VDD+0.5 V CLKIN and FBIN inputs -0.5 V to 5.5 V Electrostatic Discharge 2000 V Ambient Operating Temperature 0 to +70 ° C Ambient Operating Temperature (I version) -40 to +85 ° C Storage Temperature -65 to +150° C Junction Temperature 150° C Soldering Temperature 260° C Parameter Min. Typ. Max. Units Ambient Operating Temperature 0 +70 ° C Power Supply Voltage (measured in respect to GND) +3.0 +5.5 V Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD 3.0 5.5 V Input High Voltage V IH All A, B, and S pins 2 V Input Low Voltage V IL All A, B, and S pins 0.8 V Input High Voltage V IH INA and INB only (VDD/2)+1 VDD/2 V Input Low Voltage V IL INA and INB only VDD/2 (VDD/2)-1 V Output High Voltage V OH IOH = -25 mA 2.4 V Output Low Voltage V OL IOL = 25 mA 0.4 V Operating Supply Current DivA=DivB=20 IDD No load, fin=100 MHz 3.3 V 3m A No load, fin=100 MHz 5 V 5m A

USER CONFIGURABLE DIVIDER CLOCK DIVIDER IDT™ / ICS™ USER CONFIGURABLE DIVIDER 6 ICS674-01 REV H 051310 VDD = 5 V, Ambient Temperature -40 to +85° C, CLOAD at CLK = 15 pF, unless stated otherwise 1 The duty cycle of OUTA is dependent on the selected divide. This because OUTA goes low for 1 input clock cycles on INA. For example, if a divide of 20 is selected, the duty cycle will be 90%. Simlarly, if PD=1 is selected for OUTB, the duty cycle will be dependent on the selected divide. In this case, OUTB goes high for approximately 8 input clock cycles on INB. Short Circuit Current I OS Each output ±70 mA On-Chip Pull-up Resistor R PU A, B, S select pins 270 k Ω Input Capacitance C IN A, B, S select pins 5 pF Parameter Symbol Conditions Min. Typ. Max. Units Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency, Divider A f IN 3.3 V 0 135 MHz Input Frequency, Divider B 3.3 V 0 180 MHz Input Frequency, Divider A 5 V 0 200 MHz Input Frequency, Divider B 5 V 0 235 MHz Input Frequency, Divider A (Industrial temperature) fIN at 3.3 V, +85° C0 1 25 MHz Input Frequency, Divider B (Industrial temperature) at 3.3 V, +85° C0 1 70 MHz Input Frequency, Divider A (Industrial temperature) at 5 V, +85° C0 190 MHz Input Frequency, Divider B (Industrial temperature) at 5 V, +85° C0 220 MHz Output Rise Time t OR 20% to 80% 1.5 ns Output Fall Time t OF 80% to 20% 1.5 ns OUTB Clock Duty Cycle1 tDC at VDD/2 45 49 to 51 55 % OUTB Clock Duty Cycle odd post dividers at VDD/2, except PD=1 40 60 % OUTA Clock Duty Cycle1 at VDD/2 20 98.5 % Peak-to-Peak Jitter 15 pF 400 ps Cycle-to-Cycle Jitter 30 pF loads 300 ps Propagation Delay, Divider A TPA VDD = 3.3 V, +25° C6 .5 ns VDD = 5.0 V, +25° C4 .5 ns Propagation Delay, Divider B + Post Divider TPB VDD = 3.3 V, +25° C2 0 ns VDD = 5.0 V, +25° C1 3 ns

USER CONFIGURABLE DIVIDER CLOCK DIVIDER IDT™ / ICS™ USER CONFIGURABLE DIVIDER 7 ICS674-01 REV H 051310 Package Outline and Package Dimensions (28-pin SSOP, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95

Ordering Information

"LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high-reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. Part / Order Number Marking Shipping Packaging Package Temperature 674R-01LF 674R-01LF Tubes 28-pin SSOP 0 to +70 ° C 674R-01LFT 674R-01LF Tape and Reel 28-pin SSOP 0 to +70 ° C 674R-01ILF 674R-01ILF Tubes 28-pin SSOP -40 to 85 ° C 674R-01ILFT 674R-01ILF Tape and Reel 28-pin SSOP -40 to 85 ° C INDEX AREA 1 2 D E1 E SEATING PLANE AA2 e - C - b .10 (.004) C c L *For reference only. Controlling dimensions in mm. Millimeters Inches* Symbol Min Max Min Max A 1 .351 .75. 053. 069 A1 0.10 0.25 .0040 .010 A2 -- 1.50 -- .059 b 0.20 0.30 0.008 0.012 C 0 .180 .25. 007. 010 D 9.80 10.00 .386 .394 E 5 .806 .20. 228. 244 E1 3.80 4.00 .150 .157 e 0.635 Basic 0.025 Basic L 0 .401 .27. 016. 050 α 0° 8° 0° 8°

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