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Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 10
Technical content
Features
Ceramic Surface Mount Package Very Low Phase Jitter Performance, 500fs Maximum Fundamental or 3rd Overtone Crystal Design Frequency Range 6 – 220MHz * +2.5V or +3.3V Operation [+1.8V LVDS only] Output Enable Standard Tape and Reel Packaging, EIA-418
Applications
SerDes Storage Area Networking Broadband Access SONET/SDH/DWDM PON Ethernet/GbE/SyncE Fiber Channel Test and Measurement
Description
CTS Model 626 is a low cost, high performance clock oscillator supporting differential LVPECL or LVDS outputs. Employing the latest IC technology, M626 has excellent stability and very low jitter/phase noise performance.
Ordering Information
I G Notes: Check factory for availability. Stability codes 2 and 3 only. T Output Type Frequency Code [MHz] Frequency Stability Temperature Range Supply Voltage Packaging P XXX or XXXX 4 I 3 +1.8Vdc 4LVPECL - Pin 1 Enable ±20ppm 2 Output Stability Voltage ±50ppm ±30ppm +2.5VdcLVDS - Pin 1 Enable ±25ppm +3.3Vdc This product is specified for use only in standard commercial applications. Supplier disclaims all express and implied warranties and liability in connection with any use of this product in any non-commercial applications or in any application that may expose the product to conditions that are outside of the tolerances provided in its specification. ±100ppm Not all performance combinations and frequencies may be available. Contact your local CTS Representative or CTS Customer Service for availability. LVDS output only. Consult factory for availability. Refer to document 016-1454-0, Frequency Code Tables. 3-digits for frequencies <100MHz, 4-digits for frequencies 100MHz or greater. -20°C to +70°C -40°C to +85°CProduct Frequency Code 1 1k pcs./reel Frequency Temp. Range Packing -40°C to +105°C 3 Check factory for availability. Temperature code C only. Part Dimensions: 2.5 × 2.0 × 1.1mm • 14.25852mg Standard Frequencies - 25.00MHz - 100.00MHz - 27.00MHz - 125.00MHz - 50.00MHz - 155.52MHz - 74.1758MHz - 156.25MHz - 74.25MHz - 161.1328MHz * See Page 9 for additional developed frequencies. Check with factory for availability of frequencies not listed.
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote. Model 626 Very Low Jitter LVPECL or LVDS Clock DOC# 008-0586-0 Rev. C Page 2 of 10 Electrical Specifications Operating Conditions PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Maximum Supply Voltage VCC - -0.3 - 4.0 V 1.710 1.8 1.890 2.375 2.5 2.625 3.135 3.3 3.465 Supply Current LVPECL - 45 70 LVDS - 30 40 LVDS VCC = +1.8V @ maximum load - 7 20 -20 +70 -40 +85 -40 +105 Storage Temperature TSTG - -50 - +125 °C Frequency Stability PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Frequency Range LVPECL LVDS Frequency Stability [Note 2] Δf/fO - ±ppm Aging Δf/f25 First Year @ +25°C, nominal VCC -5 - 5 ppm Output Parameters PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Output Type - - - Output Load RL Terminated to VCC - 2.0V - 50 - Ohms VOH VCC - 1.025 - VCC - 0.880 VOL VCC - 1.810 - VCC - 1.620 VOH VCC - 1.085 - VCC - 0.880 VOL VCC - 1.830 - VCC - 1.555 Output Duty Cycle SYM @ VCC - 1.3V 45 - 55 % Rise and Fall Time TR, TF @ 20%/80% Levels, RL = 50 Ohms - 0.3 0.7 ns Output Type - - - Output Load RL Between Outputs - 100 - Ohms VOH - 1.43 1.60 VOL 0.90 1.10 - Output Duty Cycle SYM @ 1.25V 45 - 55 % Differential Output Voltage VOD RL = 100 Ohms 247 330 454 mV Offset Voltage VOS LVDS Load 1.125 1.25 1.375 V Rise and Fall Time TR, TF @ 20%/80% Levels, RL = 100 Ohms - 0.4 0.7 ns LVDS LVPECL 2.] Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1st year aging. 6 - 220 MHz 6 - 220 20, 25, 30, 50 or 100 fO - Operating Temperature 1.] LVDS output only for +1.8V option. Supply Voltage [Note 1] VCC Output Voltage Levels PECL Load, -20°C to +70°C V PECL Load, -40°C to +85°C V Output Voltage Levels LVDS Load V ±5% V TA - +25 °C ICC VCC = +3.3V or +2.5V @ maximum load mA
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote. Model 626 Very Low Jitter LVPECL or LVDS Clock DOC# 008-0586-0 Rev. C Page 3 of 10 Electrical Specifications Enable Truth Table Pin 1 Pin 4 & Pin 5 Logic ‘1’ Output Open Output Logic ‘0’ High Imp. Test Circuit LVPECL LVDS Output Waveform LVPECL or LVDS Output Parameters PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Start Up Time TS Application of VCC - 3 10 ms Enable Function [Standby] Enable Input Voltage VIH Pin 1 Logic '1', Output Enabled 0.7VCC - - V Disable Input Voltage VIL Pin 1 Logic '0', Output Disabled - - 0.3VCC V Disable Time TPLZ Pin 1 Logic '0', Output Disabled - - 200 ns Standby Current IST Pin 1 Logic '0', Output Disabled - - 15 µA Enable Time TPLZ Pin 1 Logic '1', Output Enabled - - 4 ms 40MHz - 220MHz, Bandwidth 12kHz to 20MHz - 300 500 fs 6MHz - 39.999MHz, Bandwidth 12kHz to 5MHz - - <1 ps Phase Jitter, RMS tjrms
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote. Model 626 Very Low Jitter LVPECL or LVDS Clock DOC# 008-0586-0 Rev. C Page 4 of 10 Electrical Specifications Performance Data Phase Noise [typical] 100MHz, LVDS, VCC = +2.5V, TA = +25°C 125MHz, LVDS, VCC = +3.3V, TA = +25°C 125MHz, LVDS, VCC = +2.5V, TA = +25°C 133MHz, LVDS, VCC = +3.3V, TA = +25°C 133MHz, LVDS, VCC = +2.5V, TA = +25°C 156.25MHz, LVDS, VCC = +3.3V, TA = +25°C
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote. Model 626 Very Low Jitter LVPECL or LVDS Clock DOC# 008-0586-0 Rev. C Page 5 of 10 Electrical Specifications Performance Data Phase Noise [typical] 150MHz, LVPECL, VCC = +2.5V, TA = +25°C 150MHz, LVPECL, VCC = +3.3V, TA = +25°C 155.52MHz, LVPECL, VCC = +2.5V, TA = +25°C 155.52MHz, LVPECL, VCC = +3.3V, TA = +25°C 156.25MHz, LVPECL, VCC = +2.5V, TA = +25°C 156.25MHz, LVPECL, VCC = +3.3V, TA = +25°C
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote. Model 626 Very Low Jitter LVPECL or LVDS Clock DOC# 008-0586-0 Rev. C Page 6 of 10 Electrical Specifications Phase Noise Tabulated - LVDS Typical, VCC = +2.5V, TA = +25°C Typical, VCC = +3.3V, TA = +25°C PARAMETER SYMBOL CONDITIONS TYP UNIT PARAMETER SYMBOL CONDITIONS TYP UNIT LVDS @ 100.00MHz LVDS @ 125.00MHz Phase Noise Single Side Band Phase Noise Single Side Band @ 10Hz -84.20 @ 10Hz -78.38 @ 100Hz -114.15 @ 100Hz -110.33 @ 1kHz -131.57 @ 1kHz -130.56 @ 10kHz -145.73 @ 10kHz -143.21 @ 100kHz -145.76 @ 100kHz -146.13 @ 1MHz -147.14 @ 1MHz -148.44 @ 10MHz -147.92 @ 10MHz -149.28 Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 385.00 fs Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 270.79 fs PARAMETER SYMBOL CONDITIONS TYP UNIT PARAMETER SYMBOL CONDITIONS TYP UNIT LVDS @ 125.00MHz LVDS @ 133.00MHz Phase Noise Single Side Band Phase Noise Single Side Band @ 10Hz -78.89 @ 10Hz -78.84 @ 100Hz -111.00 @ 100Hz -108.34 @ 1kHz -129.90 @ 1kHz -130.40 @ 10kHz -144.21 @ 10kHz -146.53 @ 100kHz -145.41 @ 100kHz -146.23 @ 1MHz -147.49 @ 1MHz -148.89 @ 10MHz -148.50 @ 10MHz -149.68 Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 285.73 fs Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 245.65 fs PARAMETER SYMBOL CONDITIONS TYP UNIT PARAMETER SYMBOL CONDITIONS TYP UNIT LVDS @ 133.00MHz LVDS @ 156.25MHz Phase Noise Single Side Band Phase Noise Single Side Band @ 10Hz -81.21 @ 10Hz -78.30 @ 100Hz -109.47 @ 100Hz -106.47 @ 1kHz -129.95 @ 1kHz -129.58 @ 10kHz -146.50 @ 10kHz -140.35 @ 100kHz -145.86 @ 100kHz -147.41 @ 1MHz -147.50 @ 1MHz -150.11 @ 10MHz -148.92 @ 10MHz -151.37 Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 254.87 fs Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 169.71 fs - dBc/Hz - dBc/Hz - dBc/Hz - dBc/Hz - dBc/Hz - dBc/Hz
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote. Model 626 Very Low Jitter LVPECL or LVDS Clock DOC# 008-0586-0 Rev. C Page 7 of 10 Electrical Specifications Phase Noise Tabulated - LVPECL Typical, VCC = +2.5V, TA = +25°C Typical, VCC = +3.3V, TA = +25°C PARAMETER SYMBOL CONDITIONS TYP UNIT PARAMETER SYMBOL CONDITIONS TYP UNIT LVPECL @ 150.00MHz LVPECL @ 150.00MHz Phase Noise Single Side Band Phase Noise Single Side Band @ 10Hz -74.74 @ 10Hz -75.47 @ 100Hz -103.86 @ 100Hz -106.54 @ 1kHz -126.34 @ 1kHz -132.10 @ 10kHz -137.18 @ 10kHz -143.62 @ 100kHz -142.50 @ 100kHz -152.08 @ 1MHz -144.07 @ 1MHz -154.14 @ 10MHz -145.87 @ 10MHz -155.81 Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 316.93 fs Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 383.70 fs PARAMETER SYMBOL CONDITIONS TYP UNIT PARAMETER SYMBOL CONDITIONS TYP UNIT LVPECL @ 155.52MHz LVPECL @ 155.52MHz Phase Noise Single Side Band Phase Noise Single Side Band @ 10Hz -76.15 @ 10Hz -74.20 @ 100Hz -105.64 @ 100Hz -106.07 @ 1kHz -128.82 @ 1kHz -133.92 @ 10kHz -134.29 @ 10kHz -140.06 @ 100kHz -144.64 @ 100kHz -152.01 @ 1MHz -144.53 @ 1MHz -154.13 @ 10MHz -148.76 @ 10MHz -156.10 Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 261.56 fs Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 100.50 fs PARAMETER SYMBOL CONDITIONS TYP UNIT PARAMETER SYMBOL CONDITIONS TYP UNIT LVPECL @ 156.25MHz LVPECL @ 156.25MHz Phase Noise Single Side Band Phase Noise Single Side Band @ 10Hz -76.48 @ 10Hz -78.01 @ 100Hz -106.76 @ 100Hz -107.38 @ 1kHz -128.97 @ 1kHz -133.00 @ 10kHz -133.21 @ 10kHz -142.25 @ 100kHz -143.87 @ 100kHz -152.23 @ 1MHz -143.57 @ 1MHz -154.66 @ 10MHz -147.95 @ 10MHz -157.00 Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 302.33 fs Phase Jitter, RMS tjrms Integration Bandwidth 12kHz - 20MHz 91.26 fs - dBc/Hz - dBc/Hz - dBc/Hz - dBc/Hz - dBc/Hz - dBc/Hz
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote. Model 626 Very Low Jitter LVPECL or LVDS Clock DOC# 008-0586-0 Rev. C Page 8 of 10 Mechanical Specifications Package Drawing Marking Information Recommended Pad Layout Pin Assignments Notes Pin Symbol Function
1 EOH Enable
2 N.C. No Connect
3 GND Circuit & Package Ground
4 Output RF Output
5 Output Complimentary RF Output
6 VCC Supply Voltage
2001 2005 2009 2013 2017 A B C D E F G H J K L M 2002 2006 2010 2014 2018 N P Q R S T U V W X Y Z 2003 2007 2011 2015 2019 a b c d e f g h j k l m 2004 2008 2012 2016 2020 n p q r s t u v w x y z NOV DECYEAR MAY JUN JUL AUG SEP OCTMONTH JAN FEB MAR APR Preferred 1. O – Output Type; P = LVPECL, L = LVDS. 2. ST – Frequency Stability/Temperature Code. [Refer to Ordering Information] 3. V – Voltage Code; 3 = 3.3V, 2 = 2.5V. 4. xxxx – Frequency Code. 3-digits, frequencies below 100MHz 4-digits, frequencies 100MHz or greater [See document 016-1454-0, Frequency Code Tables.] 5. D – Date Code. See Table I for codes. [Note: Manufacturing site code must appear on reel and carton labels.] Optional 1. O – Output Type; P = LVPECL, L = LVDS. 2. ST – Frequency Stability/Temperature Code. [Refer to Ordering Information] 3. xxxx – Frequency Code. 3-digits, frequencies below 100MHz 4-digits, frequencies 100MHz or greater [See document 016-1454-0, Frequency Code Tables.] 4. D – Date Code. See Table I for codes. [Note: Manufacturing site code must appear on reel and carton labels.] 626OSTV
- xxxxD 1. JEDEC termination code (e4). Barrier-plating is nickel [Ni] with gold [Au] flash plate. 2. Reflow conditions per JEDEC J-STD-020; +260°C maximum, 20 seconds. 3. MSL = 1. 626OST
- xxxxD
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote. Model 626 Very Low Jitter LVPECL or LVDS Clock DOC# 008-0586-0 Rev. C Page 9 of 10 Packaging - Tape and Reel Tape Drawing Reel Drawing Notes 1. Device quantity is 1k pieces minimum or 3k pieces maximum per 180mm reel. 2. Complete CTS part number, frequency value and date code information must appear on reel and carton labels.
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote. Model 626 Very Low Jitter LVPECL or LVDS Clock DOC# 008-0586-0 Rev. C Page 10 of 10 Addendum Additional Developed Frequencies – MHz Frequency Codes for Cover Page Table – MHz FREQUENCY FREQUENCY CODE FREQUENCY FREQUENCY CODE FREQUENCY FREQUENCY CODE FREQUENCY FREQUENCY CODE 10.000000 100 156.269530 156G 19.440000 194 40.000000 400 44.736000 447 77.760000 777 133.000000 1330 150.000000 1500 156.253900 156E 156.257812 156H 156.258750 156J FREQUENCY FREQUENCY CODE FREQUENCY FREQUENCY CODE FREQUENCY FREQUENCY CODE FREQUENCY FREQUENCY CODE 25.000000 250 100.000000 1000 27.000000 270 125.000000 1250 50.000000 500 155.520000 1555 74.175800 74A 156.250000 1562 74.250000 742 161.132800 1611