6116SA20TDB

6116SA RENESAS | Alldatasheet

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Technical content

Features

◆◆◆◆◆ High-speed access and chip select times – Commercial: 15/20/25ns (max.) – Industrial: 20/25ns (max.) – Military: 20/25/35/45/55/70/90/120/150ns (max.) ◆◆◆◆◆ Low-power consumption ◆◆◆◆◆ Battery backup operation – 2V data retention voltage (LA version only) ◆◆◆◆◆ Produced with advanced CMOS high-performance technology ◆◆◆◆◆ CMOS process virtually eliminates alpha particle soft-error rates ◆◆◆◆◆ Input and output directly TTL-compatible ◆◆◆◆◆ Static operation: no clocks or refresh required ◆◆◆◆◆ Available in ceramic 24-pin DIP, ceramic and plastic 24-pin Thin Dip and 24-pin SOIC ◆◆◆◆◆ Military product compliant to MIL-STD-833, Class B ◆◆◆◆◆ Industrial temperature range (–40°C to +85°C) is available for selected speeds ◆◆◆◆◆ Green parts available, see ordering information

Description

The IDT6116SA/LA is a 16,384-bit high-speed static RAM organized as 2K x 8. It is fabricated using high-performance, high-reliability CMOS technology. Access times as fast as 15ns are available. The circuit also offers a reduced power standby mode. When CS goes HIGH, the circuit will automatically go to, and remain in, a standby power mode, as long as CS remains HIGH. This capability provides significant system level power and cooling savings. The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1µW to 4µW operating off a 2V battery. All inputs and outputs of the IDT6116SA/LA are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. The IDT6116SA/LA is packaged in 24-pin 300mil plastic DIP, 24-pin 600mil and 300mil ceramic DIP, or 24-lead gull-wing SOIC providing high board-level packing densities. Military grade product is manufactured in compliance to MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. Functional Block Diagram CS A10 I/O0 I/O7 OE WE

128 X 128

16K (2K x 8-Bit) 6116SA 6116LA

CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Jul.17.20 Pin Configurations(1) Absolute Maximum Ratings(1) Truth Table(1) Pin Description Capacitance (TA = +25°C, f = 1.0 MHZ) DIP/SOIC Top View NOTE: 1. This parameter is determined by device characterization, but is not production tested. Symbol Parameter (1) Conditions Max. Unit CIN Input Capacitance V IN = 0V 8 pF CI/O I/O Capacitance V OUT = 0V 8 pF 3089 tbl 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. V TERM must not exceed V CC +0.5V. Symbol Rating Com'l. Mil. Unit VTERM(2) T erminal Voltage with Respect to GND T A Operating Temperature 0 to +70 -55 to +125 oC TBIAS Temperature Under Bias -55 to +125 -65 to +135 oC TST G Storage Temperature -55 to +125 -65 to +150 oC PT Power Dissipation 1.0 1.0 W IOUT DC Output Current 50 50 mA 3089 tbl 04 Name Description A0 - A 10 Address Inputs I/O0 - I/O7 Data Input/Output CS Chip Select WE Write Enable OE Output Enable VCC Power GND Ground 3089 tbl 01 NOTE: 1. H = V IH, L = V IL, X = Don't Care. Mode CS OE WE I/O Standby H X X High-Z Read L L H DATA OUT Read L H H High-Z Write L X L DATA IN 3089 tbl 02 3089 drw 02 12GND PTG24 CD24 SD24 PSG24 I/O0 I/O1 VCC WE A10 I/O5 I/O 4 OE I/O7 I/O6 CS I/O2 I/O3 NOTE: 1. This text does not indicate orientation of actual part-marking.

6.42 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Jul.17.20 NOTES: 1. All values are maximum guaranteed values. 2. f MAX = 1/t RC, only address inputs are cycling at f MAX, f = 0 means address inputs are not changing. (VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V) (VCC = 5.0V ± 10%) Recommended Operating Temperature and Supply Voltage Recommended DC Operating Conditions NOTES: 1. V IL (min.) = –3.0V for pulse width less than 20ns, once per cycle. 2. V IN must not exceed V CC +0.5V. Grade Ambient Temperature GND Vcc Military -55 OC to +125OC0 V 5 . 0 V ± 1 0 % Industrial -40 OC to +85OC0 V 5 . 0 V ± 1 0 % Commercial 0 OC to +70OC0 V 5 . 0 V ± 1 0 % 3089 tbl 05 Symbol Parameter Min. Typ. Max. Unit VCC Supply Voltage 4.5 5.0 5.5 (2) V GND Ground 0 0 0 V VIH Input High Voltage 2.2 3.5 V CC +0.5 V VIL Input Low Voltage -0.5 (1) ____ 0.8 V 3089 tbl 06 Symbol Parameter Test Conditions IDT6116SA IDT6116LA UnitMin. Max. Min. Max. |ILI| Input Leakage Current VCC = Max., VIN = GND to VCC MIL. COM'L & IND ____ ____ ____ ____ µA |ILO| Output Leakage Current V CC = Max., CS = V IH, VOUT = GND to V CC MIL. COM'L & IND ____ ____ ____ ____ µA VOL Output Low Voltage I OL = 8mA, V CC = Min. ____ 0.4 ____ 0.4 V VOH Output High Voltage I OH = -4mA, V CC = Min. 2.4 ____ 2.4 ____ V 3089 tbl 07 Symbol Parameter Power 6116SA15 6116SA20 6116LA20 6116SA25 6116LA25 Unit Com'l Only Com'l & Ind Mil Com'l & Ind Mil ICC1 Operating Power Supply Current CS < VIL, Outputs Open VCC = Max., f = 0 SA 105 105 130 100 90 mA ICC2 Dynamic Operating Current CS < VIL, Outputs Open VCC = Max., f = f MAX(2) SA 150 130 150 120 135 mA ISB Standby Power Supply Current (TTL Level) CS > VIH, Outputs Open VCC = Max., f = f MAX(2) SA 40 40 50 40 45 mA ISB1 Full Standby Power Supply Current (CMOS Level) CS > VHC, V CC = Max., VIN < VLC or V IN > VHC, f = 0 SA 2 2 10 2 10 mA 3089 tbl 08

CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Jul.17.20 NOTES: 1. T A = + 25°C 2. t RC = Read Cycle Time. 3. This parameter is guaranteed by device characterization, but is not production tested. (VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V) NOTES: 1. All values are maximum guaranteed values. 2. f MAX = 1/t RC, only address inputs are toggling at f MAX, f = 0 means address inputs are not changing. Data Retention Characteristics Over All Temperature Ranges (LA Version Only) (VLC = 0.2V, VHC = VCC – 0.2V) Typ.(1) VCC @ Max. VCC @ ICCDR Data Retention Current MIL. COM'L. ____ ____ 0.5 0.5 1.5 1.5 200 300 μA tCDR(3) Chip Deselect to Data Retention Time CS > VHC VIN > VHC or < VLC 3089 tbl 10 lobmySr etemaraPr ewoP 53AS6116 53AL6116 54AS6116 54AL6116 55AS6116 55AL6116 07AS6116 07AL6116 09AS6116 09AL6116 021AS6116 021AL6116 051AS6116 051AL6116 tinUylnOliMy lnOliMy lnOliMy lnOliMy lnOliMy lnOliMy lnOliM I 1CC ylppuSrewoPgnitarepO ,tnerruC SC < V LI , nepOstuptuO V CC f,.xaM= = 0 AS0 90 90 90 90 90 90 9 Am AL5 85 85 85 85 85 85 8 I 2CC gnitarepOcimanyD ,tnerruC SC < V LI , nepOstuptuO V CC f=f,.xaM= XAM )2( AS5 110 010 010 010 010 010 9 Am AL5 015 90 90 95 85 85 8 I BS ylppuSrewoPybdnatS )leveLLTT(tnerruC SC > V HI nepOstuptuO, V CC f=f,.xaM= XAM )2( AS5 35 25 25 25 25 25 2 Am AL0 30 20 20 25 25 15 1 I 1BS rewoPybdnatSlluF SOMC(tnerruCylppuS ,)leveL SC > V CH , V CC V,.xaM= NI < V CL Vro NI > V CH 0=f, AS0 10 10 10 10 10 10 1 Am 90lbt9803

CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Jul.17.20 NOTES: 1. 0°C to +70°C temperature range only. 2. –55°C to +125°C temperature range only. 3. This parameter guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested. lobmySr etemaraP 51AS6116 )1( 02AS6116 02AL6116 52AS6116 52AL6116 53AS6116 )2( 53AL6116 )2( elcyCdaeR 21lbt9803 lobmySr etemaraP 54AS6116 )2( 54AL6116 )2( 55AS6116 )2( 55AL6116 )2( 07AS6116 )2( 07AL6116 )2( 09AS6116 )2( 09AL6116 )2( 021AS6116 )2( 021AL6116 )2( 051AS6116 )2( 051AL6116 )2( elcyCdaeR 31lbt9803

6.42 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Jul.17.20 Timing Waveform of Read Cycle No. 2(1,2,4) Timing Waveform of Read Cycle No. 1(1,3) Timing Waveform of Read Cycle No. 3(1,3,4) NOTES: 1. WE is HIGH for Read cycle. 2. Device is continuously selected, CS is LOW. 3. Address valid prior to or coincident with CS transition LOW. 4. OE is LOW. 5. Transition is measured ±500mV from steady state. ADDRESS OE CS tRC tAA tOE tACS DATAOUT tOH tOLZ (5) tCLZ (5) tOHZ (5) tCHZ (5) 3089 drw 06 DATA VALID tPD ICC ISB tPU VCC Supply Currents ADDRESS tRC tAA tOH tOH DATAOUT 3089 drw 07 PREVIOUS DATA VALID DATA VALID , CS tACS DATAOUT tCLZ (5) tCHZ (5) DATA VALID 3089 drw 08

CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Jul.17.20 NOTES: 1. 0°C to +70°C temperature range only. 2. –55°C to +125°C temperature range only. 3. This parameter guaranteed with AC Load (Figure 2) by device characterization, but is not production tested. 4. The specification for t DH must be met by the device supplying write data to the RAM under all operation conditions. Although t DH and tOW values will vary over voltage and temperature, the actual tDH will always be smaller than the actual tOW. 54AS6116 )2( 54AL6116 )2( 55AS6116 )2( 55AL6116 )2( 07AS6116 )2( 07AL6116 )2( 09AS6116 )2( 09AL6116 )2( 021AS6116 )2( 021AL6116 )2( 051AS6116 )2( 051AL6116 )2( elcyCetirW 51lbt9803 51AS6116 )1( 02AS6116 02AL6116 52AS6116 52AL6116 53AS6116 )2( 53AL6116 )2( elcyCetirW 41lbt9803

6.42 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Jul.17.20 Timing Waveform of Write Cycle No. 1 (WE Controlled Timing)(1,2,5,7) Timing Waveform of Write Cycle No. 2 (CS Controlled Timing)(1,2,3,5,7) NOTES: 1. WE or CS must be HIGH during all address transitions. 2. A write occurs during the overlap of a LOW CS and a LOW WE. 3. t WR is measured from the earlier of CS or WE going HIGH to the end of the write cycle. 4. During this period, the I/O pins are in the output state and the input signals must not be applied. 5. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in the high-impedance state. 6. Transition is measured ±500mV from steady state. 7. OE is continuously HIGH. If OE is LOW during a WE controlled write cycle, the write pulse width must be the larger of t WP or (t WHZ + t DW) to allow the I/O drivers to turn off and data to be placed on the bus for the required t DW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the write pulse is the specified t WP. For a CS controlled write cycle, OE may be LOW with no degradation to t CW. ADDRESS DATAOUT CS WE DATAIN tWC tAW 3089 drw 09 tAS tWHZ(6) (4) tDW tDH (4)tOW tWR tCHZ (6)tWP(7) (6) PREVIOUS DATA VALID DATA VALID DATA VALID (3) CS WE DATAIN tWC tAW tCW tWR (3) tDW tDH tAS 3089 drw 10 DATA VALID ADDRESS

CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Jul.17.20 Ordering Information — Military Ordering Information — Commercial & Industrial B TD D 20* 120 150 SA LA Military (-55°C to +125°C) Compliant to MIL-STD-883, Class B 300 mil CERDIP (SD24) 600 mil CERDIP (CD24) Standard Power Low Power 6116 Device Type XX Power XXX Speed X Package X Process/ Temperature Range 3089 drw 11 Speed in nanoseconds X Blank Tube Blank I(1) TP SO 15* SA LA Commercial (0°C to +70°C) Industrial (-40°C to +85°C) 300 mil Plastic DIP (PTG24) 300 mil Small Outline IC, Gull-Wing Bend (PSG24) Standard Power Low Power 6116 Device Type XX Power XXX Speed X Package X Process/ Temperature Range 3089 drw 12 Speed in nanoseconds *Available in commercial temperature range and standard power only. X G Green Blank Tube Tape and Reel X NOTE: 1. Contact your local sales office for industrial temp range for other speeds, packages and powers.

6.42 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Jul.17.20 Orderable Part Information Speed (ns) Orderable Part ID Pkg. Code Pkg. Type Temp. Grade 15 6116SA15SOG PSG24 SOIC C 6116SA15SOG8 PSG24 SOIC C 6116SA15TPG PTG24 PDIP C 20 6116SA20DB CD24 CDIP M 6116SA20SOG PSG24 SOIC C 6116SA20SOG8 PSG24 SOIC C 6116SA20TDB SD24 CDIP M 6116SA20TPG PTG24 PDIP C 6116SA20TPGI PTG24 PDIP I 25 6116SA25SOG PSG24 SOIC C 6116SA25SOG8 PSG24 SOIC C 6116SA25SOGI PSG24 SOIC I 6116SA25SOGI8 PSG24 SOIC I 6116SA25TDB SD24 CDIP M 6116SA25TPG PTG24 PDIP C 6116SA25TPGI PTG24 PDIP I 35 6116SA35TDB SD24 CDIP M 45 6116SA45DB CD24 CDIP M 6116SA45TDB SD24 CDIP M 55 6116SA55DB CD24 CDIP M 6116SA55TDB SD24 CDIP M 70 6116SA70DB CD24 CDIP M 6116SA70TDB SD24 CDIP M 90 6116SA90DB CD24 CDIP M 6116SA90TDB SD24 CDIP M 120 6116SA120DB CD24 CDIP M 6116SA120TDB SD24 CDIP M 150 6116SA150DB CD24 CDIP M 6116SA150TDB SD24 CDIP M Speed (ns) Orderable Part ID Pkg. Code Pkg. Type Temp. Grade 20 6116LA20SOG PSG24 SOIC C 6116LA20SOG8 PSG24 SOIC C 6116LA20SOGI PSG24 SOIC I 6116LA20SOGI8 PSG24 SOIC I 6116LA20TDB SD24 CDIP M 6116LA20TPG PTG24 PDIP C 6116LA20TPGI PTG24 PDIP I 25 6116LA25DB CD24 CDIP M 6116LA25SOG PSG24 SOIC C 6116LA25SOG8 PSG24 SOIC C 6116LA25SOGI PSG24 SOIC I 6116LA25SOGI8 PSG24 SOIC I 6116LA25TDB SD24 CDIP M 6116LA25TPG PTG24 PDIP C 35 6116LA35DB CD24 CDIP M 6116LA35TDB SD24 CDIP M 45 6116LA45DB CD24 CDIP M 6116LA45TDB SD24 CDIP M 55 6116LA55DB CD24 CDIP M 6116LA55TDB SD24 CDIP M 70 6116LA70DB CD24 CDIP M 6116LA70TDB SD24 CDIP M 90 6116LA90DB CD24 CDIP M 6116LA90TDB SD24 CDIP M 120 6116LA120DB CD24 CDIP M 6116LA120TDB SD24 CDIP M 150 6116LA150DB CD24 CDIP M 6116LA150TDB SD24 CDIP M

CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Jul.17.20 Datasheet Document History 01/07/00 Updated to new format Pg. 1, 3, 4, 10 Added Industrial Temperature range offerings Pg. 9, 10 Separated ordering information into military, commercial, and industrial temperature range offerings Pg. 11 Added Datasheet Document History 08/09/00 Not recommended for new designs 02/01/01 Removed "Not recommended for new designs" 12/30/03 Pg. 3,10 Corrected Industrial temp from -45C to -40C. 03/31/05 Pg. 10 Added "Restricted hazardous substance device" to ordering information. 11/15/06 Pg. 3 Changed power limits for commercial and industrial on speed grades 25ns and 35ns. Pg.4 Changed power limits for commercial and industrial on speed grade 45ns. Refer to PCN SR-0602-02. 04/26/11 Pg.1,2,3,4,6,10 Updated "Restricted hazardous substance device" to "Green". Obsoleted 24-pin SOJ, 24-pin 600 mil and 35ns, 45ns for Industrial & Commercial. 05/01/13 Pg. 1 Description paragraph 4, package information. Changed text to read "The IDT6116SA/LA is packaged in 24-pin 300mil plastic DIP, 24-pin 600mil and 300mil ceramic DIP, or 24-lead gull-wing SOIC providing high board-level packing densities". Removed IDT in reference to fabrication. Pg. 3 Updated DC Elec Chars (V CC = 5.0V ± 10%) table by adding industrial to the Test Conditions. Updated DC Elec Chars (VCC = 5.0V ± 10%, VLC = 0.2V, VHC + VCC - 0.2V) table by removing the LA power for the 15ns speed. Pg. 10 Removed footnote "*Available in 300mil packaging only" from the Military ordering information. 07/17/20 Pg. 1 - 13 Rebranded as Renesas datasheet Pg. 2 & 10 Updated package codes. Pg. 10 Updated Ordering Information. Pg. 11 Added Orderable Part Information tables.

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