SSM60T03H SSC | Alldatasheet
Document overview
- PDF pages: 5
Technical content
SSM60T03H,J De N-CHANNEL ENHANCEMENT-MODE POWER MOSFET Low gate-charge D BVoss 30V Simple drive requirement Ropsony 12mQ Fast switching Ip 45A G Ss Description p> The SSM60TO3H is in a TO-252 package, which is widely used for Gog TO-252 (H commercial and industrial surface mount applications, and is well suited i: (H) for low voltage applications such as DC/DC converters. The through-hole version, the SSM60T03J in TO-251, is available for low-footprint vertical mounting. These devices are manufactured with an advanced process, providing improved on-resistance and switching performance. The devices have a maximum junction temperature rating of 175°C for improved thermal 6 margin and reliability. 8 ¥ °s 70-254 (d) Absolute Maximum Ratings Drain-Source Voltage Ip @ Tc=25°C Continuous Drain Current, Veg @ 10V Ib@T=100°C _ [Continuous Drain Current, Vas @ 10V lw [Pulsed Drain Current’ Pr@Tc=25°C__ [Total Power Dissipation Storage Temperature Range -55 to 175 “5510175 Thermal Data IRthi-c ——_| Thermal Resistance Junction-case [Rthi-a ———_—([ Thermal Resistance Junction-ambient Dal 8/16/2004 Rev.21 www SiliconStandard.com 1 of 5
S$ SILICON sicinneimnsineaein SSM60T03H,J Electrical Characteristics @ T=25°C (unless otherwise specified) | symoor_ | Parameter | Test Conatons | tin | Typ. [ma | units [BVoss____—|Drain-Source Breakdown Voltage [Vas=0V,Io=250uA_ | 30 | - | - | v | vw} _[Besicun VotageTerpratire Cotewr|Referenceto25°C,lontma_| - |ooas| - | wr] [Rosin __[Static Drain-Source On-Resistance” [Vas=10v, 20a |= | [12 | mea | a 0 Ves (Gate Threshold Voltage [Vos Ves o=250uA | 1 | - [3 |v | lox (Forward Transconductance” [Vos tov.icst0a_ | = | 25 | - | s | ee es PrirSouce teatage Curent CieH7S'C) —_[Vige24V MeseoV |= | = | 250 | uA | llsss_[@ate-Source Leakage Ves t20v_— T= | - eto] na | Ja, fTotalGate Charge” f= 20 | - [a6] - [nc | JQ, _—(Gate-Source Charge Vs 24V |_- [39] - [nc | JQ [Gate-Drain (‘Miller’) Charge [Vas=4.5V | - [7 [ - [nc | tion [Turn-on Delay Time? | Vns=15V | - [ss] - [ns | Re=3.30, Vos=10V | - [iss] - [ns | lous Input Capacitance |Vs=0V |= [sas] - [pe | [Coss Output Capacitance Vs 25V |_- [200] - | pF | [Cxx_ Reverse Transfer Capacitance (f=1.0MHz [= [13s] - [ pF | Source-Drain Diode Vso Forward On Voltage” is A5AVos=ov | = | 3 | v | ee ra eee lar |Reverse Recovery Charge /at=100A/us | - [16] - [nc | Notes: 1.Pulse width limited by safe operating area. 2.Pulse width <300us , duty cycle <2%. 3.Mpo=25V , L=100UH , Ro=25Q, Ins=24A. ee 8/16/2004 Rew2.1 www. SiliconStandard.com 20f5
SSM60T03H,J SS * . lov T=25°C 10v T.=17: a0V = , S 7) 6.0V V ps , Drain-to-Source Voltage (V) Vos , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Pf rea roe | A Te=289°C Ves=10V 4 gb Boe ee ee ee V gs , Gate-to-Source Voltage (V) . T;, Junction Temperature (°C) “ Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature = mers/ Tj=28°C ee V sp V) , Source-to-Drain Voltage (V) ; ° T,, Junction Temperature ( °c) ‘ Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage vs. Reverse Diode Junction Temperature NN EE eee 8/16/2004 Rev.2.1 www.SiliconStandard.com 3 of 5
S IAM SSM60T03H,J ee 7 cow (f= 1.0MHz Tp=204 = Vps=16 = _ Van2l Jf | a Ciss = Ss 4) === Qc, Total Gate Charge (nC) , pg Drainto Source Voltage V) ° Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics esteemed teatime
2 COA
“ ~ON z a> AUINUIMIII BRON ONY j AL I) 3 “a QO aN NY 100us a LA | | ld RS ’ SONY & eA | Ae SSN SS ne » Ea a4 SE] 4 Te rews'c SOY Loti s RT see Si hte a LT Ai | . Vos, Drain-to-Source Voltage iy) , t, Pulse Width (5) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance im Vo some Tr) | ome > (foxuosore OSCILLOSCOPE Re () = 6 (4 | onxpare wos 4 A Fig 11. Switching Time Circuit Fig 12. Gate Charge Circuit 8/16/2004 Rev.2.1 www.SiliconStandard.com 40f5
SSM60T03H,J ee Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. ee 8/16/2004 Rev.2.1 www.SiliconStandard.com 5 of 5