2N6071A_06 ONSEMI | Alldatasheet

Document overview

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Technical content

Features

  • Sensitive Gate Triggering Uniquely Compatible for Direct Coupling to TTL, HTL, CMOS and Operational Amplifier Integrated Circuit Logic Functions
  • Gate Triggering: 4 Mode − 2N6071A, B; 2N6073A, B; 2N6075A, B
  • Blocking V oltages to 600 V
  • All Diffused and Glass Passivated Junctions for Greater Parameter Uniformity and Stability
  • Small, Rugged, Thermopad Construction for Low Thermal Resistance, High Heat Dissipation and Durability
  • Device Marking: Device Type, e.g., 2N6071A, Date Code *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MT1 G MT2 http://onsemi.com TRIACS

4.0 A RMS, 200 − 600 V

TO−225 CASE 077 STYLE 5 123 REAR VIEW SHOW TAB x = 1, 3, 5 y = A, B Y = Year WW = Work Week G = Pb−Free Package MARKING DIAGRAM YWW 607xyG 1. Cathode 2. Anode 3. Gate Preferred devices are recommended choices for future use and best overall value. See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.

ORDERING INFORMATION

http://onsemi.com MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit *Peak Repetitive Off-State Voltage (Note 1) (TJ = /C004240 to 110°C, Sine Wave, 50 to 60 Hz, Gate Open) 2N6071A,B 2N6073A,B 2N6075A,B VDRM, VRRM 200 400 600 V *On-State RMS Current (TC = 85°C) Full Cycle Sine Wave 50 to 60 Hz IT(RMS) 4.0 A *Peak Non−repetitive Surge Current (One Full cycle, 60 Hz, T J = +110°C) ITSM 30 A Circuit Fusing Considerations (t = 8.3 ms) I2t 3.7 A2s *Peak Gate Power (Pulse Width ≤ 1.0 /C0109s, TC = 85°C) PGM 10 W *Average Gate Power (t = 8.3 ms, TC = 85°C) PG(AV) 0.5 W *Peak Gate Voltage (Pulse Width ≤ 1.0 /C0109s, TC = 85°C) VGM 5.0 V *Operating Junction Temperature Range TJ −40 to +110 °C *Storage Temperature Range Tstg −40 to +150 °C Mounting Torque (6-32 Screw) (Note 2) − 8.0 in. lb. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above t he Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. V DRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. 2. Torque rating applies with use of a compression washer. Mounting torque in excess of 6 in. lb. does not appreciably lower case-to-sink thermal resistance. Main terminal 2 and heatsink contact pad are common. THERMAL CHARACTERISTICS Characteristic Symbol Max Unit *Thermal Resistance, Junction−to−Case R/C0113JC 3.5 °C/W Thermal Resistance, Junction−to−Ambient R/C0113JA 75 °C/W Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds TL 260 °C *Indicates JEDEC Registered Data.

http://onsemi.com ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted; Electricals apply in both directions) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS *Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM; Gate Open) T J = 25°C TJ = 110°C IDRM, IRRM − /C0109A mA ON CHARACTERISTICS *Peak On-State Voltage (Note 3) (ITM = /C00346.0 A Peak) VTM − − 2 V *Gate Trigger Voltage (Continuous DC), All Quadrants (Main Terminal Voltage = 12 Vdc, RL = 100 /C0087, TJ = −40°C) VGT − 1.4 2.5 V Gate Non−Tri gger Voltage, All Quadrants (Main Terminal Voltage = 12 Vdc, RL = 100 /C0087, TJ = 110°C) VGD 0.2 − − V *Holding Current (Main Terminal Voltage = 12 Vdc, Gate Open, Initiating Current = /C00341 Adc) TJ = −40°C TJ = 25°C IH mA Turn-On Time (ITM = 14 Adc, IGT = 100 mAdc) tgt − 1.5 − /C0109s QUADRANT (Maximum Value) Type IGT @ TJ I mA II mA III mA IV mA Gate Trigger Current (Continuous DC) (Main Terminal Voltage = 12 Vdc, RL = 100 /C0087) 2N6071A 2N6073A 2N6075A +25°C 5 5 5 10 −40°C 20 20 20 30 2N6071B 2N6073B 2N6075B +25°C 3 3 3 5 −40°C 15 15 15 20 DYNAMIC CHARACTERISTICS Critical Rate of Rise of Commutation Voltage @ VDRM, TJ = 85°C, Gate Open, ITM = 5.7 A, Exponential Waveform, Commutating di/dt = 2.0 A/ms dv/dt(c) − 5 − V//C0109s 3. Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%. *Indicates JEDEC Registered Data. Trigger devices are recommended for gating on Triacs. They provide: 1. Consistent predictable turn-on points. 2. Simplified circuitry. 3. Fast turn-on time for cooler, more efficient and reliable operation. SAMPLE APPLICATION: TTL-SENSITIVE GATE 4 AMPERE TRIAC TRIGGERS IN MODES II AND III 0 V −VEE VEE = 5.0 V MC7400 510 /C0087 2N6071A LOAD4

115 VAC

http://onsemi.com + Current + Voltage VTM IH Symbol Parameter VDRM Peak Repetitive Forward Off State Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Reverse Off State Voltage IRRM Peak Reverse Blocking Current Voltage Current Characteristic of Triacs (Bidirectional Device) IDRM at VDRM on state off state IRRM at VRRM Quadrant 1 MainTerminal 2 + Quadrant 3 MainTerminal 2 − VTM IH VTM Maximum On State Voltage IH Holding Current MT1 (+) IGT GATE (+) MT2 REF MT1 (−) IGT GATE (+) MT2 REF MT1 (+) IGT GATE (−) MT2 REF MT1 (−) IGT GATE (−) MT2 REF MT2 NEGATIVE (Negative Half Cycle) MT2 POSITIVE (Positive Half Cycle) Quadrant III Quadrant IV Quadrant II Quadrant I Quadrant Definitions for a Triac IGT − + IGT All polarities are referenced to MT1. With in−phase signals (using standard AC lines) quadrants I and III are used. SENSITIVE GATE LOGIC REFERENCE IC Logic Functions Firing Quadrant I II III IV TTL 2N6071A Series 2N6071A Series HTL 2N6071A Series 2N6071A Series CMOS (NAND) 2N6071B Series 2N6071B Series CMOS (Buffer) 2N6071B Series 2N6071B Series Operational Amplifier 2N6071A Series 2N6071A Series Zero Voltage Switch 2N6071A Series 2N6071A Series

http://onsemi.com Device Package Shipping† 2N6071A TO−225

500 Units / Box

2N6071AG TO−225 (Pb−Free) 2N6071B TO−225 2N6071BG TO−225 (Pb−Free) 2N6071BT TO−225 2N6071BTG TO−225 (Pb−Free) 2N6073A TO−225 2N6073AG TO−225 (Pb−Free) 2N6073B TO−225 2N6073BG TO−225 (Pb−Free) 2N6075A TO−225 2N6075AG TO−225 (Pb−Free) 2N6075B TO−225 2N6075BG TO−225 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

http://onsemi.com PACKAGE DIMENSIONS TO−225 CASE 77−09 ISSUE Z NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 077−01 THRU −08 OBSOLETE, NEW STANDARD 077−09. −B− −A− M K F C Q H V G S D J R U 13 2 2 PL MAM0.25 (0.010) B M MAM0.25 (0.010) B M DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.425 0.435 10.80 11.04 B 0.295 0.305 7.50 7.74 C 0.095 0.105 2.42 2.66 D 0.020 0.026 0.51 0.66 F 0.115 0.130 2.93 3.30 G 0.094 BSC 2.39 BSC H 0.050 0.095 1.27 2.41 J 0.015 0.025 0.39 0.63 K 0.575 0.655 14.61 16.63 M 5 TYP 5 TYP Q 0.148 0.158 3.76 4.01 R 0.045 0.065 1.15 1.65 S 0.025 0.035 0.64 0.88 U 0.145 0.155 3.69 3.93 /C0095/C0095 STYLE 5: PIN 1. MT 1 2. MT 2 3. GATE ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 2N6071/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.