5Q0765RT

KA5Q0765RT FAIRCHILD | Alldatasheet

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Technical content

/G01 OSC OVP LEB S _ Q R Delay 500nS VrefInternal Bias TSD 150oC Power-on Reset S Q R Burst mode controller Ifb Ids R 1.7R Vds REF. PSR REF. Sync. REF. Ron Roff Rsense Vfb offset OCL REF. PWM UVLO Vz 3 1 S P S

FEATURES

• Quasi Resonant Converter Controller  Internal Burst mode Controller for Stand-by mode  Pulse by pulse current limiting  Over current Latch protection  Over voltage protection (Vsync: Min. 11V)  Internal thermal shutdown function  Under voltage lockout  Internal high voltage sense FET  Auto-restart mode

ORDERING INFORMATION

Device Package Topr ( °°°°C) KA5Q0765RT TO-220F-5L −25°C to +85°C TO-220F-5L BLOCK DIAGRAM The SPS product family is specially designed for an off-line SMPS with minimal external components. The SPS consist of high voltage power SenseFET and current mode PWM IC. Included PWM controller features integrated fixed oscillator, under voltage lock out, leading edge blanking, optimized gate turn-on/turn- off driver, thermal shut down protection, over voltage protection, and temperature compensated precision current sources for loop compensation and fault protection circuitry. Compared to discrete MOSFET and controller or RCC switching converter solution, a SPS can reduce total component count, design size, and weight and at the same time increase efficiency, productivity, and system reliability. It has a basic platform well suited for cost-effective design in Quasi- Resonant Converter as C-TV power supply.  1999 Fairchild Semiconductor Corporation REV. B

NOTES: 1. Tj=25°C to 150°C 2. Repetitive rating: Pulse width limited by maximum junction temperature 3. L=24mH, starting Tj=25°C 4. L=13uH, starting Tj=25°C Characteristic Symbol Value Unit Drain-source (GND) voltage (1) VDSS 650 V Drain-Gate voltage (RGS =1M Ω )V DGR 650 V Gate-source (GND) voltage V GS ±30 V Drain current pulsed (2) IDM 28.0 A DC Single pulsed avalanche energy (3) EAS 570 mJ Avalanche current (4) IAS 20 A Continuous drain current (TC =25°C) I D 7.0 A DC Continuous drain current (TC =100°C) I D 5.6 A DC Supply voltage V CC 30 V Analog input voltage range V FB −0.3 to VSD V Total power dissipation P D (wt H/S) 135 W Derating 1.1 W/ °C Operating temperature T OPR −25 to +85 °C Storage temperature T STG −55 to +150 °C

NOTE: Pulse test: Pulse width ≤ 300µS, duty cycle ≤ 2% ELECTRICAL CHARACTERISTICS (SFET part) (Ta=25°C unless otherwise specified) Characteristic Symbol Test condition Min. Typ. Max. Unit Drain-source breakdown voltage BV DSS VGS =0V, ID =50µA6 5 0 −− V Zero gate voltage drain current IDSS VDS =Max., Rating, VGS =0V −− 200 µA VDS =0.8Max., Rating, VGS =0V, TC =125°C −− 500 µA Static drain-source on resistance (note) R DS(ON) VGS =10V, ID =4.0A − 1.25 1.6 Ω Forward transconductance (note) gfs V DS =15V, ID =4.0A 3.0 −− S Input capacitance Ciss V GS =0V, VDS =25V, f=1MHz − 1600 − pF Output capacitance Coss − 310 − Reverse transfer capacitance Crss − 120 − Turn on delay time td(on) V DD =0.5BVDSS , ID =7.0A (MOSFET switching time are essentially independent of operating temperature) − 25 − nS Rise time tr − 55 − Turn off delay time td(off) − 80 − Fall time tf − 50 − Total gate charge (gate-source+gate-drain) Qg V GS =10V, ID =7.0A, VDS =0.5BVDSS (MOSFET switching time are essentially independent of operating temperature) −− 72 nC Gate-source charge Qgs − 9.3 − Gate-drain (Miller) charge Qgd − 29.3 −

ELECTRICAL CHARACTERISTICS (Control part) (Ta=25°C unless otherwise specified) Characteristic Symbol Test condition Min. Typ. Max. Unit SENSE FET SECTION Drain to PKG Breakdown voltage BVpkg 60Hz AC, Ta=25 °C 3500 −− V Drain to Source Breakdown voltage BVdss Vdrain=650V, Ta=25°C 650 −− V Drain to Source Leakage current Idss Vdrain=650V, Ta=25 °C −− 200 µA OSCILLATOR SECTION Initial Frequency F OSC − 18 20 22 KHz Voltage Stability F STABLE 12<VCC <23V 0 1 3 % Temperature Stability note 2 ∆FOSC -25°C< Ta<85°C 0 ±5 ±10 % Maximum Duty Cycle D MAX − 92 95 98 % Minimum Duty Cycle D MIN −− − 0% UVLO SECTION Start Threshold Voltage V START VFB =GND 14 15 16 V Stop Threshold Voltage VSTOP V FB =GND 8 9 10 V FEEDBACK SECTION Feedback Source Current I FB VFB =GND 0.7 0.9 1.1 mA Shotdown Feedback Voltage V SD Vfb>6.9V 6.9 7.5 8.1 V Shutdown Delay Current I DELAY VFB =5V 4 5 6 µA PROTECTION SECTION Over Current Protection V OVP Vsync>11V 11 12 13 V Over Current Latch Voltage note 2 VOCL − 0.9 1.0 1.1 V Thermal shutdown Temp. TSD − 140 160 −° C SYNC SECTION Normal Sync High Threshold Voltage VNSH VCC =16V, Vfb=5V 4.0 4.6 5.2 V Normal Sync Low Threshold Voltage VNSL VCC =16V, Vfb=5V 2.3 2.6 2.9 V Burst High Threshold Voltage V BSH VCC =10.5V, Vfb=0V 3.2 3.6 4.0 V Burst Low Threshold Voltage V BSL VCC =10.5V, Vfb=0V 1.1 1.3 1.5 V

ELECTRICAL CHARACTERISTICS (Continued) (Ta=25°C unless otherwise specified) NOTE: 1. These parameters, although guaranteed, are not 100% tested in production 2. These parameters, although guaranteed, are tested in EDS (wafer test) process 3. These parameters indicate inductor current Characteristic Symbol Test condition Min. Typ. Max. Unit BURST MODE SECTION Burst mode Low Threshold Voltage VBURL Vfb=0V 10.4 11.0 11.6 V Burst mode High Threshold Voltage VBURH Vfb=0V 11.4 12.0 12.6 V Burst mode Enable Feedback voltage VBEN VCC =10.5V 0.7 1.0 1.3 V Burst mode Peak Current Limit I BU_PK VCC =10.5V 0.65 0.85 1.0 V PRIMARY SIDE REGULATION SECTION Primary Regulation Threshold Voltage VPR Ifb=700µA, Vfb=4V 32.0 32.5 33.0 V Primary Regulation Thansconductance GPR − 2.0 2.6 − mA/V CURRENT LIMIT (SELF-PROTECTION) SECTION Peak Current Limit note 3 IPK − 4.4 5.0 5.6 A START UP CURRENT Start up Current I START Vfb=GND, VCC =14V − 0.1 0.2 mA Operatig Supply Current noet 1 IOP Vfb=GND, VCC =16V − 10 18 mA IOP(MIN) Vfb=GND, VCC =12V IOP(MAX) Vfb=GND, VCC =28V

TYPICAL PERFORMANCE CHARACTERISTICS Start Voltage 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp.(/G01) Stop Voltage 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Stand-by Current 0.60 0.80 1.00 1.20 1.40 -25 0 25 50 75 100 125 150 Temp(/G01) Operting Current 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Freqency 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Maximum Duty 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01)

TYPICAL PERFORMANCE CHARACTERISTICS (Continued) Feedback Offset Voltage 0.60 0.80 1.00 1.20 1.40 -25 0 25 50 75 100 125 150 Temp(/G01) Feedback Source Current 0.80 0.90 1.00 1.10 1.20 -25 0 25 50 75 100 125 150 Temp(/G01) Over Voltage Protection 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Sh utDown F eedback Voltage 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) ShutDown Delay Current 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Burst Mode Enable Feedback Voltage 0.60 0.80 1.00 1.20 1.40 -25 0 25 50 75 100 125 150 Temp(/G01)

TYPICAL PERFORMANCE CHARACTERISTICS (Continued) Burst Mode Low Threshold Voltage 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Burst Mode High Threshold Voltage 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Burst Mode Sync. Low Th resh old Voltage 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Burst Mode Sync. High Th resh old Voltage 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Primary Volatge 0.98 0.99 1.00 1.01 1.02 -25 0 25 50 75 100 125 150 Temp(/G01) Primary Mode Gain 0.80 0.90 1.00 1.10 1.20 -25 0 25 50 75 100 125 150 Temp(/G01)

TYPICAL PERFORMANCE CHARACTERISTICS (Continued) /G01 Normal Mode Sync. High Th resh old Volatge 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Burst Mode Sync. Low Th resh old Voltage 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Peak Current Limit 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01) Burst Mode Peak Current Limit 0.90 0.95 1.00 1.05 1.10 -25 0 25 50 75 100 125 150 Temp(/G01)

12/28/99 0.0m 001 Stock#DSxxxxxxxx  1999 Fairchild Semiconductor Corporation LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com