5962-0420501HPA

HCPL-5150 HP | Alldatasheet

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• Performance Guaranteed over Full Military Temperature Range: -55°C to +125°C  Manufactured and Tested on a MIL- PRF-38534 Certified Line  Hermetically Sealed Packages  Dual Marked with Device Part Number and DSCC Drawing Number  QML-38534  HCPL-3150 Function Compatibility  0.5 A Minimum Peak Output Current  10 kV/µs Minimum Common Mode Rejection (CMR) at V CM = 1000 V  1.0 V Maximum Low Level Output Voltage (VOL) Eliminates Need for Negative Gate Drive I CC = 5 mA Maximum Supply Current  Under Voltage Lock-Out Protection (UVLO) with Hysteresis  Wide Operating V CC Range: 15 to 30 Volts  500 ns Maximum Propagation Delay  +/- 0.35 µs Maximum Delay Between Devices CAUTION: It is advised that normal static prec autions be taken in hand ling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.

A 0.1 µF bypass capacitor must be connected between pins 5 and 8. Device Marking Outline Drawing LED VCC − VEE “POSITIVE GOING” (i.e., TURN-ON) VCC − VEE “NEGATIVE GOING” (i.e., TURN-OFF) VO OFF 0 − 30 V 0 − 30 V LOW ON 0 − 11 V 0 − 9.5 V LOW ON 11 − 13.5 V 9.5 − 12 V TRANSITION ON 13.5 − 30 V 12 − 30 V HIGH COMPLIANCE INDICATOR,* DATE CODE, SUFFIX (IF NEEDED) A HCPL-515x 5962-04205 01Hxx 50434 COUNTRY OF MFR. Agilent CAGE CODE* Agilent DESIGNATOR DSCC SMD* PIN ONE/ ESD IDENT Agilent P/N DSCC SMD* * QUALIFIED PARTS ONLY SGP QYYWWZ 3.81 (0.150) MIN. 4.32 (0.170) MAX. 9.40 (0.370) 9.91 (0.390) 0.51 (0.020) MAX. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) MIN. 0.76 (0.030) 1.27 (0.050) 8.13 (0.320) MAX. 7.36 (0.290) 7.87 (0.310) 0.20 (0.008) 0.33 (0.013) 7.16 (0.282) 7.57 (0.298) NOTE: DIMENSIONS IN MILLIMETERS (INCHES). Selection Guide − Package Styles and Lead Configuration Options Agilent Part Number and Options Commercial HCPL-5150 MIL-PRF-38534, Class H HCPL-5151 Standard Lead Finish Gold Plate Solder Dipped Option −200 Butt Cut/Gold Plate Option −100 Gull Wing/Soldered Option −300 SMD Part Number Prescript for all below 5962- Either Gold or Solder 0420501HPX Gold Plate 0420501HPC Solder Dipped 0420501HPA Butt Cut/Gold Plate 0420501HYC Butt Cut/Soldered 0420501HYA Gull Wing/Soldered 0420501HXA

Hermetic Optocoupler Options Option Description 100 Surface mountable hermetic optocoupler with leads trim med for butt joint assembly. This option is available on commercial and hi-rel product (see drawings below for details). 200 Lead finish is solder dipp ed rather than gold plated. This option is available on commercial and hi-rel product. DSCC Drawing part numbers contain provisions for lead finish. 300 Surface mountable hermetic optocoupler with leads cut an d bent for gull wing assembly. This option is avail- able on commercial and hi-rel product (see drawings below for details). This option has solder dipped leads. 1.14 (0.045) 1.40 (0.055) 4.32 (0.170) MAX. 0.51 (0.020) MAX. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) MIN. 7.36 (0.290) 7.87 (0.310) 0.20 (0.008) 0.33 (0.013) NOTE: DIMENSIONS IN MILLIMETERS (INCHES). 0.51 (0.020) MIN. 4.57 (0.180) MAX. 0.51 (0.020) MAX. 2.29 (0.090) 2.79 (0.110) 1.40 (0.055) 1.65 (0.065) 9.65 (0.380) 9.91 (0.390) 5o MAX. 4.57 (0.180) MAX. 0.20 (0.008) 0.33 (0.013)NOTE: DIMENSIONS IN MILLIMETERS (INCHES).

Notes: 1. No derating required with the typical case-to-ambient thermal resistance. ( θCA=140°C/W) Refer to Figure 35. 2. Maximum pulse width = 10 µs, maximum duty cycle = 0.2%. This value is intended to allow for component tolerances for designs with IO peak minimum = 0.5 A. See Applications section for additional details on limiting IOH peak. 3. Derate linearly above 102 °C free air temperature at a rate of 6mW/°C with the typical case-to-ambient thermal resistance (θCA=140°C/W). Refer to Figure 36. 4. Derate linearly above 102 °C free air temperature at a rate of 6mW/°C with the typical case-to-ambient thermal resistance (θCA=140°C/W). Refer to Figure 35 and 36. ESD Classification Recommended Operating Conditions Parameter Symbol Min. Max. Units Note Storage T emperature T S -65 +150 °C Operating T emperature T A -55 +125 °C Case T emperature T C +145 °C Junction T emperature T J +150 °C Lead Solder T emperature 260 for 10s °C Average Input Current I F AVG 25 mA 1 Peak Transient Input Current (<1 µs pulse width, 300 pps) IF PK 1.0 A Reverse Input Voltage V R 5V “High” Peak Output Current I OH (PEAK) 0.6 A 2 “Low” Peak Output Current I OL (PEAK) 0.6 A 2 Supply Voltage (V CC-VEE)0 3 5 V Output Voltage V O (PEAK) 0V CC V Input Power Dissipation P E 45 mW 1 Output Power Dissipation P O 250 mW 3 T otal Power Dissipation P T 295 mW 4 MIL-STD-883, Method 3015 ( ▲ ), Class 1 Parameter Symbol Min. Max. Units Power Supply Voltage (V CC – VEE) 1 53 0V o l t s Input Current (ON) I F (ON) 10 18 mA Input Voltage (OFF) V F (OFF) -3.0 0.8 Volts Operating T emperature T A -55 125 °C

Electrical Specifications (DC) Over recommended operating conditions (TA = -55 to +125°C, IF(ON) = 10 to 18 mA, VF(OFF) = -3.0 to 0.8V, VCC = 15 to 30 V, VEE = Ground) unless otherwise specified. Parameter Symbol Test Conditions Group A Subgroups (13) Limits Units Fig. Note Min. Typ.* Max. High Level Output Current IOH VO = (VCC − 4 V) 1, 2, 3 0.1 0.4 A 2, 3, 17 2 VO = (VCC − 15 V) 0.5 1 Low Level Output Current IOL VO = (VEE + 2.5 V) 1, 2, 3 0.1 0.6 A 5, 6, 18 2 VO = (VEE + 15 V) 0.5 1 High Level Output Voltage VOH IO = -100 mA 1, 2, 3 (VCC − 4) (V CC − 3) V 1, 3, 19 3, 4 Low Level Output Voltage VOL IO = 100 mA 1, 2, 3 0.4 1.0 V 4, 6, 20 High Level Supply Current ICCH Output Open, IF = 10 to 18 mA 1, 2, 3 2.5 5.0 mA 7, 8 Low Level Supply Current ICCL Output Open, VF = -3.0 to +0.8V 1, 2, 3 2.7 5.0 mA Threshold Input Cur- rent Low to High IFLH IO = 0 mA, VO > 5 V 1, 2, 3 2.6 9.0 mA 9, 15, Threshold Input Voltage High to Low VFHL 1, 2, 3 0.8 V Input Forward Voltage VF IF = 10 mA 1, 2, 3 1.2 1.5 1.8 V 16 T emperature Coefficient of Forward Voltage F/∆TA IF = 10 mA -1.6 mV/°C Input Reverse Breakdown Voltage BVR IR = 10 µA 1, 2, 3 5 V Input Capacitance C IN f = 1 MHz, VF = 0 V 80 pF UVLO Threshold V UVLO+ VO > 5 V, IF = 10 mA 1, 2, 3 11.0 12.3 13.5 V 22, 37 VUVLO- 1, 2, 3 9.5 10.7 12.0 UVLO Hysteresis UVLO HYS 1.6 *All typical values at TA = 25°C and VCC − VEE = 30 V, unless otherwise noted.

Switching Specifications (AC) Over recommended operating conditions (TA = -55 to +125°C, IF(ON) = 10 to 18 mA, VF(OFF) = -3.0 to 0.8V, VCC = 15 to 30 V, VEE = Ground) unless otherwise specified. Parameter Symbol Test Conditions Group A Subgroups (13) Limits Units Fig. Note Min. Typ.* Max. Propagation Delay Time to High Output Level tPLH Rg = 47 Ω , Cg = 3 nF, f = 10 kHz, Duty Cycle = 50% 9, 10, 11 0.10 0.30 0.50 µs 10, 11, 12, 13, 14, 23 Propagation Delay Time to Low Output Level t PHL 9, 10, 11 0.10 0.30 0.50 µs Pulse Width Distortion PWD 9, 10, 11 0.3 µs 12 Propagation Delay Difference Between Any T wo Parts PDD PHL − tPLH) 9, 10, 11 -0.35 0.35 µs 33, 34 7 Rise Time t r 0.1 µs 23 Fall Time t f 0.1 µs UVLO Turn On Delay t UVLO ON VO > 5 V, IF = 10 mA 0.8 µs 22 UVLO Turn Off Delay t UVLO OFF VO < 5 V, IF = 10 mA 0.6 Output High Level Common Mode Transient Immunity |CM H|I F = 10 mA, VCC = 30 V VCM = 1000V TA = 25°C 91 0 kV/µs 24 8, 9, 14 Output Low Level Common Mode Transient Immunity |CM L|V CM = 1000V VF = 0 V, VCC = 30 V TA = 25°C 91 0 kV/µs 8, 10, *All typical values at TA = 25°C and VCC − VEE = 30 V, unless otherwise noted.

Over recommended operating conditions (TA = -55 to +125°C) unless otherwise specified. Notes: 1. Maximum pulse width = 10 µs, maximum duty cycle = 0.2%. This value is intended to allow for component tolerances for designs with IO peak minimum = 0.5 A. See Applications section for additional details on limiting IOH peak. 2. Maximum pulse width = 50 µs, maximum duty cycle = 0.5%. 3. In this test V OH is measured with a dc load current. When driving capacitive loads VOH will approach VCC as IOH approaches zero amps. 4. Maximum pulse width = 1 ms , maximum duty cycle = 20%. 5. This is a momentary withstand test, not an operating condition. 6. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted together. 7. The difference between t PHL and tPLH between any two HCPL-5150 parts under the same test condition. 8. Pins 1 and 4 need to be connected to LED common. 9. Common mode transient immunity in the high state is the maximum tolerable |dV CM/dt| of the common mode pulse, VCM, to assure that the output will remain in the high state (i.e., VO > 15.0 V). 10. Common mode transient immunity in a low state is the maximum tolerable |dVCM/dt| of the common mode pulse, VCM, to assure that the output will remain in a low state (i.e., VO < 1.0 V). 11. This load condition approximates the gate load of a 1200 V/25 A IGBT. 12. Pulse Width Distortion (PWD) is defined as |tPHL-tPLH| for any given device. 13. Standard parts receive 100% testing at 25°C (Subgroups 1 and 9). SMD and Class H parts receive 100% testing at 25, 125 and -55°C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively). 14. Parameters are tested as part of device initial characterization and after design and process changes. Parameters are guaranteed to limits specified for all lots not specifically tested. Parameter Symbol Test Conditions Group A Subgroups (13) Limits Units Fig. Note Min. Typ.* Max. Input-Output Leakage Current II-O VI-O = 1500Vdc RH = 45%, t = 5 sec., TA = 25°C 1.0 µA 5, 6 Resistance (Input-Output) RI-O VI-O = 500 VDC 1010 Ω 6 Capacitance (Input-Output) CI-O f = 1 MHz 2.34 pF 6 *All typicals at TA = 25°C.

Figure 23. tPLH, tPHL, tr, and tf Test Circuit and Waveforms Figure 24. CMR Test Circuit and Waveforms

10 KHz

of distributors, please go to our web site. Copyright2004 Agilent T echnologies, Inc. Under Voltage Lockout Feature. Figure 37. Under Voltage Lock Out with MIL- PRF- 38534 Class H.