5962-0254601VZA

LMH6702QML_15 TI1 | Alldatasheet

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+VCC VOUT N/C N/C N/C N/C VNON-INV -VCC VINV N/C +VCC VOUT N/C N/C VNON-INV -VCC VINV LMH6702QML www.ti.com SNOSAQ2E –JULY 2005–REVISED MARCH 2013 1.7GHz,UltraLowDistortion,WidebandOpAmp Check forSamples: LMH6702QML 1FEATURES DESCRIPTION The LMH6702 is a very wideband, DC coupled 2• VS = ±5V,TA = 25°C, A V = +2V/V,R L = 100Ω, monolithicoperationalamplifierdesignedspecificallyVOUT = 2VPP ,TypicalUnless Noted: forwide dynamic rangesystemsrequiringexceptional• AvailablewithRadiationEnsurance signalfidelity.Benefittingfrom TI'scurrentfeedback – High Dose Rate 300 krad(Si) architecture,theLMH6702 offersunitygainstabilityat exceptional speed without need for external– ELDRS Free 300 krad(Si) compensation.• −3dB Bandwidth (VOUT = 0.2VPP )720 MHz

• FastSlew Rate 3100V/μs current,theLMH6702 istheidealdriveror bufferfor high-speedflashA/D and D/A converters.• Supply Current12.5mA Wide dynamic range systems such as radar and• Output Current80mA communication receivers,requiringa wideband• Low IntermodulationDistortion(75MHz) amplifierofferingexceptionalsignalpurity,willfindthe−67dBc LMH6702's lowinputreferrednoiseand lowharmonic
• Improved Replacement forCLC409 and and intermodulationdistortionmake itan attractive CLC449 highspeed solution. The LMH6702 is constructedusing TI's VIP10APPLICATIONS complimentary bipolarprocess and TI's proven
• FlashA/D Driver currentfeedbackarchitecture.
• D/A transimpedance Buffer
• Wide Dynamic Range IFAmp
• Radar/Communication Receivers
• LineDriver
• High ResolutionVideo Connection Diagrams Figure1.8-Lead CDIP (NAB) Figure2.10-Lead CLGA (NAC) Top View Top View These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2005–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SNOSAQ2E –JULY 2005–REVISED MARCH 2013 www.ti.com AbsoluteMaximum Ratings(1) SupplyVoltage(VCC ) ±6.75VDC Common Mode InputVoltage(VCM ) V-toV+ Power Dissipation(PD ) (2) 1W JunctionTemperature(TJ) +175°C Lead Temperature(soldering,10 seconds) +300°C StorageTemperatureRange -65°C ≤ TA ≤ +150°C ThermalResistance θJA CDIP (StillAir) 170°C/W CDIP (500LF/MinAirFlow) 100°C/W CLGA (StillAir) 220°C/W CLGA (500LF/MinAirFlow) 150°C/W θJC CDIP 35°C/W CLGA 37°C/W Package Weight(Typical) CDIP 1078mg CLGA 227mg ESD Tolerance(3) 1000V (1) AbsoluteMaximum Ratingsarelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsareconditionsforwhichthe deviceisfunctional,butdo notensurespecificperformancelimits.Forensuredspecificationsand testconditionssee theElectrical Characteristics.The ensuredspecificationsapplyonlyforthetestconditionslisted.Some performancecharacteristicsmay degrade when thedeviceisnotoperatedunderthelistedtestconditions. (2) The maximum power dissipationmust be deratedatelevatedtemperaturesand isdictatedby TJmax (maximum junctiontemperature), θJA (packagejunctiontoambientthermalresistance),and TA (ambienttemperature).The maximum allowablepower dissipationatany temperatureisPDmax = (TJmax -TA)/θJA orthenumber givenintheAbsoluteMaximum Ratings,whicheverislower. (3) Human body model,1.5kΩ inserieswith100pF. Recommended OperatingConditions SupplyVoltage(VCC ) ±5VDC to±6VDC Gain Range ±1 to±10 AmbientOperatingTemperatureRange (TA) -55°C to+125°C QualityConformance Inspection MIL-STD-883,Method 5005,Group A Subgroup Description Temp (C)

1 Statictestsat +25

2 Statictestsat +125

3 Statictestsat -55

4 Dynamic testsat +25

5 Dynamic testsat +125

6 Dynamic testsat -55

7 Functionaltestsat +25

9 Switchingtestsat +25

10 Switchingtestsat +125

11 Switchingtestsat -55

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www.ti.com SNOSAQ2E –JULY 2005–REVISED MARCH 2013 LMH6702 ElectricalCharacteristicsDC Parameters(1)(2) The followingconditionsapply,unlessotherwisespecified. R L = 100Ω,VCC = ±5VDC ,AV = +2 feedbackresistor(RF)= 250Ω,gainresistor(RG )= 250Ω Sub-Symbol Parameter Conditions Notes Min Max Unit groups IBN InputBiasCurrent,Noninverting -15 +15 μA 1,2 -21 +21 μA 3 IBI InputBiasCurrent,Iverting -30 +30 μA 1,2 -34 +34 μA 3 VIO InputOffsetVoltage -4.5 +4.5 mV 1,3 -6.0 +6.0 mV 2 ICC SupplyCurrent,no load R L = ∞ 15 mA 1,2,3 PSSR Power SupplyRejectionRatio -VCC = -4.5Vto-5.0V, 45 dB 1,2,3 +VCC = +4.5V to+5.0V (1) The algebraicconvention,whereby themost negativevalueisa minimum and most positiveisa maximum, isused inthistable. Negativecurrentshallbe definedas conventialcurrentflowoutofa deviceterminal. (2) Pre and PostirradiationlimitsareidenticaltothoselistedundertheDC parametertablesabove.Postirradiationtestingisconductedat room temperature,+25°C, only.Testingisperformedas specifiedinMIL-STD-883 TestMethod 1019 ConditionA.The ELDRS-Free part isalsotestedperTestMethod 1019 ConditionsD. LMH6702 ElectricalCharacteristicsAC Parameters (1)(2) The followingconditionsapply,unlessotherwisespecified. R L = 100Ω,VCC = ±5VDC ,AV = +2 feedbackresistor(RF)= 250Ω,gainresistor(RG )= 250Ω Sub-Symbol Parameter Conditions Notes Min Max Unit groups HD 3 3rdHarmonicDistortion 2VPP at20MHz -62 dBc 4 GFPL Gain FlatnessPeaking 0.1MHz to75MHz, VO < 0.5VPP 0.4 dB 4 GFPH Gain FlatnessPeaking > 75MHz, VO < 0.5VPP 2.0 dB 4 GFRH Gain FlatnessRolloff 75MHz to125MHz, VO <0.5VPP 0.2 dB 4 HD 2 2nd HarmonicDistortion 2VPP at20MHz -52 dBc 4 (1) The algebraicconvention,whereby themost negativevalueisa minimum and most positiveisa maximum, isused inthistable. Negativecurrentshallbe definedas conventialcurrentflowoutofa deviceterminal. (2) These parametersarenotpostirradiationtested. Copyright© 2005–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LMH6702QML

FREQUENCY (Hz) GAIN (dB) -430 -380 -330 -280 -230 -180 -130 -80 -30 PHASE (° ) AV = -1 AV = -10 AV = -4 AV = -2 VOUT = 2VPP R F = 237: R L = 100: PHASE GAIN LMH6702QML SNOSAQ2E –JULY 2005–REVISED MARCH 2013 www.ti.com LMH6702 ElectricalCharacteristicsDriftValues Parameters(1) The followingconditionsapply,unlessotherwisespecified. R L = 100Ω,VCC = ±5VDC ,AV = +2 feedbackresistor(RF)= 250Ω,gainresistor(RG )= 250Ω "Deltanotrequiredon B levelproduct.DeltarequiredforS-levelproductatGroup B5 only,oras specifiedon theInternal ProcessingInstruction(IPI)." Sub-Symbol Parameter Conditions Notes Min Max Unit groups IBN InputBiasCurrentNoninverting -0.3 +0.3 μA 1 IBI InputBiasCurrentInverting -3.0 +3.0 μA 1 VIO InputOffsetVoltage -0.3 +0.3 mV 1 (1) The algebraicconvention,whereby themost negativevalueisa minimum and most positiveisa maximum, isused inthistable. Negativecurrentshallbe definedas conventialcurrentflowoutofa deviceterminal. Figure3. InvertingFrequency Response

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TIME (ns) -1.5 -0.5 0.5 1.5 VOUT (V) VO = 2VPP R L = 100: AV = -2 AV = +2 0 100M 200M 300M 400M 500M GAIN (dB) FREQUENCY (Hz) AV = +4 VO = 2VPP R F = 237: GAIN PHASE 50: 1k: 100: -250 -200 -150 -100 -50 100 150 PHASE (° ) 50: 0 200M 400M 600M 800M 1G GAIN (dB) FREQUENCY (Hz) AV = +2 VO = 2VPP R F = 237: GAIN PHASE 1k: 100: 100: -250 -200 -150 -100 -50 100 150 PHASE (° ) 50: 1k: 50: 10M 100M 1G 10G FREQUENCY (Hz) GAIN (dB) VOUT = 0.5 VPP AV = 2 R F = 232: -270 -216 -162 -108 -54 PHASE (° ) 1M 10M 100M 1G FREQUENCY (Hz) GAIN (dB) VO = 2VPP R L = 100: R F = 237: AV = +1 AV = +2 AV = +10 AV = +4 GAIN PHASE AV = +2 AV = +4 AV = +1 -250 -200 -150 -100 -50 100 150 PHASE (° ) 1M 10M 100M 1G FREQUENCY (Hz) GAIN (dB) -430 -380 -330 -280 -230 -180 -130 -80 -30 PHASE (° ) AV = -1 AV = -10 AV = -4 AV = -2 VOUT = 2VPP R F = 237: R L = 100: PHASE GAIN LMH6702QML www.ti.com SNOSAQ2E –JULY 2005–REVISED MARCH 2013 TypicalPerformance Characteristics (TA = 25°C, VS = ±5V,R L = 100Ω,R F = 237Ω;UnlessSpecified). Non-InvertingFrequency Response InvertingFrequency Response Figure4. Figure5. Small SignalBandwidth Frequency Response forVariousR L’s,A V = +2 Figure6. Figure7. Frequency Response forVariousR L’s,A V = +4 Step Response, 2VPP Figure8. Figure9. Copyright© 2005–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LMH6702QML

-40 -15 10 35 60 85 110 135 -10 IBI (µA) TEMPERATURE (° C) UNIT 1 UNIT 3 UNIT 2 -40 -15 10 35 60 85 110 135 -12 -11 -10 IBN (µA) TEMPERATURE (° C) UNIT 1 UNIT 3 UNIT 2 1 10 100 1k 10k C L (pF) 100 R S (:) SETTLING TIME (ns R S 0.05% SETTLING 0.1% SETTLING AV = -1 R L = 1k: -40 -15 10 35 60 85 110 135 -3.5 -2.5 -1.5 0.5 VOS (mV) TEMPERATURE (° C) UNIT 1 UNIT 3 UNIT 2 -0.5 0 10 20 30 40 50 60 VOUT (V) TIME (ns) AV = +2 VOUT = 6VPP R L = 100:2 1 10 100 1k TIME (ns) 0.001 0.01 0.1 SETTLING ERROR (%) R L = 100: LMH6702QML SNOSAQ2E –JULY 2005–REVISED MARCH 2013 www.ti.com TypicalPerformance Characteristics(continued) (TA = 25°C, VS = ±5V,R L = 100Ω,R F = 237Ω;UnlessSpecified). Step Response, 6VPP PercentSettlingvs.Time Figure10. Figure11. R S and SettlingTime vs.C L InputOffsetfor3 RepresentativeUnits Figure12. Figure13. InvertingInputBias for3 RepresentativeUnits Non-InvertingInputBias for3 RepresentativeUnits Figure14. Figure15.

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-1.5 1.5 VOUT (V) -0.03 -0.02 -0.01 0.01 0.02 0.03 DP (° ) PAL R F = 237: R L = 150: DG DP 0 0.6 1.2 -0.009 -0.006 -0.003 0.003 0.006 0.009 DG (%) -1.5 1.5 VOUT (V) -0.03 -0.02 -0.01 0.01 0.02 0.03 DG (%) NTSC R F = 237: R L = 150: DG DP 0 0.6 1.2-0.6-1.2 DP (° ) -0.006 -0.004 -0.002 0.002 0.004 0.006 0.3 0.9-0.3-0.9 10k 1M 10M 100M 1G FREQUENCY (Hz) 100 GAIN (dB) 100k VS = ±5V R L = 100: MAG PHASE 110 120 120 160 180 140 100 200 220 PHASE (° ) 1000 100 1k 10k 100k 1M FREQUENCY (Hz) 100 10M INVERTING CURRENT VOLTAGE NON-INVERTING CURRENT NOISE VOLTAGE (nV/ Hz) NOISE CURRENT (pA/ Hz) CMRR/PSRR (dB) -55 -45 -35 -25 -15 LOG 1k 10k 100k 1M 10M FREQUENCY (Hz) 100M + PSRR - PSRR R O CMRR VS = ±5V R L = 100: LMH6702QML www.ti.com SNOSAQ2E –JULY 2005–REVISED MARCH 2013 TypicalPerformance Characteristics(continued) (TA = 25°C, VS = ±5V,R L = 100Ω,R F = 237Ω;UnlessSpecified). Noise CMRR, PSRR, R OUT Figure16. Figure17. Transimpedance DG/DP (NTSC) Figure18. Figure19. DG/DP (PAL) Figure20. Copyright© 2005–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LMH6702QML

+5V -5V C POS 6.8µF R G R F .01µF 6.8µF C NEG .01µF R T 25: 0.1µF C SS SELECT R T TO YIELD DESIRED R IN = RT||RG AV = VOUT VIN R F R G LMH6702 VOUT+ VIN +5V -5V C POS 6.8µF R G R F .01µF 6.8µF C NEG .01µF R IN 0.1µF C SS AV = 1 +RF/RG = VOUT /VIN LMH6702QML SNOSAQ2E –JULY 2005–REVISED MARCH 2013 www.ti.com APPLICATION SECTION FEEDBACK RESISTOR Figure21. Recommended Non-InvertingGain Circuit Figure22. Recommended InvertingGain Circuit The LMH6702 achievesitsexcellentpulseand distortionperformanceby usingthecurrentfeedbacktopology. The loopgainfora currentfeedbackop amp, and hence thefrequencyresponse,ispredominantlysetby the feedbackresistorvalue.The LMH6702 isoptimizedforuse witha 237Ω feedbackresistor.Using lowervalues can leadtoexcessiveringinginthepulseresponsewhilea highervaluewilllimitthebandwidth.ApplicationNote OA-13 SNOA366 discussesthisindetailalongwiththeoccasionswhere a differentR F mightbe advantageous. HARMONIC DISTORTION The LMH6702 has been optimizedforexceptionallylow harmonic distortionwhiledrivingvery demanding resistiveor capacitiveloads.Generally,when used as the inputamplifierto veryhighspeed flashADCs, the distortionsintroducedby the converterwilldominate over the low LMH6702 distortions.The capacitorC SS , shown acrossthesuppliesinFigure21 and Figure22,iscriticaltoachievingthelowest2nd harmonicdistortion. For absoluteminimum distortionlevels,itisalsoadvisableto keep the supplydecouplingcurrents(ground connectionstoC POS ,and C NEG inFigure21 and Figure22) separatefrom theground connectionstosensitive inputcircuitry(such as R G , R T, and R IN ground connections).Splittingthe ground plane in thisfashionand separatelyroutingthehighfrequencycurrentspikeson thedecouplingcaps back tothepower supply(similarto "StarConnection"layouttechnique)ensuresminimum couplingback to the inputcircuitryand resultsinbest harmonicdistortionresponse(especially2nd orderdistortion).

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• C IN ADC R S 1 10 100 FREQUENCY (MHz) -90 -80 -70 -60 -50 -40 -30 HD2 (dBc) AV = +2 R L = 100: VO = 2VPP C POS & CNEG REMOVED C POS & CNEG INCLUDED LMH6702QML www.ti.com SNOSAQ2E –JULY 2005–REVISED MARCH 2013 Ifthislayouttechniquehas notbeen observedon a particularapplicationboard,designermay actuallyfindthat supplydecouplingcaps couldadverselyaffectHD2 performanceby increasingthecouplingphenomenon already mentioned.Figure23 below shows actualHD2 dataon a boardwhere thegroundplaneis"shared"between the supplydecouplingcapacitorsand therestofthecircuit.Once thesecapacitorsareremoved,theHD2 distortion levelsreducesignificantly,especiallybetween 10MHz-20MHz, as shown inFigure23 below: Figure23. Decoupling CurrentAdverse Effecton a Board withShared Ground Plane At theseextremelylow distortionlevels,thehighfrequencybehaviorofdecouplingcapacitorsthemselvescould be significant.Ingeneral,lowervaluedecouplingcaps tendtohave higherresonancefrequenciesmaking them more effectiveforhigherfrequencyregions.A particularapplicationboardwhichhas been laidoutcorrectlywith ground returns"split"to minimizecoupling,would benefitthe most by having low value and highervalue capacitorsparalleledtotakeadvantageoftheeffectivebandwidthofeach and extendlow distortionfrequency range. CAPACITIVE LOAD DRIVE Figure24 shows a typicalapplicationusingtheLMH6702 todrivean ADC. Figure24. InputAmplifiertoADC The seriesresistor,R S, between the amplifieroutputand the ADC inputiscriticalto achievingbest system performance.Thisloadcapacitance,ifapplieddirectlytotheoutputpin,can quicklyleadtounacceptablelevels of ringingin the pulse response.The plotof "RS and SettlingTime vs. C L" in the TypicalPerformance Characteristicssectionisan excellentstartingpointforselectingR S.The valuederivedinthatplotminimizesthe stepsettlingtimeintoa fixeddiscretecapacitiveloadwiththe outputdrivinga verylightresistiveload(1kΩ). Sensitivitytocapacitiveloadingisgreatlyreducedonce theoutputisloadedmore heavily.Therefore,forcases where the outputis heavilyloaded,R S value may be reduced.The exact value may best be determined experimentallyforthesecases. Copyright© 2005–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LMH6702QML

SNOSAQ2E –JULY 2005–REVISED MARCH 2013 www.ti.com In applicationswhere the LMH6702 isreplacingthe CLC409, care must be takenwhen the deviceislightly loaded and some capacitanceispresentat the output.Due to the much higherfrequencyresponse of the LMH6702 compared to the CLC409, therecouldbe increasedsusceptibilityto low valueoutputcapacitance (parasiticorinherenttotheboardlayoutorotherwisebeingpartoftheoutputload).As alreadymentioned,this susceptibilityis most noticeablewhen the LMH6702's resistiveload is light.Parasiticcapacitancecan be minimizedby carefullayout.Additionof an outputsnubber R-C networkwillalsohelpby increasingthe high frequencyresistiveloading. Referringback toFigure24,itmust be notedthatseveraladditionalconstraintsshouldbe consideredindriving thecapacitiveinputofan ADC. There isan optiontoincreaseR S,band-limitingattheADC inputforeithernoise or Nyquistband-limitingpurposes.IncreasingR S too much, however,can inducean unacceptablylargeinput glitchdue to switchingtransientscouplingthroughfrom the "convert"signal.Also,C IN isoftentimesa voltage dependentcapacitance.Thisinputimpedance non-linearitywillinducedistortiontermsthatwillincreaseas R S is increased.Only slightadjustmentsup ordown fromtherecommended R S valueshouldthereforebe attemptedin optimizingsystemperformance. DC ACCURACY AND NOISE Example below shows theoutputoffsetcomputationequationforthenon-invertingconfigurationusingthetypical biascurrentand offsetspecificationsforAV = + 2: OutputOffset:VO = (±IBN ·R IN ± VIO)(1+ R F/RG )± IBI ·R F Where R IN istheequivalentinputimpedance on thenon-invertinginput. Example computationforAV = +2,R F = 237Ω,R IN = 25Ω: A good design,however,shouldincludea worstcase calculationusingMin/Max numbers in the data sheet tables,inordertoensure"worstcase"operation. Furtherimprovementintheoutputoffsetvoltageand driftispossibleusingthecompositeamplifiersdescribedin polarityforthe currentfeedbacktopology.Itisnot possible,therefore,to canceltheireffectsby matchingthe sourceimpedance forthetwo inputs(asiscommonly done formatched inputbiascurrentdevices). The totaloutputnoiseiscomputed ina similarfashiontotheoutputoffsetvoltage.Usingtheinputnoisevoltage and thetwo inputnoisecurrents,theoutputnoiseisdevelopedthroughthesame gainequationsforeach term but combined as the square rootof the sum of squared contributingelements.See ApplicationNote OA-12 SNOA375 fora fulldiscussionofnoisecalculationsforcurrentfeedbackamplifiers. PRINTED CIRCUIT LAYOUT Generally,a good highfrequencylayoutwillkeep power supplyand groundtracesaway fromtheinvertinginput and outputpins.Parasiticcapacitanceson thesenodes toground willcause frequencyresponsepeakingand possiblecircuitoscillations(see ApplicationNote OA-15 SNOA367 formore information).Texas Instruments suggeststhefollowingevaluationboardsas a guideforhighfrequencylayoutand as an aidindevicetestingand characterization: Device Package EvaluationBoard PartNumber LMH6702QMLMF SOT-23-5 CLC730216 LMH6702QMLMA PlasticSOIC CLC730227

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www.ti.com SNOSAQ2E –JULY 2005–REVISED MARCH 2013 Table1.RevisionHistory Date Revision Section Originator ChangesReleased 07/12/05 A New CorporateformatRelease R. Malone 1 MDS datasheetconvertedincorporatedata sheetformat.Added referencetoQMLV productsand DriftTable.MDS MNLMH6702 –X, Rev.1A0 willbe archived. 09/28/05 B Features,OrderingInformationTable R. Malone Added radiationreferencetoFeatures,Rad and Notes NSID & SMD toOrderingTableand Note 5 to AC & DC Electricaltables.Note tonotesection. 11/07/05 C Update AC electrical's and Notes R. Malone Added notetoAC electrical's and notesection. LMH6702QML RevisionB datasheetwillbe archived. 07/26/2011 D Update Features,OrderingInformation LarryM. Added 'HighDose Rate'300 krad(Si)and and Footnotes ELDRS Free300 krad(Si).DeletedNS Part numbers LMH6702J-QML and LMH6702WG- QML. Added NS Partnumber LMH6702WGFLQMLV.Modified note. LMH6702QML RevisionC datasheetwillbe archived. 10/05/2011 E Update OrderingInformation,and KirbyK.. Added NS Partnumber LMH6702JFLQMLV Footnotes 300 krad(Si).Modifiednoteand note.Revision D datasheetwillbe archived. 03/18/2013 E All - Changed layoutofNationalData SheettoTI format Copyright© 2005–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LMH6702QML

www.ti.com 5-Nov-2015 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples 5962-0254601VPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LMH6702J-QV 5962-02546 01VPA Q ACO 01VPA Q >T 5962-0254601VZA ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LMH6702 WGQMLV Q 5962-02546 01VZA ACO 01VZA >T 5962F0254601VPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LMH6702JFQV 5962F02546 01VPA Q ACO 01VPA Q >T 5962F0254601VZA ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LMH6702 WGFQMLV Q 5962F02546 01VZA ACO 01VZA >T LMH6702J-QMLV ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LMH6702J-QV 5962-02546 01VPA Q ACO 01VPA Q >T LMH6702JFQMLV ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LMH6702JFQV 5962F02546 01VPA Q ACO 01VPA Q >T LMH6702WG-QMLV ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LMH6702 WGQMLV Q 5962-02546 01VZA ACO 01VZA >T LMH6702WGFQMLV ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LMH6702 WGFQMLV Q 5962F02546 01VZA ACO 01VZA >T

www.ti.com 5-Nov-2015 Addendum-Page 2 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LMH6702QML, LMH6702QML-SP :

• Catalog: LMH6702QML
• Space: LMH6702QML-SP

www.ti.com 5-Nov-2015 Addendum-Page 3 NOTE: Qualified Version Definitions:

• Catalog - TI's standard catalog product
• Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application

www.ti.com J08A (Rev M)

www.ti.com WG10A (Rev H)

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