THS1401_15 TI1 | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 28
Technical content
SLAS248D − DECEMBER 1999 − REVISED SEPTEMBER 2005 /C0049/C0052/C0262/C0066/C0105/C0116/C0044 /C0049/C0047/C0051/C0047/C0056 /C0077/C0083/C0080/C0083/C0044 /C0068/C0083/C0080/C0262/C0067/C0079/C0077/C0080/C0065/C0084/C0073/C0066/C0076/C0069 /C0065/C0078/C0065/C0076/C0079/C0071/C0262/C0084/C0079/C0262/C0068/C0073/C0071/C0073/C0084/C0065/C0076 /C0067/C0079/C0078/C0086/C0069/C0082/C0084/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0073/C0078/C0084/C0069/C0082/C0078/C0065/C0076 /C0082/C0069/C0070/C0069/C0082/C0069/C0078/C0067/C0069 /C0065/C0078/C0068 /C0080/C0071/C0065 /C0084/C0072/C0083/C0049/C0052/C0048/C0049 /C0084/C0072/C0083/C0049/C0052/C0048/C0051 /C0084/C0072/C0083/C0049/C0052/C0048/C0056
FEATURES
/C006814-Bit Resolution /C00681, 3, and 8 MSPS Speed Grades Available /C0068Differential Nonlinearity (DNL) ±0.6 LSB Typ /C0068Integral Nonlinearity (INL) ±1.5 LSB Typ /C0068Internal Reference /C0068Differential Inputs /C0068Programmable Gain Amplifier /C0068µP-Compatible Parallel Interface /C0068Timing Compatible With TMS320C6000 DSP /C00683.3-V Single Supply /C0068Power-Down Mode /C0068Monolithic CMOS Design
APPLICATIONS
/C0068xDSL Front Ends /C0068Communication /C0068Industrial Control /C0068Instrumentation /C0068Automotive
DESCRIPTION
The THS1401, THS1403, and THS1408 are 14-bit, 1/3/8 MSPS, single supply analog-to-digital converters (ADCs) with an internal reference, differential inputs, programmable input gain, and an on-chip sample-and-hold amplifier. Implemented with a CMOS process, the device has outstanding price/performance and power/speed ratios. The THS1401, THS1403, and THS1408 are designed for use with 3.3-V systems, and with a high-speed µP- compatible parallel interface, making them the first choice for solutions based on high-performance DSPs such as the TI TMS320C6000 series. The THS1401, THS1403, and THS1408 are available in a TQFP-48 package in standard commercial and industrial temperature ranges. The THS1401, THS1403, and THS1408 are also available in a PQFP-48 package in automotive temperature range, and the THS1408 is available in a PQFP-48 package in military temperature range. PGA 0..7 dB REF 14-Bit ADC Buffer 14 15 CONTROL LOGIC REF+ REF− IN+ IN− D[13:0] + OV bit A[1:0] CLK 1.5 V BG VBG CS WR OE /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 All trademarks are the property of their respective owners. www.ti.com www.ti.com Copyright 1999−2005, Texas Instruments Incorporated /C0079/C0110 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0109/C0112/C0108/C0105/C0097/C0110/C0116 /C0116/C0111 /C0077/C0073/C0076/C0262/C0080/C0082/C0070/C0262/C0051/C0056/C0053/C0051/C0053/C0044 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115 /C0097/C0114/C0101 /C0116/C0101/C0115/C0116/C0101/C0100 /C0117/C0110/C0108/C0101/C0115/C0115 /C0111/C0116/C0104/C0101/C0114/C0119/C0105/C0115/C0101 /C0110/C0111/C0116/C0101/C0100/C0046 /C0079/C0110 /C0097/C0108/C0108 /C0111/C0116/C0104/C0101/C0114 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115/C0044 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
/C0084/C0072/C0083/C0049/C0052/C0048/C0049 /C0084/C0072/C0083/C0049/C0052/C0048/C0051 /C0084/C0072/C0083/C0049/C0052/C0048/C0056 SLAS248D − DECEMBER 1999 − REVISED SEPTEMBER 2005 www.ti.com ABSOLUTE MAXIMUM RATINGS Over operating free-air temperature range unless otherwise noted.(1) (1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Terminal Functions TERMINAL I/O DESCRIPTIONNAME NO. I/O DESCRIPTION A[1:0] 40, 41 I Address input AGND 7,8, 44, 45, 46 Analog ground AV DD 2, 43, 47 Analog power supply CLK 32 I Clock input CML 4 Reference midpoint. This pin requires a 0.1-µF capacitor to AGND. CS 37 I Chip select input. Active low. DGND 9, 15, 25, 33, 34 Digital ground DV DD 14, 20, 26, 30, 31, 42 Digital power supply 28, 29 I/O Data inputs/outputs NC 38, 39 No connection; do not use. Reserved. IN+ 48 I Positive differential analog input IN− 1 I Negative differential analog input OE 35 I Output enable. Active low. OV 10 O Out-of-range output REF+ 5 O Positive reference output. This pin requires a 0.1-µF capacitor to AGND. REF− 6 O Negative reference output. This pin requires a 0.1-µF capacitor to AGND. VBG 3 I Reference input. This pin requires a 1-µF capacitor to AGND. WR 36 I Write signal. Active low.
/C0084/C0072/C0083/C0049/C0052/C0048/C0049 /C0084/C0072/C0083/C0049/C0052/C0048/C0051 /C0084/C0072/C0083/C0049/C0052/C0048/C0056 SLAS248D − DECEMBER 1999 − REVISED SEPTEMBER 2005 www.ti.com WR36 IN− AV DD VBG CML REF+ REF− AGND AGND DGND OV D13 D12 NC NC 47 46 45 44 4348 42 IN+ AV AGND AGND AGND DGND 40 39 3841 37 CS D11 D10 PFB AND PHP PACKAGE (TOP VIEW) DD AV DD DV DD DV DD DV DD NC − No internal connection OE DGND DGND CLK DV DD DV DD DV DD DGND 14 15 16 17 1813 19 21 22 23 20 24 AVAILABLE OPTIONS PACKAGED DEVICE TA TQFP (PFB) PQFP (Power Pad) (PHP) 0°C to 70°C THS1401CPFB, THS1403CPFB, THS1408CPFB −40°C to 85°C THS1401IPFB, THS1403IPFB, THS1408IPFB −40°C to 125°C — THS1401QPHP , THS1403QPHP , THS1408QPHP −55°C to 125°C — THS1408MPHP
/C0084/C0072/C0083/C0049/C0052/C0048/C0049 /C0084/C0072/C0083/C0049/C0052/C0048/C0051 /C0084/C0072/C0083/C0049/C0052/C0048/C0056 SLAS248D − DECEMBER 1999 − REVISED SEPTEMBER 2005 www.ti.com THERMAL CHARACTERISTICS (1) TYP UNIT Thermal resistance, junction-to-ambient, ΘJA PFB package 85.9 °C/WThermal resistance, junction-to-ambient, ΘJA PHP package 28.8 °C/W Thermal resistance, junction-to-case, ΘJC PFB package 19.6 °C/WThermal resistance, junction-to-case, ΘJC PHP package 0.79 °C/W (1)Thermal resistance is modeled data, is not production tested, and is given for informational purposes only. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT Supply voltage, AVDD , DVDD 3 3.3 3.6 V High level digital input, VIH 2 3.3 V Low level digital input, VIL 0 0.8 V Load capacitance, CL 5 15 pF THS1401 0.1 1 1 MHz Clock frequency, fCLK THS1403 0.1 3 3 MHzClock frequency, fCLK THS1408 0.1 8 8 MHz Clock duty cycle C- and I-suffix 40 50 60 %Clock duty cycle Q- and M-suffix 45 50 55 % C-suffix 0 25 70 Operating free-air temperature I-suffix −40 25 85 °COperating free-air temperature Q-suffix −40 25 125 M-suffix −55 25 125
/C0084/C0072/C0083/C0049/C0052/C0048/C0049 /C0084/C0072/C0083/C0049/C0052/C0048/C0051 /C0084/C0072/C0083/C0049/C0052/C0048/C0056 SLAS248D − DECEMBER 1999 − REVISED SEPTEMBER 2005 www.ti.com
ELECTRICAL CHARACTERISTICS
Over operating free-air temperature range, AVDD = DVDD = 3.3V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Power Supply IDDA Analog supply current AV DD = 3.6 V 81 90 mA IDDD Digital supply current DV DD = 3.6 V 5 10 mA Power AV DD = DVDD = 3.6 V 270 360 mW Power down current 20 µA DC Characteristics Resolution 14 Bits DNL Differential nonlinearity ±0.6 ±1 LSB THS1401 ±1.5 ±2.5 THS1403C/I ±1.5 ±2.5 INL Integral nonlinearity THS1403Q Best fit ±2 ±3 LSBINL Integral nonlinearity THS1408C/I Best fit ±3 ±5 LSB THS1408Q/M ±3.5 ±7.5 Offset error IN+ = IN−, PGA = 0 dB 0.3 %FSR Gain error C and I suffix PGA = 0 dB 1 %FSR Gain error Q and M suffix PGA = 0 dB 1.75 %FSR AC Characteristics ENOB Effective number of bits 11.2 11.5 Bits THS1401/3/8 fi = 100 kHz −81 THD Total harmonic distortion THS1403/8 fi = 1 MHz −78 dBTHD Total harmonic distortion THS1408 fi = 4 MHz −77 dB THS1401/3/8 fi = 100 kHz 72 SNR Signal-to-noise ratio THS1403/8 fi = 1 MHz 70 72 dBSNR Signal-to-noise ratio THS1408 fi = 4 MHz 71 dB THS1401/3/8 fi = 100 kHz 70 SINAD Signal-to-noise ratio + distortionTHS1403/8 fi = 1 MHz 69 70 dBSINAD Signal-to-noise ratio + distortion THS1408 fi = 4 MHz 70 dB THS1401/3/8 fi = 100 kHz 80 SFDR Spurious-free dynamic range THS1403C/I, THS1408C/I fi = 1 MHz 73 80 dBSFDR Spurious-free dynamic range THS1403Q, THS1408Q/M fi = 1 MHz 71 80 dB THS1408 fi = 4 MHz 80 Analog input bandwidth 140 MHz
/C0084/C0072/C0083/C0049/C0052/C0048/C0049 /C0084/C0072/C0083/C0049/C0052/C0048/C0051 /C0084/C0072/C0083/C0049/C0052/C0048/C0056 SLAS248D − DECEMBER 1999 − REVISED SEPTEMBER 2005 www.ti.com ELECTRICAL CHARACTERISTICS (Cont.) Over operating free-air temperature range, AVDD = DVDD = 3.3V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Reference Voltage Bandgap voltage, internal mode 1.425 1.5 1.575 V Input impedance 40 kΩ Positive reference voltage, REF+ 2.5 V Negative reference voltage, REF− 0.5 V Reference difference, ∆REF, REF+ − REF− 2 V Accuracy, internal reference 5% Temperature coefficient 40 ppm/°C Voltage coefficient 200 ppm/V Analog Inputs Positive analog input, IN+ 0 AV DD V Negative analog input, IN− 0 AV DD V Analog input voltage difference ∆AIN = IN+ − IN−, VREF = REF+ − REF− −VREF VREF V Input impedance 25 kΩ PGA range 0 7 dB PGA step size 1 dB PGA gain error ±0.25 dB Digital Inputs VIH High-level digital input 2 V VIL Low-level digital input 0.8 V Input capacitance 5 pF Input current ±1 µA Digital Outputs VOH High-level digital output IOH = 50 µA 2.6 V VOL Low-level digital output IOL = 50 µA 0.4 V IOZ Output current, high impedance ±10 µA Clock Timing (CS low) THS1401 0.1† 1 1 MHz fCLK Clock frequency THS1403 0.1† 3 3 MHzfCLK Clock frequency THS1408 0.1† 8 8 MHz td Output delay time 25 ns Latency 9.5 Cycles † This parameter is not production tested for Q- and M-suffix devices.
appear on the digital output 9.5 clock cycles after the input signal was sampled. Figure 1. Sample Timing it to a data bus. The output buffers are enabled by driving the OE input low. The timing of the control signals is described in the following sections.
NOTE: All timing parameters refer to a 50% level. Figure 2. Read Timing
NOTE: All timing parameters refer to a 50% level. Figure 3. Write Timing
values (were applicable) show the state after a power-on reset. Table 1. Conversion Result Register, Address 0, Read The output can be configured for 2s complement or straight binary format (see D11/control register). Table 2. PGA Gain Register, Address 1, Read/Write The PGA gain is determined by writing to G2−0. Gain (dB) = 1dB × G2−0. max = 7dB. The range of G2−0 is 0 to 7. Table 3. Offset Register, Address 2, Read/Write The offset correction range is from –128 to 127 LSB. This value is added to the conversion results from the ADC.
/C0084/C0072/C0083/C0049/C0052/C0048/C0049 /C0084/C0072/C0083/C0049/C0052/C0048/C0051 /C0084/C0072/C0083/C0049/C0052/C0048/C0056 SLAS248D − DECEMBER 1999 − REVISED SEPTEMBER 2005 www.ti.com PRINCIPLES OF OPERATION Table 4. Control Register, Address 3, Read Table 5. Control Register, Address 3, Write RES Reserved Must be set to 0.
APPLICATION INFORMATION
The THS1401/3/8 ADCs have a fully differential input. A differential input is advantageous with respect to SNR, SFDR, and THD performance because the signal peak-to-peak level is 50% of a comparable single-ended input. There are three basic input configurations: /C0068Fully differential /C0068Transformer coupled single-ended to differential /C0068Single-ended fully differential configuration In this configuration, the ADC converts the difference (∆IN) of the two input signals on IN+ and IN−. 100 pF IN+ IN− THS1401/3/8 22 Ω 100 pF 22 Ω Figure 19. Differential Input
/C0084/C0072/C0083/C0049/C0052/C0048/C0049 /C0084/C0072/C0083/C0049/C0052/C0048/C0051 /C0084/C0072/C0083/C0049/C0052/C0048/C0056 SLAS248D − DECEMBER 1999 − REVISED SEPTEMBER 2005 www.ti.com The resistors and capacitors on the inputs decouple the driving source output from the ADC input and also serve as first order low pass filters to attenuate out of band noise. The input range on both inputs is 0 V to AVDD . The full-scale value is determined by the voltage reference. The positive full-scale output is reached, if ∆IN equals ∆REF, the negative full-scale output is reached, if ∆IN equals −∆REF. ∆IN [V] OUTPUT −∆REF − full scale 0 0 ∆REF + full scale transformer coupled single-ended to differential configuration If the application requires the best SNR, SFDR, and THD performance, the input should be transformer coupled. The signal amplitude on both inputs of the ADC is one half as high as in a single-ended configuration thus increasing the ADC ac performance. 100 pF IN+ IN− THS1401/3/8 CML R 100 pF 22 Ω 22 Ω + 1 µF 0.1 µF Figure 20. Transformer Coupled R = n2 Rs, where Rs is the source impedance and n is the transformer winding ratio. single-ended configuration In this configuration, the input signal is level shifted by ∆REF/2.
/C0084/C0072/C0083/C0049/C0052/C0048/C0049 /C0084/C0072/C0083/C0049/C0052/C0048/C0051 /C0084/C0072/C0083/C0049/C0052/C0048/C0056 SLAS248D − DECEMBER 1999 − REVISED SEPTEMBER 2005 www.ti.com internal/external reference operation The THS1401/3/8 ADC can either be operated using the built-in band gap reference or using an external precision reference in case very high dc accuracy is needed. The REF+ and REF+ outputs are given by: REF /C0041/C0043VBG /C04661 /C00412 3/C0467and REF– If the built-in reference is used, VBG equals 1.5 V which results in REF+ = 2.5 V, REF− = 0.5 V and ∆REF = 2 V. The internal reference can be disabled by writing 1 to D12 (REF) in the control register (address 3). The band gap reference is then disconnected and can be substituted by a voltage on the VBG pin. programmable gain amplifier The on-chip programmable gain amplifier (PGA) has eight gain settings. The gain can be changed by writing to the PGA gain register (address 1). The range is 0 to 7dB in steps of one dB. out of range indication The OV output of the ADC indicates an out of range condition. Every time the difference on the analog inputs exceeds the differential reference, this signal is asserted. This signal is updated the same way as the digital data outputs and therefore subject to the same pipeline delay. offset compensation With the offset register it is possible to automatically compensate system offset errors, including errors caused by additional signal conditioning circuitry. If the offset compensation is enabled (D7 (OFF) in the control register), the value in the offset register (address 2) is automatically added to the output of the ADC. In order to set the correct value of the offset compensation register, the ADC result when the input signal is 0 must be read by the host processor and written to the offset register (address 2). test modes The ADC core operation can be tested by selecting one of the available test modes (see control register description). The test modes apply various voltages to the differential input depending on the setting in the control register. digital I/O The digital inputs and outputs of the THS1401/3/8 ADC are 3-V CMOS compatible. In order to avoid current feed back errors, the capacitive load on the digital outputs should be as low as possible (50 pF max). Series resistors (100 Ω) on the digital outputs can improve the performance by limiting the current during output transitions. The parallel interface of the THS1401/3/8 ADC features 3-state buffers, making it possible to directly connect it to a data bus. The output buffers are enabled by driving the OE input low. Refer to the read and write timing diagrams in the parameter measurement information section for information on read and write access.
/C0084/C0072/C0083/C0049/C0052/C0048/C0049 /C0084/C0072/C0083/C0049/C0052/C0048/C0051 /C0084/C0072/C0083/C0049/C0052/C0048/C0056 SLAS248D − DECEMBER 1999 − REVISED SEPTEMBER 2005 www.ti.com
Revision History
DATE REV PAGE SECTION DESCRIPTION 1 — Updated page 1 format and layout. 1 — Moved funtional block diagram from page 2. 2 — Moved Terminal Function table from page 3. 2 — Moved Absolute Maximum table from page 4. 3 — Moved package pinout from page 1. 9/05 D 3 — Moved Ordering Options table from page 2.9/05 D
15 Principles of Operation
Table 1. In section 2s complement: 8191 /C0068IN = − /C0068REF − 1 LSB changed to
16 Principles of Operation
Table 5. In section TM2−0: Test Mode: 010 = IN+ at VREF /2, IN− at REF−, NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
www.ti.com 15-Oct-2015 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples 5962-0051101NXD ACTIVE HTQFP PHP 48 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -55 to 125 0051101 NXD THS1401CPFB OBSOLETE TQFP PFB 48 TBD Call TI Call TI 0 to 70 THS1401IPFB ACTIVE TQFP PFB 48 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TJ1401 THS1401IPFBG4 ACTIVE TQFP PFB 48 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TJ1401 THS1403CPFB OBSOLETE TQFP PFB 48 TBD Call TI Call TI 0 to 70 THS1403IPFB ACTIVE TQFP PFB 48 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TJ1403 THS1408CPFB OBSOLETE TQFP PFB 48 TBD Call TI Call TI 0 to 70 THS1408IPFB ACTIVE TQFP PFB 48 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TJ1408 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
www.ti.com 15-Oct-2015 Addendum-Page 2 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF THS1408, THS1408M :
- Catalog: THS1408
- Enhanced Product: THS1408-EP , THS1408-EP
- Military: THS1408M NOTE: Qualified Version Definitions:
- Catalog - TI's standard catalog product
- Enhanced Product - Supports Defense, Aerospace and Medical Applications
- Military - QML certified for Military and Defense Applications
MTQF019A – JANUARY 1995 – REVISED JANUARY 1998 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PFB (S-PQFP-G48) PLASTIC QUAD FLATPACK 4073176/B 10/96 Gage Plane 0,13 NOM 0,25 0,45 0,75 Seating Plane 0,05 MIN 0,17 0,27 SQ 7,20 6,80 5,50 TYP SQ8,80 9,20 1,05 0,95 1,20 MAX 0,08 0,50 M0,08 0°–7° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Falls within JEDEC MS-026
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic”are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated