NTD4858N ONSEMI | Alldatasheet

Document overview

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Technical content

Features

  • /C0259Trench Technology
  • /C0259Low RDS(on) to Minimize Conduction Losses
  • /C0259Low Capacitance to Minimize Driver Losses
  • /C0259Optimized Gate Charge to Minimize Switching Losses
  • /C0259These are Pb-Free Devices

Applications

  • /C0259VCORE Applications
  • /C0259DC-DC Converters
  • /C0259High/Low Side Switching MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Symbol Value Unit Drain-to-Source Voltage VDSS 25 V Gate-to-Source Voltage VGS ±20 V Continuous Drain Current R/C0113JA (Note 1) Steady State TA = 25°C ID 14 A TA = 85°C 10.9 Power Dissipation R/C0113JA (Note 1) TA = 25°C PD 2.0 W Continuous Drain Current R/C0113JA (Note 2) TA = 25°C ID 11.2 A TA = 85°C 8.7 Power Dissipation R/C0113JA (Note 2) TA = 25°C PD 1.3 W Continuous Drain Current R/C0113JC (Note 1) TC = 25°C ID 73 A TC = 85°C 56 Power Dissipation R/C0113JC (Note 1) TC = 25°C PD 54.5 W Pulsed Drain Current tp=10/C0109s TA = 25°C IDM 146 A Current Limited by Package TA = 25°C IDmaxPkg 45 A Operating Junction and Storage Temperature TJ, TSTG -55 to +175 Source Current (Body Diode) IS 45 A Drain to Source dV/dt dV/dt 6 V/ns Single Pulse Drain-to-Source Avalanche Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V, IL = 15 Apk, L = 1.0 mH, RG = 25 /C0087/C0041 EAS 112.5 mJ Lead Temperature for Soldering Purposes (1/8” from case for 10 s) TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. MARKING DIAGRAMS & PIN ASSIGNMENTS http://onsemi.com V(BR)DSS RDS(ON) MAX I D MAX 25 V 6.2 m/C0087 @ 10 V 73 A 9.3 m/C0087 @ 4.5 V G S N-CHANNEL MOSFET D See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.

ORDERING INFORMATION

Y = Year WW = Work Week 4858N = Device Code G = Pb-Free Package CASE 369AA DPAK (Bent Lead) STYLE 2 CASE 369D IPAK (Straight Lead DPAK) 1 2 1 2 3 CASE 369AC

3 IPAK

(Straight Lead) 2 3

http://onsemi.com THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit Junction-to-Case (Drain) R/C0113JC 2.75 °C/W Junction-to-TAB (Drain) R/C0113JC-TAB 3.5 Junction-to-Ambient – Steady State (Note 1) R/C0113JA 73.5 Junction-to-Ambient – Steady State (Note 2) R/C0113JA 116 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 /C0109A 25 V Drain-to-Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ 22 mV/°C Zero Gate Voltage Drain Current IDSS VGS = 0 V, VDS = 20 V TJ = 25°C 1.0 /C0109A TJ = 125°C 10 Gate-to-Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±100 nA ON CHARACTERISTICS (Note 3) Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 /C0109A 1.45 2.5 V Negative Threshold Temperature Coefficient VGS(TH)/TJ 5.3 mV/°C Drain-to-Source On Resistance RDS(on) VGS = 10 V ID = 30 A 5.2 6.2 m/C0087 VGS = 4.5 V ID = 30 A 7.3 9.3 Forward Transconductance gFS VDS = 1.5 V, ID = 15 A 55 S CHARGES AND CAPACITANCES Input Capacitance CISS VGS = 0 V, f = 1.0 MHz, VDS = 12 V 1563 pFOutput Capacitance COSS 405 Reverse Transfer Capacitance CRSS 200 Total Gate Charge QG(TOT) VGS = 4.5 V, VDS = 15 V, ID = 30 A 12.8 19.2 nC Threshold Gate Charge QG(TH) 1.3 Gate-to-Source Charge QGS 4.7 Gate-to-Drain Charge QGD 5.2 Total Gate Charge QG(TOT) VGS = 10 V, VDS = 15 V, ID = 30 A 25.7 nC SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time td(ON) VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 /C0087 12.6 ns Rise Time tr 20.2 Turn-Off Delay Time td(OFF) 16.4 Fall Time tf 5.1 Turn-On Delay Time td(ON) VGS = 11.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 /C0087 7.7 ns Rise Time tr 17.3 Turn-Off Delay Time td(OFF) 23.8 Fall Time tf 2.8 3. Pulse Test: pulse width /C0118 300 /C0109s, duty cycle /C0118 2%. 4. Switching characteristics are independent of operating junction temperatures.

http://onsemi.com ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter UnitMaxTypMinTest ConditionSymbol DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 30 A TJ = 25°C 0.87 1.2 V TJ = 125°C 0.73 Reverse Recovery Time tRR VGS = 0 V, dIS/dt = 100 A//C0109s, IS = 30 A 11.6 nsCharge Time ta 7.8 Discharge Time tb 3.7 Reverse Recovery Charge QRR 3.0 nC PACKAGE PARASITIC VALUES Source Inductance LS TA = 25°C 2.49 nH Drain Inductance, DPAK LD 0.0164 Drain Inductance, IPAK LD 1.88 Gate Inductance LG 3.46 Gate Resistance RG 0.7 /C0087 3. Pulse Test: pulse width /C0118 300 /C0109s, duty cycle /C0118 2%. 4. Switching characteristics are independent of operating junction temperatures.

http://onsemi.com TYPICAL PERFORMANCE CURVES Figure 13. Thermal Response Device Package Shipping† NTD4858NT4G DPAK (Pb-Free) 2500 / Tape & Reel NTD4858N-1G IPAK (Pb-Free)

75 Units / Rail

NTD4858N-35G IPAK Trimmed Lead (3.5 /C0034 0.15 mm) (Pb-Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

http://onsemi.com PACKAGE DIMENSIONS STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN DPAK (SINGLE GAUGE) CASE 369AA-01 ISSUE A D A B RV S F L 2 PL M0.13 (0.005) T E C U J -T- SEATING PLANE Z DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.235 0.245 5.97 6.22 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.025 0.035 0.63 0.89 E 0.018 0.024 0.46 0.61 F 0.030 0.045 0.77 1.14 J 0.018 0.023 0.46 0.58 L 0.090 BSC 2.29 BSC R 0.180 0.215 4.57 5.45 S 0.024 0.040 0.60 1.01 V 0.035 0.050 0.89 1.27 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 123 H 0.386 0.410 9.80 10.40 H 5.80 0.228 2.58 0.101 1.6 0.063 6.20 0.244 3.0 0.118 6.172 0.243 /C0466mm inches/C0467SCALE 3:1 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT*

http://onsemi.com PACKAGE DIMENSIONS

3 IPAK, STRAIGHT LEAD

D A K B RV F G 3 PL E C J H DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.235 0.245 5.97 6.22 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88 E 0.018 0.023 0.46 0.58 F 0.037 0.043 0.94 1.09 G 0.090 BSC 2.29 BSC H 0.034 0.040 0.87 1.01 J 0.018 0.023 0.46 0.58 K 0.134 0.142 3.40 3.60 R 0.180 0.215 4.57 5.46 V 0.035 0.050 0.89 1.27 W 0.000 0.010 0.000 0.25 NOTES: 1.. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2.. CONTROLLING DIMENSION: INCH. 3. SEATING PLANE IS ON TOP OF DAMBAR POSITION. 4. DIMENSION A DOES NOT INCLUDE DAMBAR POSITION OR MOLD GATE. W SEATING PLANE 0.13 (0.005) W STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN 123 V S A K -T- SEATING PLANE R B F G D 3 PL M0.13 (0.005) T C E J H DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.235 0.245 5.97 6.35 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88 E 0.018 0.023 0.46 0.58 F 0.037 0.045 0.94 1.14 G 0.090 BSC 2.29 BSC H 0.034 0.040 0.87 1.01 J 0.018 0.023 0.46 0.58 K 0.350 0.380 8.89 9.65 R 0.180 0.215 4.45 5.45 S 0.025 0.040 0.63 1.01 V 0.035 0.050 0.89 1.27 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. Z IPAK (STRAIGHT LEAD DPAK) CASE 369D-01 ISSUE B ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 NTD4858N/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative