ICS552-01 RENESAS | Alldatasheet

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OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS ICS552-01 IDT™ / ICS™ OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS 1 ICS552-01 REV H 051310

Description

The ICS552-01 produces 8 low-skew copies of the multiple input clock or fundamental, parallel-mode crystal. Unlike other clock drivers, these parts do not require a separate oscillator for the input. Using IDT’s patented Phase-Locked Loop (PLL) to multiply the input frequency, it is ideal for generating and distributing multiple high-frequency clocks. This is a single chip used for 3 different applications: I CS552-01 (A mode) — an Oscillator mutiplier 2) I CS552-01 (B mode) — a Dual 1:4 buffer 3) ICS552-01 (C mode) — a 1:8 Oscillator buffer Features (all)

  • Packaged as 20-pin SSOP (QSOP)
  • Pb-free packaging
  • Operating voltages of 3.0 V to 5.5 V
  • Industrial temperature available Features (specific) ICS552-01 (for A mode)
  • Contains on-chip multiplier with selections of x1, .33, x2, x2.66, x3, x3.33, x4, x4.66, x5, and x6
  • Power-down and Tri-state modes ICS552-01 (for B mode)
  • Up to 200 MHz clock input/output at 3.3 V
  • Low skew of 250 ps maximum for any bank of four
  • Inputs can be connected together for a 1 to 8 buffer with 250 ps skew between any outputs
  • Non-inverting buffer mode
  • Ideal for clock networks
  • Output Enable mode tri-states outputs
  • Full CMOS output swing with 25 mA output drive capability at TTL levels
  • Advanced, low power, sub-micron CMOS process ICS552-01 (for C mode)
  • Use with 25 MHz crystal for networking
  • Use with 27 MHz crystal for MPEG ICS552-01 (for A and C modes)
  • Input frequency of 10.0 to 27.0 MHz
  • Provides 8 low-skew outputs (<250 ps)
  • Output clock duty cycle of 40/60 at 3.3 V NOTE: The ICS552A-01 is recommended for new designs Block Diagram (ICS552-01—A mode) Crystal Buffer/ Crystal Oscillator GND VDD PLL Multiplier S3:S0 CLK1 CLK8 CLK7 CLK6 CLK5 CLK4 CLK3 CLK2 10.0 to 27.0 MHz crystal or clock input External capacitors are required with a crystal input.

OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS CLOCK MULTIPLIER AND BUFFER IDT™ / ICS™ OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS 2 ICS552-01 REV H 051310 Pin Assignment (ICS552-01—A mode) Multiplier Select Table Pin Descriptions (ICS552-01—A mode) DC S0 X1/ICLK DC VDD GND S3 VDD GNDCLK1 CLK5 CLK2 CLK6 CLK3 CLK7 CLK4 CLK8 20-pin (150 mil) SSOP (QSOP) S3 S2 S1 S0 Multiplier 0 0 0 0 Power Down 0001 x 1 0010 x 1 . 3 3 3 0011 x 2 0100 x 2 . 6 6 6 0101 x 3 0110 x 3 . 3 3 3 0111 x 4 1000 x 5 1 0 0 1 x4.66 1010 x 6 1 1 0 1 Tri-state all Pin Number Pin Name Pin Type Pin Description 1 DC — Do not connect. 2 X2 XO Crystal connection. Connect to a 10 - 27 MHz fundamental mode crystal. 3X 1 / I C L K X I Crystal connection. Connect to a 10 - 27 MHz fundamental mode crystal or clock. 4 VDD Power Connect to +3.3 V or 5 V. Decouple with pin 6. Must be same as other VDDs. 5 S2 Input Multiplier Select pin 2 per table above. 6 GND Power Connect to ground. 7 CLK1 Output Output clock 1. 8 CLK2 Output Output clock 2. 9 CLK3 Output Output clock 3. 10 CLK4 Output Output clock 4.

11 S1 Input Multiplier Select pin 1 per table above

12 CLK5 Output Output clock 5. 13 CLK6 Output Output clock 6. 14 GND Power Connect to ground.

15 S3 Input Multiplier Select pin 3 per table above

16 VDD Power Connect to +3.3 V or 5 V. Decouple with pin 14. Must be same as other VDDs. 17 CLK7 Output Output clock 7. 18 CLK8 Output Output clock 8. 19 DC — Do not connect.

20 S0 Input Multiplier Select pin 0 per table above

OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS CLOCK MULTIPLIER AND BUFFER IDT™ / ICS™ OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS 3 ICS552-01 REV H 051310 Block Diagram (ICS552-01—B mode) Pin Assignment (ICS552-01—B mode) Clock Output Select Table (ICS552-01—B mode) S1 S0 Mode 0 0 QA1:4 and QB1:4 running

01 T e s t m o d e

1 0 OE. All outputs in high impedance 1 1 QA1:4 only. QB1:4 stopped low Control Logic INA QA1 QB4 QB3 QB2 QB1 QA4 QA3 QA2 INB INA S0 DC DC INB VDD VDD GND VDD VDD GNDQA1 QB1 QA2 QB2 QA3 QB3 QA4 QB4 20-pin (150 mil) SSOP (QSOP)

OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS CLOCK MULTIPLIER AND BUFFER IDT™ / ICS™ OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS 4 ICS552-01 REV H 051310 Pin Descriptions (ICS552-01—B mode) KEY: CI = clock input with pull-up resistor; I = input with internal pull-up resistor. Pin Number Pin Name Pin Type Pin Description 1 INA CI Input to buffer A. Out puts QA1:4 will be the same frequency. Internal pull-up resistor. 2 DC — Do not connect. 3 DC — Do not connect. 4 VDD Power Connect to +3.3 V or 5.0 V. Must be same as other VDDs. 5V D D P o w e r Connect to +3.3 V or 5.0 V. Must be same as other VDDs. 6 GND Power Connect to ground. 7 QA1 Output Output 1 from buffer A. 8 QA2 Output Output 2 from buffer A. 9 QA3 Output Output 3 from buffer A. 10 QA4 Output Output 4 from buffer A. 11 S1 I Mode Select pin 1. Selects mode for outputs. Must be at GND for all clocks on. Internal pull-up resistor. 12 QB1 Output Output 1 from buffer B. 13 QB2 Output Output 2 from buffer B. 14 GND Power Connect to ground. 15 VDD Power Connect to +3.3 V or 5.0 V. Must be same as other VDDs. 16 VDD Power Connect to +3.3 V or 5.0 V. Must be same as other VDDs. 17 QB3 Output Output 3 from buffer B. 18 QB4 Output Output 4 from buffer B. 19 INB CI Input to buffer B. Outputs QA1:4 will be the same frequency. Internal pull-up resistor. 20 S0 I Mode Select pin 0. Selects mode for outputs. Must be at GND for all clocks on. Internal pull-up resistor.

OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS CLOCK MULTIPLIER AND BUFFER IDT™ / ICS™ OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS 5 ICS552-01 REV H 051310 Block Diagram (ICS552-01—C mode) Pin Assignment (ICS552-01—C mode) Crystal Oscillator GND VDD CLK1 CLK8 CLK7 CLK6 CLK5 CLK4 CLK3 CLK2 10.0 to 27.0 MHz crystal input External capacitors are required with a crystal input. DC VDD DC GND VDD GND VDD VDD GNDCLK1 CLK5 CLK2 CLK6 CLK3 CLK7 CLK4 CLK8 20-pin (150 mil) SSOP (QSOP) VDD

OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS CLOCK MULTIPLIER AND BUFFER IDT™ / ICS™ OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS 6 ICS552-01 REV H 051310 Pin Descriptions (ICS552-01—C mode) Pin Number Pin Name Pin Type Pin Description 1 DC — Do not connect. 2 X2 XO Crystal connection. Connect to a 10 - 27 MHz fundamental mode crystal. 3 X1 XI Crystal connection. Connect to a 10 - 27 MHz fundamental mode crystal. 4 VDD Power Connect to +3.3 V or 5 V. Decouple with pin 6. Must be same as other VDDs. 5G N D P o w e r Connect to ground. 6 GND Power Connect to ground. 7 CLK1 Output Output clock 1. 8 CLK2 Output Output clock 2. 9 CLK3 Output Output clock 3. 10 CLK4 Output Output clock 4. 11 VDD Power Connect to +3.3 V or 5 V. Must be same as other VDDs. 12 CLK5 Output Output clock 5. 13 CLK6 Output Output clock 6. 14 GND Power Connect to ground. 15 VDD Power Connect to +3.3 V or 5 V. Must be same as other VDDs. 16 VDD Power Connect to +3.3 V or 5 V. Decouple with pin 14. Must be same as other VDDs. 17 CLK7 Output Output clock 7. 18 CLK8 Output Output clock 8. 19 DC — Do not connect. 20 VDD Power Connect to +3.3 V or 5 V. Must be same as other VDDs.

OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS CLOCK MULTIPLIER AND BUFFER IDT™ / ICS™ OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS 7 ICS552-01 REV H 051310 External Components Series Termination Resistor Clock output traces over one inch should use series termination. To series terminate a 50 trace (a commonly used trace impedance), place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20. Decoupling Capacitors As with any high-performance mixed-signal IC, the ICS552-01 must be isolated from system power supply noise to perform optimally. Decoupling capacitors of 0.01µF must be connected between each VDD and GND on pins 4 and 6, and 16 and 14. Other VDDs and GNDs can be connected to these pins or directly to their respective ground planes. Crystal Load Capacitors The device crystal connections should include pads for small capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. Because load capacitance can only be increased in this trimming process, it is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) been the crystal and device. Crystal capacitors must be connected from each of the pins X1 and X2 to ground. The value (in pF) of these crystal caps should equal (C L -12 pF)*2. In this equation, CL= crystal load capacitance in pF . Example: For a crystal with a 18 pF load ca pacitance, two 12 pF capacitors should be used. For a clock input, connect it X1/ICLK and leave X2 unconnected (floating). PCB Layout Recommendations For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) Each 0.01µF decoupling capacitor should be mounted on the component side of the boar d as close to the VDD pin as possible. No vias should be used bet ween decoupling capacitor and VDD pin. The PCB t race to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. 2) The external crystal should be mounted just next to th e device with short traces. The X1 and X2 traces should not be routed next to each other with minimum s paces, instead they should be separated and away from other traces. 3) T o minimize EMI, the 33 series termination resistor (if needed) should be placed close to the clock output. An optimum layout is one with all components on the same side of the board, minimizing vias through other sig nal layers.

OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS CLOCK MULTIPLIER AND BUFFER IDT™ / ICS™ OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS 8 ICS552-01 REV H 051310 Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS552-01. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Recommended Operation Conditions Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature -40 to +85C Parameter Condition Min. Typ. Max. Units Supply Voltage, VDD Referenced to GND 7 V Inputs Referenced to GND -0.5 VDD+0.5 V Clock Outputs Referenced to GND -0.5 VDD+0.5 V Storage Temperature -65 150 C Soldering Temperature Max 10 seconds 260 C Junction Temperature 125 C Parameter Min. Typ. Max. Units Ambient Operating Temperature (commercial) 0 +70 C Ambient Operating Temperature (industrial) -40 +85 C Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD 3.0 5.5 V Input High Voltage V IH ICLK VDD/2+1 VDD/2 V Input Low Voltage V IL ICLK VDD/2 VDD/2-1 V Input High Voltage V IH S3:S0 2 V Input Low Voltage V IL S3:S0 0.8 V Output High Voltage V OH VDD = 3.3 V, IOH = -8 mA 2.4 V Output Low Voltage V OL VDD = 3.3 V, IOL = 8 mA 0.4 V Output High Voltage V OH VDD = 3.3 V or 5 V, IOH = -8 mA VDD-0.4 V Short Circuit Current I OS VDD = 3.3 V, each output ±50 mA

OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS CLOCK MULTIPLIER AND BUFFER IDT™ / ICS™ OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS 9 ICS552-01 REV H 051310 Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature -40 to +85 C Thermal Characteristics Operating Supply Current I DD at 3.3 V, no load, 25 MHz in, x4 35 mA Operating Supply Current I DD at 5 V, no load, 25 MHz in, x4 59 mA Power-down Supply Current IDD S3:S0 = 0 (GND) 55 µA Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency F IN Fundamental crystal 10 27 MHz Input clock– non-buffered mode 10 27 MHz Input clock– buffered mode only 10 200 MHz Output Rise Time t OR 0.8 to 2.0 V 1.5 ns Output Fall Time t OF 2.0 to 0.8 V 1.5 ns Duty Cycle at VDD/2 40 50 60 % Output-to-Output Skew All modes, Rising edges at VDD/2 250 ps Absolute Jitter Mode A, Deviation from Mean ±75 ps One Sigma Clock Period Jitter Mode A 25 ps Parameter Symbol Conditions Min. Typ. Max. Units Thermal Resistance Junction to Ambient JA Still air 135 C/W JA 1 m/s air flow 93 C/W JA 3 m/s air flow 78 C/W Thermal Resistance Junction to Case JC 60 C/W Parameter Symbol Conditions Min. Typ. Max. Units

OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS CLOCK MULTIPLIER AND BUFFER IDT™ / ICS™ OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS 10 ICS552-01 REV H 051310 Package Outline and Package Dimensions (20-pin SSOP, 150 Mil. Wide Body) Package dimensions are kept current with JEDEC Publication No. 95

Ordering Information

"LF"or “LN” suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. Part / Order Number Marking Shipping Packaging Package Temperature 552R-01LN 552R-01LN Tubes 20-pin SSOP 0 to +70 C 552R-01LNT 552R-01LN Tape and Reel 20-pin SSOP 0 to +70 C 552R-01ILF 552R-01ILF Tubes 20-pin SSOP -40 to +85 C 552R-01ILFT 552R-01ILF Tape and Reel 20-pin SSOP -40 to +85 C INDEX AREA 1 2 D E1 E SEATING PLANE AA2 e - C - b aaa C c L Millimeters Inches Symbol Min Max Min Max A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 b 0.20 0.30 0.008 0.012 c 0.18 0.25 0.007 0.010 D 8.55 8.75 0.337 0.344 E 5.80 6.20 0.228 0.244 E1 3.80 4.00 0.150 0.157 e .635 Basic .025 Basic L 0.40 1.27 0.016 0.050

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