54LVX3245

54LVX3245 NSC | Alldatasheet

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n Bidirectional interface between 3V and 5V buses n Inputs compatible with TTL level n 3V data flow at A port and 5V data flow at B port n Outputs source/sink 24 mA n Available in ceramic DIP and Flatpack packages n Implements proprietary EMI reduction circuitry n Functionally compatible with the 54 series 245 n Standard Microcircuit Drawing (SMD) 5962-9860501 Ordering Code Order Number Package Number Package Description 54LVX3245J-QML J24F 24-Lead Ceramic Dual-in-line 54LVX3245W-QML W24C 24-Lead Cerpack Logic Symbol Connection Diagram TRI-STATE® is a registered trademark of National Semiconductor Corporation. DS101018-1 Pin Assignment for CDIP and Cerpack DS101018-2 January 1999 54LVX3245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs © 1999 National Semiconductor Corporation DS101018 www.national.com

T/R Transmit/Receive Input A0–A 7 Side A Inputs or TRI-STATE Outputs B0–B 7 Side B Inputs or TRI-STATE Outputs Truth Table Inputs Outputs OE T/R L L Bus B Data to Bus A L H Bus A Data to Bus B H X HIGH-Z State H = High Voltage Level L = Low Voltage Level I= Immaterial Logic Diagram DS101018-4 www.national.com 2

Absolute Maximum Ratings(Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V CCA ,V CCB ) −0.5V to +7.0V DC Input Voltage (VI) @ OE, T/R −0.5V to VCCB + 0.5V DC Input/Output Voltage (VI/O) @ A(n) −0.5V to V CCA + 0.5V @ B(n) −0.5V to V CCB + 0.5V DC Input Diode Current (IIN) @ OE , T/R ±20 mA DC Output Diode Current (IOK ) ±50 mA DC Output Source or Sink Current (IO ) ±50 mA DC V CC or Ground Current per Output Pin (ICC or IGND ) ±50 mA and Max Current@ ICCA ±200 mA @ ICCB ±200 mA Storage Temperature Range (TSTG ) −65˚C to +150˚C Recommended Operating Conditions(Note 2) Supply Voltage VCCA 2.7V to 3.6V VCCB 4.5V to 5.5V Input Voltage (VI) @ OE , T/R 0V to VCCB Input/Output Voltage (VI/O) @ A(n) 0V to V CCA @ B(n) 0V to V CCB Free Air Operating Temperature (TA) −55˚C to +125˚C Minimum Input Edge Rate (Δt/ΔV) 8 ns/V VIN from 30% to 70% of VCC VCC @ 3.0V, 4.5V, 5.5V Note 1:The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be op- erated at these limits. The parametric values defined in the Electrical Charac- teristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for ac- tual device operation. Note 2:Unused Pins (inputs and I/Os) must be held HIGH or LOW. They may not float. Symbol Parameter VCCA (V) VCCB (V) TA = −55˚C to +125˚C Units ConditionsGuaranteed Limits VIHA Minimum High Level Input Voltage A(n), T/R, 3.6 5.0 2.0 V V OUT ≤ 0.1V or ≥ VCC − 0.1VOE 2.7 5.0 2.0 VIHB B(n) 3.3 4.5 2.0 3.3 5.5 2.0 VILA Maximum Low Level Input Voltage A(n), T/R, 3.6 5.0 0.8 V V OUT ≤ 0.1V or ≥ VCC −0.1VOE 2.7 5.0 0.8 VILB B(n) 3.3 4.5 0.8 3.3 5.5 0.8 VOHA Minimum High Level 2.7 4.5 2.6 V I OH = −100 µA Output Voltage 3.6 5.5 3.5 I OH = −100 µA 2.7 4.5 2.2 I OH = −12 mA 3.0 4.5 2.4 I OH = −12 mA 3.0 4.5 2.2 I OH = −24 mA VOHB 2.7 4.5 4.4 V I OH = −100 µA 3.6 5.5 5.4 I OH = −100 µA 3.0 4.5 3.7 I OH = −24 mA VOLA Maximum Low Level 2.7 4.5 0.1 V I OL =100 µA Output Voltage 3.6 5.5 0.1 I OL =100 µA 2.7 4.5 0.4 I OL = 12 mA 3.0 4.5 0.3 I OL = 12 mA 3.0 4.5 0.4 I OL = 24 mA VOLB 2.7 4.5 0.1 V I OL = 100 µA 3.6 5.5 0.1 I OL = 100 µA 3.0 4.5 0.4 I OL = 24 mA www.national.com3

(V) VCCB (V) TA = −55˚C to +125˚C Units ConditionsGuaranteed Limits IIN Maximum Input VI = VCCB , GND Leakage Current 3.6 5.5 ±1.0 µA @ OE, T/R IOZA Maximum TRI-STATE T/R = 0.0V, Output Leakage 3.6 5.5 ±5.0 µA OE = VIH @ A(n) VO = VCCA , GND IOZB Maximum TRI-STATE T/R = 3.6V, Output Leakage 3.6 5.5 ±5.0 µA OE = VIH @ B(n) VO = VCCB , GND ΔICC Maximum B(n) 3.6 5.5 1.5 mA V I = VCCB − 2.1V, T/R = 0.0V ICCT /Input@ A(n), T/R, 3.6 5.5 500 µA V I = VCCA − 0.6V OE T/R = 3.6V ICCA Quiescent VCCA B(n)= VCCB or GND Supply Current 3.6 5.5 10 µA OE = GND, T/R = GND ICCB Quiescent VCCB A(n) = VCCA or GND Supply Current 3.6 5.5 40 µA OE = GND, T/R = VCCA VOLPA Quiet Output Maximum 3.3 5.0 1.1 V (Note 4) (Note 5) VOLPB Dynamic VOL 3.3 5.0 1.6 VOLVA Quiet Output Minimum 3.3 5.0 -0.8 V (Note 4) (Note 5) VOLVB Dynamic VOL 3.3 5.0 -1.1 Note 3:Maximum test duration 2.0 ms, one output loaded at a time. Note 4:Worst case package. Note 5:Max number of outputs defined as (n). Data inputs are driven 0V to VCC level; one output at GND. www.national.com 4

TA = −55˚C to +125˚C T A = −55˚C to +125˚C Units C L = 50 pF C L = 50 pF VCCA = 3.3V (Note 7) VCCA =2.7V VCCB = 5.0V (Note 6) VCCB =5.0V (Note 6) Min Max Min Max tPHL Propagation Delay 1.0 8.5 1.0 9.0 ns tPLH A to B 1.0 8.5 1.0 9.0 tPHL Propagation Delay 1.0 8.0 1.0 8.5 ns tPLH B to A 1.0 8.0 1.0 8.5 tPZL Output Enable 1.0 8.5 1.0 9.0 ns tPZH Time OE to B 1.0 8.5 1.0 9.0 tPZL Output Enable 1.0 9.5 1.0 10.5 ns tPZH Time OE to A 1.0 9.5 1.0 10.5 tPHZ Output Disable 1.0 7.5 1.0 7.5 ns tPLZ Time OE to B 1.0 7.5 1.0 7.5 tPHZ Output Disable 1.0 7.0 1.0 7.0 ns tPLZ Time OE to A 1.0 7.0 1.0 7.0 tOSHL Output to Output tOSLH Skew (Note 8) 1.5 1.5 ns Data to Output Note 6:Voltage Range 5.0V is 5.0V±0.5V. Note 7:Voltage Range 3.3V is 3.3V±0.3V. Note 8:Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The speci- fication applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL ) or LOW to HIGH (tOSLH ). Parameter guaranteed by design. Capacitance Symbol Parameter Max Units Conditions C IN Input Capacitance 10 pF V CC = Open C I/O Input/Output 12 pF V CCA = 3.3V Capacitance VCCB = 5.0V C PD Power Dissipation 50 pF V CCB = 5.0V Capacitance VCCA = 3.3V Note 9:C PD is measured at 10 MHz 8-Bit Dual Supply Translating Transceiver The LVX3245 is a dual supply device capable of bidirectional signal translation. This level shifting ability provides an effi- cient interface between low voltage CPU local bus with memory and a standard bus defined by 5V I/O levels. The device control inputs can be controlled by either the low volt- age CPU and core logic or a bus arbitrator with 5V I/O levels. Manufactured on a sub-micron CMOS process, the LVX3245 is suitable for mixed voltage applications such as systems using 3.3V memories which must interface with existing bus- ses or other components operating at 5.0V. DS101018-3 www.national.com5

Physical Dimensionsinches (millimeters) unless otherwise noted 24-Lead Ceramic DIP Package Number J24F 24-Lead Cerpack Package Number W24C www.national.com7

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 www.national.com 54LVX3245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.