SN54LVTH245A TI | Alldatasheet
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SN54LVTH245A, SN74LVTH245A 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS130P – MAY 1992 – REVISED APRIL 1999 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation /C0068Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V CC ) /C0068Support Unregulated Battery Operation Down to 2.7 V /C0068Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C /C0068Ioff and Power-Up 3-State Support Hot Insertion /C0068Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors /C0068Latch-Up Performance Exceeds 500 mA Per JESD 17 /C0068ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) /C0068Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Packages, and Ceramic (J) DIPs
description
These octal bus transceivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices are designed for asynchronous communication between data buses. They transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE ) input can be used to disable the devices so the buses are effectively isolated. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. When V CC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The SN54LVTH245A is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74LVTH245A is characterized for operation from –40°C to 85°C. Copyright 1999, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SN54LVTH245A ...J O R W PACKAGE SN74LVTH245A . . . DB, DW, OR PW PACKAGE (TOP VIEW) 321 2 0 1 9 9 10 11 12 13 DIR B6 OE GND VCC SN54LVTH245A . . . FK PACKAGE (TOP VIEW) DIR GND V CC OE
SN54LVTH245A, SN74LVTH245A 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS130P – MAY 1992 – REVISED APRIL 1999
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logic symbol† † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. OE 3EN2[AB] 3EN1[BA] DIR logic diagram (positive logic) DIR OE To Seven Other Channels
SN54LVTH245A, SN74LVTH245A 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS130P – MAY 1992 – REVISED APRIL 1999 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Voltage range applied to any output in the high-impedance † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This current flows only when the output is in the high state and VO > VCC . 3. The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions (see Note 4) SN54LVTH245A SN74LVTH245A UNIT MIN MAX MIN MAX UNIT VCC Supply voltage 2.7 3.6 2.7 3.6 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V VI Input voltage 5.5 5.5 V IOH High-level output current –24 –32 mA IOL Low-level output current 48 64 mA Δt/Δv Input transition rise or fall rate Outputs enabled 10 10 ns/V Δt/ΔVCC Power-up ramp rate 200 200 µs/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN54LVTH245A, SN74LVTH245A 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS130P – MAY 1992 – REVISED APRIL 1999
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electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS SN54LVTH245A SN74LVTH245A UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT VIK VCC = 2.7 V, II = –18 mA –1.2 –1.2 V VCC = 2.7 V to 3.6 V,IOH = –100 µA VCC –0.2 VCC –0.2 VOH VCC = 2.7 V, IOH = –8 mA 2.4 2.4 VVOH VCC =3V IOH = –24 mA 2 V VCC = 3 V IOH = –32 mA 2 VCC =27V IOL = 100 µA 0.2 0.2 VCC = 2.7 V IOL = 24 mA 0.5 0.5 VOL IOL = 16 mA 0.4 0.4 VVOL VCC =3V IOL = 32 mA 0.5 0.5 V VCC = 3 V IOL = 48 mA 0.55 IOL = 64 mA 0.55 Control inputs VCC = 3.6 V, VI = VCC or GND ±1 ±1 Control inputs VCC = 0 or 3.6 V, VI = 5.5 V 10 10 II VI = 5.5 V 20 20 µA A or B ports‡ VCC = 3.6 V VI = VCC 1 1 VI = 0 –5 –5 Ioff VCC = 0, VI or VO = 0 to 4.5 V ±100 µA VCC =3V VI = 0.8 V 75 75 II(hold) Ao rB ports VCC = 3 V VI = 2 V –75 –75 µAII(hold) A or B orts VCC = 3.6 V§, VI = 0 to 3.6 V 500 –750 µA IOZPU VCC = 0 to 1.5 V, VO = 0.5 V to 3 V, OE = don’t care ±100∗ ±100 µA IOZPD VCC = 1.5 V to 0, VO = 0.5 V to 3 V, OE = don’t care ±100∗ ±100 µA VCC = 3.6 V, Outputs high 0.19 0.19 ICC VCC = 3.6 V, IO = 0, Outputs low 5 5 mA VI = VCC or GND Outputs disabled 0.19 0.19 ΔICC ¶ VCC = 3 V to 3.6 V, One input at VCC – 0.6 V, Other inputs at VCC or GND 0.2 0.2 mA C i VI = 3 V or 0 4 4 pF C io VO = 3 V or 0 9 9 pF ∗ On products compliant to MIL-PRF-38535, this parameter is not production tested. † All typical values are at VCC = 3.3 V, TA = 25°C. ‡ Unused terminals are at VCC or GND. § This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. ¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
SN54LVTH245A, SN74LVTH245A 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS130P – MAY 1992 – REVISED APRIL 1999 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) SN54LVTH245A SN74LVTH245A PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 3.3 V ± 0.3 V VCC = 2.7 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V UNIT MIN MAX MIN MAX MIN TYP † MAX MIN MAX tPLH Ao rB Bo rA ns tPHL A or B B or A ns tPZH OE Ao rB ns tPZL OE A or B ns tPHZ OE Ao rB ns tPLZ OE A or B ns † All typical values are at VCC = 3.3 V, TA = 25°C.
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NOTES: A. C L includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω , tr ≤ 2.5 ns, tf≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms
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