54LS113DMQB

54LS113 NSC | Alldatasheet

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54LS113 Dual JK Edge-Triggered Flip-Flop June 1989 54LS113 Dual JK Edge-Triggered Flip-Flop General Description The 54LS113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the bistable will perform according to the Truth Table as long as mini- mum setup and hold times are observed. Input data is trans- ferred to the outputs on the falling edge of the clock pulse. Connection Diagram Dual-In-Line Package TL/F/10205–1 Order Number 54LS113DMQB, 54LS113FMQB or 54LS113LMQB See NS Package Number E20A, J14A or W14B Logic Symbol TL/F/10205–2 VCC e Pin 14 GND e Pin 7 Truth Table Inputs Output @ tn @ tn a 1 JK Q LL Q n LH L HL H HH Q n tn e Bit Time before Clock Pulse tn a 1 e Bit Time after Clock Pulse H e HIGH Voltage Level L e LOW Voltage Level Asynchronous Input: Low input to S D sets Q to HIGH level Set is independent of clock Pin Names Description J1, J2, K1, K2 Data Inputs CP1, CP 2 Clock Pulse Inputs (Active Falling Edge) SD1, S D2 Direct Set Inputs (Active LOW) Q1, Q2, Q 1, Q 2 Outputs C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Note) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 5.5V Operating Free Air Temperature Range 54LS b55§Ct o a125§C Storage Temperature Range b65§Ct o a150§C Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaran- teed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual operation. Recommended Operating Conditions Symbol Parameter 54LS113 Units Min Nom Max VCC Supply Voltage 4.5 5 5.5 V VIH High Level Input Voltage 2 V VIL Low Level Input Voltage 0.7 V IOH High Level Output Current b0.4 mA IOL Low Level Output Current 4 mA TA Free Air Operating Temperature b55 125 §C ts (H) Setup Time 20 nsts (L) J n or K n to CP n 20 th (H) Hold Time 0 nsth (L) J n or K n to CP n 0 tw (H) CPn Pulse Width 20 nstw (L) 15 tw (L) S Dn Pulse Width LOW 15 ns Electrical Characteristics over recommended operating free air temperature (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units(Note 1) VI Input Clamp Voltage V CC e Min, I I eb 18 mA b1.5 V VOH High Level V CC e Min, I OH e Max, 2.5 VOutput Voltage V IL e Max, V IH e Min VOL Low Level V CC e Min, I OL e Max, 0.4 VOutput Voltage V IH e Min, V IL e Max II Input Current V CC e Max, V I e 5.5V J, K 0.1 @ Max Input SD 0.3 mAVoltage CP 0.4 IIH High Level V CC e Max, V I e 2.7V J, K 20 Input Current SD 60 mA CP 80 IIL Low Level V CC e Max, V I e 0.5V J, K b30 b400 mAInput Current CP, SD b60 b800 IOS Short Circuit V CC e Max b20 b100 mAOutput Current (Note 2) ICC Supply Current V CC e Max (Note 3) 8 mA Note 1: All typicals are at V CC e 5V, T A e 25§C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 3: ICC is measured with all outputs open and all inputs grounded.

Switching Characteristics VCC ea 5.0V, T A ea 25§C (See Section 1 for test waveforms and output load) 54LS113 Symbol Parameter C L e 15 pF Units Min Max fmax Maximum Clock Frequency 30 MHz tPLH Propagation Delay 16 nstPHL CPn to Q n or Q n 24 tPLH Propagation Delay 16 nstPHL SDn to Q n or Q n 24 Logic Diagram (one half shown) TL/F/10205–3

Physical Dimensions inches (millimeters) Ceramic Leadless Chip Carrier Package (E) Order Number 54LS113LMQB 14-Lead Ceramic Dual-In-Line Package (J) Order Number 54LS113DMQB

54LS113 Dual JK Edge-Triggered Flip-Flop Physical Dimensions inches (millimeters) (Continued) 14-Lead Ceramic Flat Package (W) Order Number 54LS113FMQB LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

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