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深圳市富满电子有限公司 SHENZHEN FUMAN ELECTRONICS CO., LTD. 54HC164/74HC164(文件编号：S&CIC0464) 8 bit 串入并出移位寄存器 第 1 页 共 7 页  AND-Gated (Enable/Disable) Serial Inputs  Fully Buffered Clock and Serial Inputs  Direct Clear  Package Options Include Plastic Small-Outline (D) and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPS

DESCRIPTION

These 8-bit shift registers feature AND -gated serial inputs and an asynchronous clear (CLR) input. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high -level input enables the other input, which then determines the state of the first flip -flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum set up time requirements are met. Clocking occurs on the low -to-high-level transition of CLK. The 54HC164 is characterized for operation over the full military temperature range of –55℃ to 125℃. The 74HC164 is characterized for operation from -40℃ to 85℃. 54HC164…J OR W PACKAGE 54HC164…FK PACKAGE (TOP VIEW) 74HC164…D OR N PACKAGE 1 2 3 4 5 6 A B C D 654321 D C B A Title Number RevisionSize B Date: 4-Apr-2006 Sheet of File: E:\\规格书\\规格图\\规格图-0\\ZBO\\54HC164(74HC164).ddbDrawn By : 7 8 14A B QA QB QC QD GND CLOCK CLEAR QE QF QG QH VDD 1 2 3 4 5 6 A B C D 654321 D C B A Title Number RevisionSize B Date: 4-Apr-2006 Sheet of File: E:\\规格书\\规格图\\规格图-0\\ZBO\\54HC164(74HC164).ddbDrawn By : 123 9 10 11 12 13 1920 A B QA NC QB NC QC QD GND NC CLK CLR QE NC QF NC QG NC-NO internal connection QH VCC NC 1 2 3 4 5 6 A B C D 654321 D C B A Title Number RevisionSize B Date: 4-Apr-2006 Sheet of File: E:\\规格书\\规格图\\规格图-0\\ZBO\\54HC164(74HC164).ddbDrawn By : FUNCTION TABLE INPUTS OUTPUTS CLR CLK A B QA QB...QH L X X X X X X H H H H L L L H H X L L L QA0 QB0 QH0 H L L QAn QAn QAn QGn QGn QGn QA0,QBO,QH0=the level of QA,QB,or QH, respectively,before the indicated steady-state input conditions were established QAn,QGn=the level of QA or QG before the most recent transition of CLK:indicates a 1-bit shift

深圳市富满电子有限公司 SHENZHEN FUMAN ELECTRONICS CO., LTD. 54HC164/74HC164(文件编号：S&CIC0464) 8 bit 串入并出移位寄存器 第 2 页 共 7 页 LOGIC SYMBOLT 1 2 3 4 5 6 A B C D 654321 D C B A Title Number RevisionSize B Date: 4-Apr-2006 Sheet of File: E:\\规格书\\规格图\\规格图-0\\ZBO\\54HC164(74HC164).ddbDrawn By : C1/ R SRG 8 CLR CLK A B QA QB QC QD QE QF QG QH 1D&  This symbol is in accordance with ANS/IEEE Std 91-1984 and IEC publication 617-12.  Pin numbers shown are for the D, J, N, and W packages. LOGIC DIAGRAM (positive logic) 1 2 3 4 5 6 A B C D 654321 D C B A Title Number RevisionSize B Date: 4-Apr-2006 Sheet of File: E:\\规格书\\规格图\\规格图-0\\ZBO\\54HC164(74HC164).ddbDrawn By : R R R R R R R R CLK A B CLR 3 4 5 6 10 11 12 13 QA QB QC QD QE QF QG QH Pin numbers shown are for the D,J,N and W packages.

深圳市富满电子有限公司 SHENZHEN FUMAN ELECTRONICS CO., LTD. 54HC164/74HC164(文件编号：S&CIC0464) 8 bit 串入并出移位寄存器 第 3 页 共 7 页 TYPICAL CLEAR, SHIFT, AND CLEAR SEQUENCE 1 2 3 4 5 6 A B C D 654321 D C B A Title Number RevisionSize B Date: 5-Apr-2006 Sheet of File: E:\\新建文件夹\\E盘\\规格书\\规格图\\规格图-0\\ZBO\\54HC164(74HC164).ddbDrawn By : Clear Clear QH QG QF QE QD QC QB QA CLK B A CLR Serial Inputs Output Absolute maximum ratings over operating free-air temperature rangeT T Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyon d those indicated under “recommended operating conditions ” is not implied. Exposure to absolute -maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and out put current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51, except for through -hale packages, which use a trace length of zero.

深圳市富满电子有限公司 SHENZHEN FUMAN ELECTRONICS CO., LTD. 54HC164/74HC164(文件编号：S&CIC0464) 8 bit 串入并出移位寄存器 第 4 页 共 7 页 RECOMMENDED OPERATING CONDITIONS 54HC164 74HC164 UNIT MIN NOM MAX MIN NOM MAX Vcc Supply voltage 2 5 6 2 5 6 VIH High-level input voltage VIL Low-level input voltage VCC=2V 0 - 0.5 0 - 0.5 VCC=4.5V 0 - 1.35 0 - 1.35 VCC=6V 0 - 1.8 0 - 1.8 VI Input voltage 0 - VCC 0 VCC V VO Output voltage 0 - VCC 0 VCC V ttT Input transition (rise and fall) time VCC=2V 0 - 1000 0 - 1000 ns VCC=4.5V 0 - 500 0 - 500 VCC=6V 0 - 400 0 - 400 TA Operating free-air temperature -55 - 125 -40 - 85 ℃ T If this device is used in the threshold region (from V IL max=0.5V to VIHmin=1.5V), there is a potential to go into the wrong state from induced grounding, causing double clocking. Operating with the inputs at tt=1000ns and VCC=2V does not damage the device; however, functionally, the CLK inputs are not ensured while in the shift, count, or toggle operating modes. Electrical characteristics over recommended operating free -air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA=25℃ 54HC164 74HC164 UNIT MIN TYP MAX MIN MAX MIN MAX VOH VI=VIH or VIL IOH=-20uA V VOL VI=VIH or VIL IOL=20uA V II VI=VCC or 0 6V - ±0.1 ±100 - ±1000 - ±1000 nA ICC VI=VCC or 0, IO=0 6V - - 8 - 160 - 80 uA CI 2V to 6V - 3 10 - 10 - 10 pF

深圳市富满电子有限公司 SHENZHEN FUMAN ELECTRONICS CO., LTD. 54HC164/74HC164(文件编号：S&CIC0464) 8 bit 串入并出移位寄存器 第 5 页 共 7 页 Timing requirements over recommended operating free-air temperature range (unless otherwise noted) VCC TA=25℃ 54HC164 74HC164 UNIT MIN MAX MIN MAX MIN MAX fclock Clock frequency 2V 0 6 0 4.2 0 5 MHz 4.5V 0 31 0 21 0 25 6V 0 36 0 25 0 28 tW Pulse duration CLR low 2V 100 - 150 - 125 - ns 4.5V 20 - 30 - 25 - 6V 17 - 25 - 21 - CLK high or low 2V 80 - 120 - 100 - 4.5V 16 - 24 - 20 - 6V 14 - 20 - 18 - tsu Setup time before CLK Date 2V 100 - 150 - 125 - ns 4.5V 20 - 30 - 25 - 6V 17 - 25 - 21 - CLR inactive 2V 100 - 150 - 125 - 4.5V 20 - 30 - 25 - 6V 17 - 25 - 21 - th Hold time, data after CLK 2V 5 - 5 - 5 - ns 4.5V 5 - 5 - 5 - 6V 5 - 5 - 5 - Switching characteristics over recommended operating free -air temperature rang, C L=50pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC TA=25℃ 54HC164 74HC164 UNIT MIN TYP MAX MIN MAX MIN MAX fmax 2V 6 10 - 4.2 - 5 - MHz 4.5V 31 54 - 21 - 25 - 6V 36 62 - 25 - 28 - tPHL CLR Any Q 2V - 140 205 - 295 - 255 ns 4.5V - 28 41 - 59 - 51 6V - 24 35 - 51 - 46 tpd CLK Any Q 2V - 115 175 - 265 - 220 4.5V - 23 35 - 53 - 44 6V - 20 30 - 45 - 38 tt 2V - 38 75 - 110 - 95 ns 4.5V - 8 15 - 22 - 19 6V - 6 13 - 19 - 16

SHENZHEN FUMAN ELECTRONICS CO., LTD. NOTES: A. CL includes probe and test-fixture capacitance. generators having the following characteristics: PRR≤1MHz, ZO=50Ω, tr=6ns, tf=6ns. D. The outputs are measured one at a time with one input transition per measurement. E. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms

深圳市富满电子有限公司 SHENZHEN FUMAN ELECTRONICS CO., LTD. 54HC164/74HC164(文件编号：S&CIC0464) 8 bit 串入并出移位寄存器 第 7 页 共 7 页 PAD ASSIGNMENT 1 2 3 4 5 6 A B C D 654321 D C B A Title Number RevisionSize B Date: 6-Apr-2006 Sheet of File: E:\\规格书\\规格图\\规格图-0\\ZBO\\54HC164(74HC164).ddbDrawn By : A B QA QB QC QD GND CLOCK CLEARQEQFQGQH VDD Pad No Pad Name X Y 1 A -242.00 -53.50 2 B -250.00 252.00 3 QA -135.00 -188.50 4 QB 0.00 -188.50 5 QC 115.00 -188.50 6 QD 252.00 -188.50 7 GND 252.00 -73.50 8 CLOCK 241.85 41.50 9 CLEAR 252.00 180.50 10 QE 137.00 190.50 11 QF 2.00 190.50 12 QG -113.00 190.50 13 QH -250.00 190.50 14 VDD -250.00 61.50 附图： 1 2 3 4 5 6 A B C D 654321 D C B A Title Number RevisionSize B Date: 19-May -2006 Sheet of File: C:\\Documents and Settings\\user\\桌面\\520.ddb Drawn By : VDD QH QG QF QE CLR CLOCK GNDQDQCQBQABA VDD 1K104p 47uF 10K CPU74HC164 *此电阻需按不同的CPU输出信号 而作适当的调整。