74FCT273 NSC | Alldatasheet

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Y ICC reduced to 40.0 mA Y Ideal buffer for MOS microprocessor or memory Y Eight edge-triggered D flip-flops Y Buffered common clock Y Buffered, asynchronous master reset Y TTL input and output level compatible Y TTL levels accept CMOS levels Y IOL e 48 mA (Com), 32 mA (Mil) Y NSC 54/74FCT273 is pin and functionally equivalent to IDT 54/74FCT273 Y Military product compliant to MIL-STD-883 and Standard Military Drawing Ý5962-87656 Logic Symbols Connection Diagrams TL/F/10146–1 IEEE/IEC TL/F/10146–2 Pin Assignment for DIP, Flatpak and SOIC TL/F/10146–3 Pin Names Description D0 –D7 Data Inputs MR Master Reset CP Clock Pulse Input Q 0 –Q7 Data Outputs Pin Assignment for LCC TL/F/10146–4 FACTTM is a trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Mode Select-Function Table Operating Mode Inputs Outputs MR CP D n Qn Reset (Clear) L X X L Load ‘1’ H L HH Load ‘0’ H L LL H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial L e LOW-to-HIGH Transition Logic Diagram TL/F/10146–5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Terminal Voltage with Respect to GND TERM) 54FCT b0.5 to a7.0V 74FCT b0.5 to a7.0V Temperature Under Bias (T BIAS) 74FCT b55§Ct o a125§C 54FCT b65§Ct o a135§C Storage Temperature (T STG) 74FCT b55§Ct o a125§C 54FCT b65§Ct o a150§C DC Output Current (I OUT) 120 mA Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recom- mend operation of FACT TM FCT circuits outside databook specifications. Recommended Operating Conditions Supply Voltage (V CC) 54FCT 4.5V to 5.5V 74FCT 4.75 to 5.25V Input Voltage 0V to V CC Output Voltage 0V to V CC Operating Temperature (T A) 54FCT b55§Ct o a125§C 74FCT 0 §Ct o a70§C Junction Temperature (T J) CDIP 175 §C PDIP 140 §C Note: All commercial packaging is not recommended for applications requir- ing greater than 2000 temperature cycles from b40§Ct o a125§C. DC Characteristics for ’FCT Family Devices Typical values are at V CC e 5.0V, 25 §C ambient and maximum loading. For test conditions shown as Max, use the value specified for the appropriate device type: Com: V CC e 5.0V g5%, T A e 0§Ct o a70§C; Mil: V CC e 5.0V g10%, T A eb 55§C to a125§C, V HC e VCC b 0.2V Symbol Parameter 54FCT/74FCT Units Conditions Min Typ Max VIH Minimum High Level 2.0 VInput Voltage VIL Maximum Low Level 0.8 VInput Voltage IIH Input High Current 5.0 mA VCC e Max V I e VCC 5.0 V I e 2.7V (Note 2) IIL Input Low Current b5.0 mA VCC e Max V I e 0.5V (Note 2) b5.0 V I e GND VIK Clamp Diode Voltage b0.7 b1.2 V V CC e Min; I N eb 18 mA IOS Short Circuit Current b60 b120 mA V CC e Max (Note 1); V O e GND VOH Minimum High Level 2.8 3.0 V CC e 3V; V IN e 0.2V or V HC; Output Voltage I OL eb 32 mA VHC VCC V VCC e Min I OH eb 300 mA 2.4 4.3 V IN e VIH or V IL IOH eb 12 mA (Mil) 2.4 4.3 I OH eb 15 mA (Com)

DC Characteristics for ’FCT Family Devices (Continued) Typical values are at V CC e 5.0V, 25 §C ambient and maximum loading. For test conditions shown as Max, use the value specified for the appropriate device type: Com: V CC e 5.0V g5%, T A e 0§Ct o a70§C; Mil: V CC e 5.0V g10%, T A eb 55§C to a125§C, V HC e VCC b 0.2V Symbol Parameter 54FCT/74FCT Units Conditions Min Typ Max VOL Maximum Low Level GND 0.2 V VCC e 3V; V IN e 0.2V or V HC; Output Voltage I OL e 300 mA GND 0.2 V CC e Min I OL e 300 mA 0.3 0.5 V IN eVIH or V IL IOL e 48 mA (Mil) 0.3 0.5 I OL e 32 mA (Com) ICC Maximum Quiescent V CC e Max Supply Current 1.0 40.0 mAV IN t VHC,V IN s 0.2V fI e 0 DICC Quiescent Supply Current; 0.5 2.0 mA VCC e Max TTL Inputs HIGH V IN e 3.4V (Note 3) ICCD Dynamic Power V CC Max V IN t VHC Supply Current (Note 4) Outputs Open V IN s 0.2V 0.25 0.40 mA/MHz MR e VCC One Input Toggling 50% Duty Cycle VH Input Hysteresis 200 mVon Clock Only IC Total Power V CC e Max V IN t VHC Supply Current (Note 6) 1.5 4.0 Outputs Open V IN s 0.2V MR e VCC fI e 10 MHz V IN e 3.4V 1.8 6.0 One Bit Toggling V IN e GND 50% Duty Cycle mA (Note 5) V IN t VHC 3.0 7.8 V CC e Max V IN s 0.2V Outputs Open MR e VCC fI e 2.5 MHz V IN e 3.4V 5.0 16.8 Eight Bits Toggling V IN e GND 50% Duty Cycle VH Input Hysteresis on Clock Only 200 mV Note 1: Maximum test duration not to exceed one second, not more than one output shorted at one time. Note 2: This parameter guaranteed but not tested. Note 3: Per TTL driven input (V IN e 3.4V); all other inputs at V CC or GND. Note 4: This parameter is not directly testable, but is derived for use in Total Power Supply calculations. Note 5: Values for these conditions are examples of the I CC formula. These limits are guaranteed but not tested. Note 6: IC e IQUIESCENT a IINPUTS a IDYNAMIC IC e ICC a DICC DHNT a ICCD (fCP/2 a fI NI) ICC e Quiescent Current DICC e Power Supply Curent for a TTL High Input (V IN e 3.4V) DH e Duty Cycle for TTL inputs High NT e Number of Inputs at D H ICCD e Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP e Clock Frequency for Register Devices (Zero for Non-Register Devices) fI e Input Frequency NI e Number of Inputs at f I All currents are in milliamps and all frequencies are in megahertz.

TA ea 25§C TA,V CC e Com T A,V CC e Mil Symbol Parameter VCC e 5.0V RL e 500X RL e 500X Units CL e 50 pF C L e 50 pF Typ Min Max Min Max tSU Setup Time HIGH 1.5 3.0 3.5 nsor LOW Data to CP th Hold Time HIGH 1.0 2.0 2.0 nsor LOW Data to CP tw Clock Pulse Width 4.0 7.0 5.0 nsHIGH or LOW tw MR Pulse Width 4.0 7.0 5.0 nsHIGH or LOW trec Recovery Time 3.0 4.0 4.0 nsMR to CP fmax Maximum Clock Frequency 90 MHz Note 1: Minimum limits are guaranteed but not tested on Propagation Delays. Capacitance TA e 25§C, f e 1.0 MHz Symbol Parameter Conditions Typ Max Unit CIN Input Capacitance V IN e 0V 6 10 pF COUT Output Capacitance V OUT e 0V 8 12 pF Note: This parameter is guaranteed by characterization data and not tested.

Ordering Information

The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74FCT 273 P C QR Temperature Range Family Special Variations 74FCT e Commercial TTL-Compatible X e Devices shipped in 13 × reels 54FCT e Military TTL-Compatible QR e Commercial grade device with burn-in Device Type QB e Military grade with environmental and burn-inPackage Code processing shipped in tubes.P e Plastic DIP D e Ceramic DIP Temperature RangeF e Flatpak C e Commercial (0 §Ct o a70§C)L e Leadless Ceramic Chip Carrier (LCC) M e Military ( b55§Ct o a125§C)S e Small Outline (SOIC)

Physical Dimensions inches (millimeters) 20-Terminal Ceramic Leadless Chip Carrier (L) 20-Lead Ceramic Dual-In-Line Package (D)

Physical Dimensions inches (millimeters) (Continued) 20-Lead Small Outline Integrated Circuit (S) 20-Lead Plastic Dual-In-Line Package (P)

54FCT/74FCT273 Octal D Flip-Flop Physical Dimensions inches (millimeters) (Continued) Lit. Ý 114706 20-Lead Ceramic Flatpak (F) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

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