54F161ADM NSC | Alldatasheet

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Y Synchronous counting and loading Y High-speed synchronous expansion Y Typical count frequency of 120 MHz Y Guaranteed 4000V minimum ESD protection Commercial Military Package Package DescriptionNumber 74F161APC N16E 16-Lead (0.300 × Wide) Molded Dual-In-Line 54F161ADM (Note 2) J16A 16-Lead Ceramic Dual-In-Line 74F161ASC (Note 1) M16A 16-Lead (0.150 × Wide) Molded Small Outline, JEDEC 74F161ASJ (Note 1) M16D 16-Lead (0.300 × Wide) Molded Small Outline, EIAJ 54F161AFM (Note 2) W16A 16-Lead Cerpack 54F161ALM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C 74F163APC N16E 16-Lead (0.300 × Wide) Molded Dual-In-Line 54F163ADM (Note 2) J16A 16-Lead Ceramic Dual-In-Line 74F163ASC (Note 1) M16A 16-Lead (0.150 × Wide) Molded Small Outline, JEDEC 74F163ASJ (Note 1) M16D 16-Lead (0.300 × Wide) Molded Small Outline, EIAJ 54F163AFM (Note 2) W16A 16-Lead Cerpack 54F163ALM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C Note 1: Devices also available in 13 × reel. Use suffix e SCX and SJX. Note 2: Military grade device with environmental and burn-in processing. Use suffix e DMQB, FMQB and LMQB. Connection Diagrams Pin Assignment for DIP, SOIC and Flatpak ’F161A TL/F/9486–1 Pin Assignment for LCC ’F161A TL/F/9486–2 Pin Assignment for DIP, SOIC and Flatpak ’F163A TL/F/9486–7 Pin Assignment for LCC ’F163A TL/F/9486–8 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

’F161A TL/F/9486–3 IEEE/IEC ’F161A TL/F/9486–6 ’F163A TL/F/9486–9 IEEE/IEC ’F163A TL/F/9486–10 Unit Loading/Fan Out 54F/74F Pin Names Description U.L. Input I IH/IIL HIGH/LOW Output I OH/IOL CEP Count Enable Parallel Input 1.0/1.0 20 mA/b0.6 mA CET Count Enable Trickle Input 1.0/2.0 20 mA/b1.2 mA CP Clock Pulse Input (Active Rising Edge) 1.0/1.0 20 mA/b0.6 mA MR (’F161A) Asynchronous Master Reset Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA SR (’F163A) Synchronous Reset Input (Active LOW) 1.0/2.0 20 mA/b1.2 mA P0 –P3 Parallel Data Inputs 1.0/1.0 20 mA/b0.6 mA PE Parallel Enable Input (Active LOW) 1.0/2.0 20 mA/b1.2 mA Q0 –Q3 Flip-Flop Outputs 50/33.3 b1 mA/20 mA TC Terminal Count Output 50/33.3 b1 mA/20 mA

The ’F161A and ’F163A count in modulo-16 binary se- quence. From state 15 (HHHH) they increment to state 0 (LLLL). The clock inputs of all flip-flops are driven in parallel through a clock buffer. Thus all changes of the Q outputs (except due to Master Reset of the ’F161A) occur as a re- sult of, and synchronous with, the LOW-to-HIGH transition of the CP input signal. The circuits have four fundamental modes of operation, in order of precedence: asynchronous reset (’F161A), synchronous reset (’F163A), parallel load, count-up and hold. Five control inputsÐMaster Reset (MR ’F161A), Synchronous Reset (SR , ’F163A), Parallel Enable (PE), Count Enable Parallel (CEP) and Count Enable Trickle (CET)Ðdetermine the mode of operation, as shown in the Mode Select Table. A LOW signal on MR overrides all other inputs and asynchronously forces all outputs LOW. A LOW signal on SR overrides counting and parallel loading and allows all outputs to go LOW on the next rising edge of CP. A LOW signal on PE overrides counting and allows informa- tion on the Parallel Data (P n) inputs to be loaded into the flip-flops on the next rising edge of CP. With PE and MR (’F161A) or SR (’F163A) HIGH, CEP and CET permit count- ing when both are HIGH. Conversely, a LOW signal on ei- ther CEP or CET inhibits counting. The ’F161A and ’F163A use D-type edge triggered flip-flops and changing the SR ,P E , CEP and CET inputs when the CP is in either state does not cause errors, provided that the recommended setup and hold times, with respect to the ris- ing edge of CP, are observed. The Terminal Count (TC) output is HIGH when CET is HIGH and the counter is in state 15. To implement synchronous multi-stage counters, the TC outputs can be used with the CEP and CET inputs in two different ways. Please refer to the ’F568 data sheet. The TC output is subject to decoding spikes due to internal race conditions and is therefore not recommended for use as a clock or asynchronous reset for flip-flops, counters or registers. Logic Equations: Count Enable e CEP # CET # PE TC e Q0 # Q1 # Q2 # Q3 # CET Mode Select Table *SR PE CET CEP Action on the Rising Clock Edge ( L) L X X X Reset (Clear) H L X X Load (P nxQn) H H H H Count (Increment) H H L X No Change (Hold) H H X L No Change (Hold) *For ’F163A only H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial State Diagram TL/F/9486–5

TL/F/9486–4

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Storage Temperature b65§Ct o a150§C Ambient Temperature under Bias b55§Ct o a125§C Junction Temperature under Bias b55§Ct o a175§C Plastic b55§Ct o a150§C VCC Pin Potential to Ground Pin b0.5V to a7.0V Input Voltage (Note 2) b0.5V to a7.0V Input Current (Note 2) b30 mA to a5.0 mA Voltage Applied to Output in HIGH State (with V CC e 0V) Standard Output b0.5V to V CC TRI-STATEÉ Output b0.5V to a5.5V Current Applied to Output in LOW State (Max) twice the rated I OL (mA) ESD Last Passing Voltage (Min) 4000V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Recommended Operating Conditions Free Air Ambient Temperature Military b55§Ct o a125§C Commercial 0 §Ct o a70§C Supply Voltage Military a4.5V to a5.5V Commercial a4.5V to a5.5V Symbol Parameter 54F/74F Units V CC Conditions Min Typ Max VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal VCD Input Clamp Diode Voltage b1.2 V Min I IN eb 18 mA VOH Output HIGH 54F 10% V CC 2.5 I OH eb 1m A Voltage 74F 10% V CC 2.5 V Min 74F 5% V CC 2.7 VOL Output LOW 54F 10% V CC 0.5 V Min IOL e 20 mA Voltage 74F 10% V CC 0.5 IIH Input HIGH 54F 20.0 mA Max VIN e 2.7V Current 74F 5.0 IBVI Input HIGH Current 54F 100 mA Max VIN e 7.0V Breakdown Test 74F 7.0 ICEX Output HIGH 54F 250 mA Max VOUT e VCC Leakage Current 74F 50 VID Input Leakage 74F 4.75 V 0.0 IID e 1.9 mA Test All Other Pins Grounded IOD Output Leakage 74F 3.75 mA 0.0 VIOD e 150 mV Circuit Current All Other Pins Grounded IIL Input LOW Current b0.6 mA Max V IN e 0.5V (CEP, CP, MR ,P 0 –P3) b1.2 mA Max V IN e 0.5V (CET, PE ,S R ) IOS Output Short-Circuit Current b60 b150 mA Max V OUT e 0V ICC Power Supply Current 37 55 mA Max

TA ea 25§C TA,V CC e Mil T A,V CC e ComSymbol Parameter V CC ea 5.0V CL e 50 pF C L e 50 pF Units CL e 50 pF Min Typ Max Min Max Min Max fmax Maximum Count Frequency 100 120 75 90 MHz AC Operating Requirements 74F 54F 74F Symbol Parameter TA ea 25§C TA,V CC e Mil T A,V CC e Com UnitsVCC ea 5.0V Min Max Min Max Min Max ts(H) Setup Time, HIGH or LOW 5.0 5.5 5.0 ts(L) P n to CP 5.0 5.5 5.0 ns th(H) Hold Time, HIGH or LOW 2.0 2.5 2.0 th(L) P n to CP 2.0 2.5 2.0 ts(H) Setup Time, HIGH or LOW 11.0 13.5 11.5 ts(L) PE or SR to CP 8.5 10.5 9.5 ns th(H) Hold Time, HIGH or LOW 2.0 3.6 2.0 th(L) PE or SR to CP 0 0 0 ts(H) Setup Time, HIGH or LOW 11.0 13.0 11.5 ts(L) CEP or CET to CP 5.0 6.0 5.0 ns th(H) Hold Time, HIGH or LOW 0 0 0 th(L) CEP or CET to CP 0 0 0 tw(L) MR Pulse Width, LOW 5.0 5.0 5.0 ns(’F161A) trec Recovery Time 6.0 6.0 6.0 nsMR to CP (’F161A)

Ordering Information

The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74F 161A/163A S C X Temperature Range Family Special Variations 74FeCommercial QR e Commercial grade device 54FeMilitary with burn-in QB e Military grade device withDevice Type environmental and burn-in processingPackage Code X e Devices shipped in 13 × reelP e Plastic DIP D e Ceramic DIP Temperature RangeF e Flatpak CeCommercial (0 §Ct o a70§C)L e Leadless Chip Carrier (LCC) MeMilitary ( b55§Ct o a125§C)S e Small Outline Package SOIC JEDEC SJ e Small Outline Package SOIC EIAJ Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (L)

Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Dual-In-Line Package (D) 16-Lead (0.150 × Wide) Molded Small Outline Package, JEDEC (S)

Physical Dimensions inches (millimeters) (Continued) 16-Lead (0.300 × Wide) Molded Small Outline Package, EIAJ (SJ) 16-Lead (0.300 × Wide) Molded Dual-In-Line Package (P)

54F/74F161A # 54F/74F163A Synchronous Presettable Binary Counter Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Flatpak (F) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor National Semiconductores National Semiconductor Corporation GmbH Japan Ltd. Hong Kong Ltd. Do Brazil Ltda. (Australia) Pty, Ltd. 2900 Semiconductor Drive Livry-Gargan-Str. 10 Sumitomo Chemical 13th Floor, Straight Block, Rue Deputado Lacorda Franco Building 16 P.O. Box 58090 D-82256 F 4urstenfeldbruck Engineering Center Ocean Centre, 5 Canton Rd. 120-3A Business Park Drive Santa Clara, CA 95052-8090 Germany Bldg. 7F Tsimshatsui, Kowloon Sao Paulo-SP Monash Business Park Tel: 1(800) 272-9959 Tel: (81-41) 35-0 1-7-1, Nakase, Mihama-Ku Hong Kong Brazil 05418-000 Nottinghill, Melbourne TWX: (910) 339-9240 Telex: 527649 Chiba-City, Tel: (852) 2737-1600 Tel: (55-11) 212-5066 Victoria 3168 Australia Fax: (81-41) 35-1 Ciba Prefecture 261 Fax: (852) 2736-9960 Telex: 391-1131931 NSBR BR Tel: (3) 558-9999 Tel: (043) 299-2300 Fax: (55-11) 212-1181 Fax: (3) 558-9998 Fax: (043) 299-2500 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.