54AC11021 TI | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 5

Technical content

54AC11021, 74AC11021 DUAL 4-INPUT POSITIVE-AND GATES SCAS005B – JULY 1987 – REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Copyright  1993, Texas Instruments Incorporated 2–1

  • Flow-Through Architecture Optimizes PCB Layout
  • Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
  • EPIC  (Enhanced-Performance Implanted CMOS) 1-mm Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs

description

These devices contain two independent 4-input AND gates. They perform the Boolean functions Y = A • B • C • D or Y = A + B + C + D in positive logic. The 54AC11021 is characterized for operation over the full military temperature range of –55°C to 125°C. The 74AC11021 is characterized for operation from –40°C to 85°C. FUNCTION TABLE (each gate) INPUTS OUTPUT A B C D Y H H H H H L XXX L X LXX L X XLX L X X X L L 54AC11021 ...J PACKAGE 74AC11021 ...D O R N PACKAGE (TOP VIEW) 54AC11021 . . . FK PACKAGE (TOP VIEW) NC – No internal connection GND NC V CC NC 3 2 1 20 19 91 0 1 1 1 2 1 3 NC NC NC NC NC NC NC 2D 2A GND NC V CC EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

54AC11021, 74AC11021 DUAL 4-INPUT POSITIVE-AND GATES SCAS005B – JULY 1987 – REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 752652–2 logic symbol† logic diagram (positive logic) 1Y3 1A 11B 131C 121D 2Y5 2A 92B 72C 62D † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

54AC11021, 74AC11021 DUAL 4-INPUT POSITIVE-AND GATES SCAS005B – JULY 1987 – REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–3 recommended operating conditions 54AC11021 74AC11021 UNIT MIN NOM MAX MIN NOM MAX UNIT VCC Supply voltage 3 5 5.5 3 5 5.5 V VCC = 3 V 2.1 2.1 VIH High-level input voltage VCC = 4.5 V 3.15 3.15 V VCC = 5.5 V 3.85 3.85 VCC = 3 V 0.9 0.9 VIL Low-level input voltage VCC = 4.5 V 1.35 1.35 V VCC = 5.5 V 1.65 1.65 VI Input voltage 0 VCC 0 VCC V VO Output voltage 0 VCC 0 VCC V VCC = 3 V –4 –4 IOH High-level output current VCC = 4.5 V –24 –24 mA VCC = 5.5 V –24 –24 VCC = 3 V 12 12 IOL Low-level output current VCC = 4.5 V 24 24 mA VCC = 5.5 V 24 24 Dt/Dv Input transition rise or fall rate 0 10 0 10 ns/V TA Operating free-air temperature –55 125 –40 85 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25°C 54AC11021 74AC11021 UNITPARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN MAX MIN MAX UNIT 3 V 2.9 2.9 2.9 IOH = – 50 mA 4.5 V 4.4 4.4 4.4 5.5 V 5.4 5.4 5.4 VOH IOH = – 4 mA 3 V 2.58 2.4 2.48 VVOH I2 4 A 4.5 V 3.94 3.7 3.8 V IOH = – 24 mA 5.5 V 4.94 4.7 4.8 IOH = – 50 mA† 5.5 V 3.85 IOH = –75 mA† 5.5 V 3.85 3 V 0.1 0.1 0.1 IOL = 50 mA 4.5 V 0.1 0.1 0.1 5.5 V 0.1 0.1 0.1 VOL IOL = 12 mA 3 V 0.36 0.5 0.44 VVOL IOL =2 4m A 4.5 V 0.36 0.5 0.44 V IOL = 24 mA 5.5 V 0.36 0.5 0.44 IOL = 50 mA† 5.5 V 1.65 IOL = 75 mA† 5.5 V 1.65 II VI = VCC or GND 5.5 V ± 0.1 ±1 ±1 mA ICC VI = VCC or GND, I O = 0 5.5 V 4 80 40 mA C i VI = VCC or GND 5 V 3.5 pF † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.

NOTES: A. C L includes probe and jig capacitance. B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W , tr = 3 ns, tf = 3 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright  1998, Texas Instruments Incorporated