ICS542MILF IDT | Alldatasheet

Document overview

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Technical content

Features

  • 8-pin SOIC package, Pb free
  • Available in RoHS compliant package
  • IDT’s lowest cost clock divider
  • Low skew (500 ps) outputs. One is /2 of the other
  • Easy to use with other generators and buffers
  • Input clock frequency up to 156 MHz
  • Output clock duty cycle of 45/55
  • Power-down turns off chip
  • Output Enable
  • Advanced, low-power CMOS process
  • Operating voltage of 3.3 V or 5 V
  • Does not degrade phase noise - no PLL
  • Available in industrial and commercial temperature ranges Block Diagram Input Clock Divider and Selection Circuitry CLK1 CLK2 S1, S0 OE (both outputs)GND VDD

CLOCK DIVIDER CLOCK DIVIDER IDT™ / ICS™ CLOCK DIVIDER 2 ICS542 REV J 051310 Pin Assignment 8-pin (150 mil) SOIC Clock Decoding Table 0 = connect directly to ground 1 = connect directly to VDD Pin Descriptions External Components Series Termination Resistor Clock output traces over one inch should use series termination. To series terminate a 50Ω trace (a commonly used trace impedance), place a 33Ω resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20Ω. Decoupling Capacitor As with any high-performance mixed-signal IC, the ICS542 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01µF must be connected between VDD and the PCB ground plane. PCB Layout Recommendations For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) The 0.01µF decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. Distance of the ferrite bead and bulk decoupling from the device is less critical. 2) To minimize EMI, the 33Ω series termination resistor (if needed) should be placed close to the clock output. 3) An optimum layout is one with all components on the ICLK VDD GND CLK/2 OE CLK1 S1 S0 CLK CLK/2

00 P o w e r D o w n A l l

1 ICLK XI Clock input. 2 VDD Power Connect to +3.3 V or +5 V. 3 GND Power Connect to ground. 4 S0 Input Select 0 for output clock. Connect to GND or VDD, per decoding table above. Internal pull-up resistor. 5 S1 Input Select 1 for output clock. Connect to GND or VDD, per decoding table above. Internal pull-up resistor. 6 OE Input Output Enable. Tri-states both output clocks when low. Internal pull-up resistor. 7 CLK/2 Output Clock output per table above. Low skew divide by two of pin 8 clock. 8 CLK Output Clock output per table above.

CLOCK DIVIDER CLOCK DIVIDER IDT™ / ICS™ CLOCK DIVIDER 3 ICS542 REV J 051310 same side of the board, minimizing vias through other signal layers (the ferrite bead and bulk decoupling capacitor can be mounted on the back). Other signal traces should be routed away from the ICS542. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS542. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Recommended Operation Conditions Item Rating Supply Voltage, VDD 7 V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature (commercial) 0 to +70 ° C Ambient Operating Temperature (industrial) -40 to +85 ° C Storage Temperature -65 to +150 ° C Junction Temperature 125 ° C Soldering Temperature 260 ° C Parameter Min. Typ. Max. Units Ambient Operating Temperature (commercial) 0 +70 ° C Ambient Operating Temperature (industrial) -40 +85 ° C Power Supply Voltage (measured in respect to GND) 3.0 5.5 V

CLOCK DIVIDER CLOCK DIVIDER IDT™ / ICS™ CLOCK DIVIDER 4 ICS542 REV J 051310 Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temp. 0 to +70° C (commercial), -40 to +85° C (industrial) Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temp. 0 to +70° C (commercial), -40 to +85° C (industrial) Thermal Characteristics Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD 3.0 5.5 V Input High Voltage, V IH ICLK (pin 1) VDD/2+1 VDD/2 V Input Low Voltage V IL ICLK (pin 1) VDD/2 VDD/2-1 V Input High Voltage V IH S0, S1, OE 2 V Input Low Voltage V IL S0, S1, OE 0.8 V Output High Voltage V OH IOH = -25 mA 2.4 V Output Low Voltage V OL IOL = 25 mA 0.4 V Operating Supply Current I DD No Load, 5.0 V, 11 sel 11 mA Operating Supply Current I DD No Load, 3.3 V, 11 sel 7m A Short Circuit Current I OS ±40 mA Input Capacitance C IN S0, S1, OE 4 pF Nominal Output Impedance Z O at VDD/2 20 Ω Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency, clock input VDD = 5 V 0 156 MHz Input Frequency, clock input VDD = 3.3 V 0 156 MHz Output Rise Time t OR 0.8 to 2.0 V 1 ns Output Fall Time t OF 2.0 to 0.8 V 1 ns Duty Cycle at VDD/2 45 49 to 51 55 % Skew of Output Clocks rising edges at VDD/2 500 ps Propagation Delay ICLK to CLK 15 ns Parameter Symbol Conditions Min. Typ. Max. Units Thermal Resistance Junction to Ambient θJA Still air 150 ° C/W θJA 1 m/s air flow 140 ° C/W θJA 3 m/s air flow 120 ° C/W Thermal Resistance Junction to Case θJC 40 ° C/W

CLOCK DIVIDER CLOCK DIVIDER IDT™ / ICS™ CLOCK DIVIDER 5 ICS542 REV J 051310 Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95

Ordering Information

Parts that are ordered with a “LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. Part / Order Number Marking Shipping Packaging Package Temperature 542MLF 542MLF Tubes 8-pin SOIC 0 to +70 ° C 542MLFT 542MLF Tape and Reel 8-pin SOIC 0 to +70 ° C 542MILF 542MILF Tubes 8-pin SOIC -40 to +85 ° C 542MILFT 542MILF Tape and Reel 8-pin SOIC -40 to +85 ° C INDEX AREA 1 2 D E SEATING PLANE A e - C - B .10 (.004) C C L H h x 45 Millimeters Inches S y m b o l M i nM a xM i nM a x A 1.35 1.75 .0532 .0688 A1 0.10 0.25 .0040 .0098 B 0.33 0.51 .013 .020 C 0.19 0.25 .0075 .0098 D 4.80 5.00 .1890 .1968 E 3.80 4.00 .1497 .1574 e 1.27 BASIC 0.050 BASIC H 5.80 6.20 .2284 .2440 h 0.25 0.50 .010 .020 L 0.40 1.27 .016 .050 α 0° 8° 0° 8°

© 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names a nd marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA Corporate Headquarters Integrated Device Technology, Inc. www.idt.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 For Tech Support www.idt.com/go/clockhelp Innovate with IDT and accelerate your future networks. Contact: www.IDT.com ICS542 CLOCK DIVIDER CLOCK DIVIDER