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54165/DM74165 8-Bit Parallel-to-Serial Converter August 1989 54165/DM74165 8-Bit Parallel-to-Serial Converter General Description The ’165 is an 8-bit parallel load or serial-in register with complementary outputs available from the last stage. Paral- lel inputting occurs asynchronously when the Parallel Load (PL ) input is LOW. With PL HIGH, serial shifting occurs on the rising edge of the clock; new data enters via the Serial Data (D S) input. The 2-input OR clock can be used to com- bine two independent clock sources, or one input can act as an active LOW clock enable. Connection Diagram Dual-In-Line-Package TL/F/9782 1 Order Number 54165DMQB, 54165FMQB or DM74165N See NS Package Number J16A, N16E or W16A Logic Symbol TL/F/9782 2 VCC Pin 16 GND Pin 8 Pin Names Description CP1, CP2 Clock Pulse Inputs (Active Rising Edge) DS Serial Data Input PL Asynchronous Parallel Load Input (Active LOW) P0–P7 Parallel Data Inputs Q7 Serial Output from Last Stage Q7 Complementary Output C1995 National Semiconductor Corporation RRD B30M115/Printed in U S A

Absolute Maximum Ratings (Note) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 5.5V Operating Free Air Temperature Range b55§Ct o a125§C DM74 0 §Ct o a70§C Storage Temperature Range b65§Ct o a150§C Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaran- teed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation. Recommended Operating Conditions Symbol Parameter 54165 DM74165 Units Min Nom Max Min Nom Max VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V VIH High Level Input Voltage 2 2 V VIL Low Level Input Voltage 0.8 0.8 V IOH High Level Output Current b0.8 b0.8 mA IOL Low Level Output Current 16 16 mA TA Free Air Operating Temperature b55 125 0 70 §C ts(H) Setup Time HIGH or LOW 10 10 nsts(L) P n to PL 10 10 th(H) Hold Time HIGH or LOW 10 0 nsth(L) P n to PL 10 0 ts(H) Setup Time HIGH or LOW 20 20 nsts(L) D S to CP n 20 20 th(H) Hold Time HIGH or LOW 0 0 nsth(L) D S to CP n 00 ts(H) Setup Time HIGH 30 30 nsCP1 to CP2 or CP2 to CP1 tw(H) CP n Pulse Width HIGH 25 25 ns tw(L) PL Pulse Width LOW 15 15 ns trec Recovery Time, PL to CP n 45 45 ns

Electrical Characteristics

Over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units(Note 1) VI Input Clamp Voltage V CC Min, I I b12 mA b1.5 V VOH High Level Output Voltage V CC Min, I OH Max, V IL Max 2.4 3.4 V VOL Low Level Output Voltage V CC Min, V IH Min 0.2 0.4 V II Input Current @ Max V CC Max, V I 5.5V 1m AInput Voltage IIH High Level Input Current V CC Max, V I 2.4V PL 80 mA Inputs 40 IIL Low Level Input Current V CC Max, V I 0.4V PL b3.2 mA Inputs b1.6 IOS Short Circuit VCC Max 54 b20 b55 mAOutput Current (Note 2) DM74 b18 b55 ICC Supply Current VCC Max, PL ß 63 mAPn K,C P 1,C P 2 4.5V

VCC a5.0V, T A a25§C (See Section 1 for waveforms and load configurations) CL 15 pF Symbol Parameter R L 400X Units Min Max fmax Maximum Clock Frequency 20 MHz tPLH Propagation Delay 31 nstPHL PL to Q7 or Q 74 0 tPLH Propagation Delay 24 nstPHL CP1 to Q7 or Q 73 1 tPLH Propagation Delay 17 nstPHL P7 to Q7 36 tPLH Propagation Delay 27 nstPHL P7 to Q 72 7 Note 1: All typicals are at V CC 5V, T A 25§C. Note 2: Not more than one output should be shorted at a time. Functional Description The ’165 contains eight clocked master/slave RS flip-flops connected as a shift register with auxiliary gating to provide overriding asynchronous parallel entry. Parallel data enters when the PL signal is LOW. The parallel data can change while PL is LOW provided that the recommended setup and hold times are observed. For clocked operation, PL must be HIGH. The two clock inputs perform identically; one can be used as a clock inhibit by applying a HIGH signal. To avoid double clocking, how- ever, the inhibit signal should only go HIGH while the clock is HIGH. Otherwise, the rising inhibit signal will cause the same response as a rising clock edge. The flip-flops are edge-triggered for serial operations. The serial input data can change at any time, provided only that the recommend- ed setup and hold times are observed, with respect to the rising edge of the clock. Truth Table PL CP Contents Response 1 2 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 L X X P0 P1 P2 P3 P4 P5 P6 P7 Parallel Entry HL L DS Q0 Q1 Q2 Q3 Q4 Q5 Q6 Right Shift HH L Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 No Change H L LD S Q0 Q1 Q2 Q3 Q4 Q5 Q6 Right Shift H L H Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 No Change H HIGH Voltage Level L LOW Voltage Level X Immaterial L Positive Rising Edge Logic Diagram TL/F/9782 3

Physical Dimensions inches (millimeters) 16-Lead Ceramic Dual-In-Line Package (J) Order Number 54165DMQB 16-Lead Molded Dual-In-Line Package (N) Order Number DM74165N

54165/DM74165 8-Bit Parallel-to-Serial Converter Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Flat Package (W) Order Number 54165FMQB LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

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