ICS507-01 RENESAS | Alldatasheet

Document overview

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  • PDF pages: 8

Technical content

Features

  • Packaged in 16 pin SOIC
  • Available in Pb (lead) free package
  • Input crystal frequency of 5 - 27 MHz
  • Input clock frequency of 5 - 52 MHz
  • Enable usage of common low-cost crystal
  • Differential PECL output clock frequencies up to 200 MHz
  • Duty cycle of 49/51
  • Operation voltage of 3.3 V or 5.0 V (±5%)
  • Ideal for SONET applications and oscillator ma nufacturers
  • Available in die form
  • Industrial temperature versions available
  • ICS507-02 is no longer available Block Diagram GND Clock Synthesis and Control Circuitry X1/ICLK Crystal or clock input Output resistors shown are for unterminated lines. Refer to MAN09 for additional information. Clock Buffer/ Crystal Oscillator VDD Output Enable (both outputs) S0:1 270 ohm 62 ohm 62 ohm 270 ohm VDD PECL PECL 1.1 kohm RES

PECL CLOCK SYNTHESIZER PECL MULTIPLIER IDT™ / ICS™ PECL CLOCK SYNTHESIZER 2 ICS507-01 REV I 041905 Pin Assignment * At 3.3V, use this selection to get 155.52 MHz from a 16 MHz input. For lowest phase noise generation of 155.52 MHz, use a 19.44 MHz crystal and the 8X selection. Clock Multiplier Select Table 0 = connect pin directly to ground 1 = connect pin directly to VDD M = leave unconnected (floating) Pin Descriptions X1/ICLK VDD VDD NC GND OE NC GND NC PECL NC RES PECL

16 Pin (150 mil) SOIC

0 0 9.72X* 0M 1 0 X 01 1 2 X M 0 6.25X MM 8 X M1 5 X 10 2 X 1M 3 X 11 4 X Number Name Type Description 1 XI/ICLK Input Crystal Connection. Connect to a fundamental parallel mode crystal, or clock. 2 VDD Power Connect to +3.3 V or 5 V, and to VDD on pin 3. 3 VDD Power Connect to VDD on pin 2. Decouple with pin 5. 4 S1 Input Multiplier select pin 1. Determines output frequency per table above. 5 GND Power Connect to ground. 6 GND Power Connect to ground. 7 NC — No connect. Do not connect this pin to anything. 8 PECL Output PECL output. Connect to resistor load as shown on page 1.

9 PECL

Output Complimentary PECL output. Connect to resistor load as shown on page 1. 10 RES Input Bias resistor input. Connect a resistor between this pin and VDD. 11 NC — No connect. Do not connect this pin to anything. 12 NC — No connect. Do not connect this pin to anything. 13 OE Input Output Enable. Tri-states both outputs when low. Internal pull-up. 14 S0 Input Multiplier select pin 0. Determines output frequency per table above. 15 NC — No connect. Do not connect this pin to anything. 16 X2 Output Crystal Connection. Connect to crystal, or leave unconnected for clock input.

PECL CLOCK SYNTHESIZER PECL MULTIPLIER IDT™ / ICS™ PECL CLOCK SYNTHESIZER 3 ICS507-01 REV I 041905 External Component Selection The ICS507-01 requires a minimum number of external components for proper operation. Decoupling Capacitors Decoupling capacitors of 0.01µF should be connected between VDD and GND on pins 2 and 5, as close to the ICS507-01 as possible. Other VDD and GND connections should be connected to those pins, or to the VDD and GND planes on the board. A resistor must be connected between the RES (pin 10) and VDD. Another four resistors are needed for the PECL outputs as shown on the block diagram on page 1. Suggested values of these resistors are shown in the Block Diagram, but they can be varied to change the differential pair output swing, and the DC level; refer to MAN09. High Frequency Differential PECl Oscillators The ICS507-01 plus a low frequency, fundamental mode crystal can build a high frequency differential output oscillator. For example, a 10 MHz crystal connected to the ICS507-01 with the 12X output selected (S1=0, S0=1) produces a 120 MHz PECL output clock. Hi Frequency TCXO Extending the previous application, an inexpensive, low frequency TCXO can be built and the output frequency can be multiplied using the ICS507-01. Since the output of the chip is phase-locked to the input, the ICS507-01 has no temperature dependence, and the temperature coefficient of the combined system is the same as that of the low frequency TCXO. Hi Frequency VCXO The bandwidth of the PLL is guaranteed to be greater than 10 kHz. This means that the PLL will track any modulation on the input with a frequency of less than 10 kHz. By using this property, a low frequency VCXO can be built, and the output can then be multiplied with the ICS507-01 to give a high frequency output, thereby producing a high frequency VCXO. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS507-01. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7 V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature (commercial) 0 to +70 ° C Ambient Operating Temperature (industrial) -40 to +85 ° C Storage Temperature -65 to +150 ° C Soldering Temperature 260 ° C

PECL CLOCK SYNTHESIZER PECL MULTIPLIER IDT™ / ICS™ PECL CLOCK SYNTHESIZER 4 ICS507-01 REV I 041905 Recommended Operation Conditions VDD=5 V, unless stated otherwise Notes: 1. All typical values are at 5.0 V and 25°C unless otherwise noted. 2. VOH and VOL can be set by the external resistor values on the PECL outputs. 3. IDD includes the current through the external resistors, which can be modified. 4. The phase relationship between input and output can change at power up. For a fixed phase relationship, see one of the ICS zero delay buffers. 5. Except S1=0, S0=0 setting (This setting specific to 16 MHz in, 155.52 MHz out). Parameter Min. Typ. Max. Units Ambient Operating Temperature (commercial) 0 – +70 ° C Ambient Operating Temperature (industrial) -40 – +85 ° C Power Supply Voltage (measured in respect to GND) +3.15 +3.45 V Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD 3.0 5.5 V Input High Voltage V IH ICLK only VDD/2+1 VDD/2 V Input Low Voltage V IL ICLK only VDD/2 VDD/2-1 V Input High Voltage V IH S0, S1 VDD-0.5 V Input Low Voltage V IL S0, S1 0.5 V Output High Voltage V OH Note 2 VDD-1.2 V Output Low Voltage V OL Note 2 VDD-2.0 V Operating Supply Current IDD No load, 155.52 MHz, Note 3 63 mA Internal Crystal Capacitance, X1 and X2 Pins 1, 8 26 pF Input Capacitance S0, S1 5 pF

PECL CLOCK SYNTHESIZER PECL MULTIPLIER IDT™ / ICS™ PECL CLOCK SYNTHESIZER 5 ICS507-01 REV I 041905 VDD = 3.3 V, 5 V unless stated otherwise Parameter Symbol Conditions Min. Typ. Max. Units Input Crystal Frequency 5 27 MHz Input Clock Frequency 5 52 MHz Output Frequency, ICS507-01 f out VDD = 5 V 10 200 MHz VDD = 3.3 V 10 156 MHz Output Frequency, ICS507-01I fout VDD = 3.3 V or 5 V 10 125 MHz Output Clock Duty Cycle t D 48 52 % PLL Bandwidth 10 kHz Absolute Clock Period Jitter Deviation from Mean ±75 ps One Sigma Clock Period Jitter 20 ps

PECL CLOCK SYNTHESIZER PECL MULTIPLIER IDT™ / ICS™ PECL CLOCK SYNTHESIZER 6 ICS507-01 REV I 041905 Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95

Ordering Information

While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. Part/Order Number Marking Packaging Package Temperature Min. Qty. 507M-01 ICS507M-01 Tubes 16-pin SOIC 0 to +70 ° C— 507M-01T ICS507M-01 Tape and Reel 16-pin SOIC 0 to +70 ° C 2500 pieces 507M-01I ICS507M-01I Tubes 16-pin SOIC -40 to +85 ° C— 507M-01IT ICS507M-01I Tape and Reel 16-pin SOIC -40 to +85 ° C 2500 pieces 507M-01LF ICS507M-01LF Tubes 16-pin SOIC 0 to +70 ° C— 507M-01LFT ICS507M-01LF Tape and Reel 16-pin SOIC 0 to +70 ° C 2500 pieces 507M-01ILF ICS507M01ILF Tubes 16-pin SOIC -40 to +85 ° C— 507M-01ILFT ICS507M01ILF Tape and Reel 16-pin SOIC -40 to +85 ° C 2500 pieces 507M-01DSW — Probed wafers, cut, on sticky tape 0 to +70° C1 w a f e r 507M-01DPK — Tested die in waffle pack 0 to +70 ° C 1000 pieces 507M-01DWF — Die on uncut, probed wafers 0 to +70 ° C1 w a f e r INDEX AREA 1 2 D E SEATING PLANE A e - C - B .10 (.004) C C L H h x 45 Millimeters Inches Symbol Min Max Min Max A 1.35 1.75 .0532 .0688 A1 0.10 0.25 .0040 .0098 B 0 . 3 30 . 5 1. 0 1 3. 0 2 0 C 0.19 0.25 .0075 .0098 D 9.80 10.00 .3859 .3937 E 3.80 4.00 .1497 .1574 e 1.27 BASIC 0.050 BASIC H 5.80 6.20 .2284 .2440 h 0 . 2 50 . 5 0. 0 1 0. 0 2 0 L 0 . 4 01 . 2 7. 0 1 6. 0 5 0 α 0° 8° 0° 8°

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