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Using theTPS84410EVM-001, TPS84210EVM-002, TPS84610EVM-003 User's Guide LiteratureNumber: SLUU633A September 2011–RevisedFebruary2012
User's Guide SLUU633A –September 2011–RevisedFebruary2012 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to6-A IntegratedPower Solution
1 Introduction
The TPS84410EVM-001, TPS84210EVM-002, TPS84610EVM-003 EvaluationModule (TPS84x10EVM-00x) isdesignedas an easy touse platformthatfacilitatesan extensiveevaluationofthe featuresand performanceoftheIntegratedPower Solution(IPS)devices.The EVM PCB may be configuredwithone ofthreeIPS devices(seeTable1). Table1.TPS84x10EVM-00x Device Configuration DEVICE TITLE TPS84210 6-V input,2-A outputsync.step-downconverterwithPWM TPS84410 6-V input,4-A outputsync.step-downconverterwithPWM TPS84610 6-V input,6-A outputsync.step-downconverterwithPWM Thisuserguideprovidesinformationon thecorrectusage oftheEVM and an explanationofthenumerous testpointson theboard.
2 Description
The EVM featuresa TPS84x10 synchronousbuck IPS deviceconfiguredforoperationwithtypical3.3-V and 5-V inputbus applications.The outputvoltagecan be settoone offivepopularvaluesby usinga simpleconfigurationjumper.Insimilarfashion,theswitchingfrequencycan be settoone offourvaluesby use ofa jumper.The full4-A ratedoutputcurrentcan be suppliedby theEVM. A minimalamount ofinput and outputcapacitanceisused on theboard.Component pads areprovidedforadditionalinputand outputcapacitorsifdesired.Monitoringtestpointsareprovidedtoallowmeasurement ofefficiency,power dissipation,inputripple,outputripple,lineand loadregulation,and transientresponse.Controltestpoints areprovidedforuse ofthePWRGD, Inhibit/UVLO,synchronization,and slow-start/trackingfeaturesofthe IPS device.The EVM uses a recommended PCB layoutthatmaximizesthermalperformanceand minimizesoutputrippleand noise. 2 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to6-A SLUU633A –September 2011–RevisedFebruary2012 IntegratedPower Solution SubmitDocumentationFeedback Copyright© 2011–2012,Texas InstrumentsIncorporated
www.ti.com GettingStarted
3 GettingStarted
Figure1 highlightstheuserinterfaceitemsassociatedwiththeEVM. The polarizedVIN Power terminal blockisused forconnectiontothehostinputsupplyand thepolarizedVOUT Power terminalblockisused forconnectiontotheload.The terminalblockscan exceptup to16 AWG wire. The VIN monitorand VOUT monitortestpointslocatednearthepower terminalblocksareintendedtobe used as voltagemonitoringpointswhere voltmeterscan be connectedtomeasure VIN and VOUT .The voltmeterreferencesshouldbe connectedtoany ofthefourVIN/VOUT monitorgroundstestpointslocated between thepower terminalblocks.Do notuse theseVIN and VOUT monitoringtestpointsas theinput supplyoroutputloadconnectionpoints.The PCB tracesconnectingtothesetestpointsarenotdesigned tosupporthighcurrents. Figure1.TPS84x10EVM-00x User Interface 3SLUU633A –September 2011–RevisedFebruary2012 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to6-A IntegratedPower SolutionSubmitDocumentationFeedback Copyright© 2011–2012,Texas InstrumentsIncorporated
GettingStarted www.ti.com The VIN scope and VOUT scope testpointscan be used tomonitorVIN and VOUT waveformswithan oscilloscope.These testpointsareintendedforuse withun-hoodedscope probes.The scope probetip shouldbe connectedtothesocketlabeledVIN orVOUT, and thescope groundbarrelshouldleanagainst tothetestpointlabeledGND. The GND TP may need tobe cutorbentslightlytoholdtheprobebarrel. Figure2.Tipand BarrelMeasurement The controltestpointslocateddirectlybelowtheTPS84x10 IPS devicearemade availabletotestthe featuresofthedevice.Any externalconnectionsmade tothesetestpointsshouldbe referencedtoeither ofthetwo controlgroundtestpointslocatedalongthebottomoftheEVM. RefertoSection4 ofthisuser guideformore informationon theindividualcontroltestpoints. The VOUT -selectand FSW -selectconfigurationjumpersareprovidedforselectingthedesiredoutputvoltage and appropriateswitchingfrequency.Beforeapplyingpower totheEVM, ensurethatthejumpersare presentand properlypositionedfortheintendedoutputvoltage.RefertoTable2 fortherecommended jumpersettings.Alwaysremove inputpower beforechangingthejumpersettings. Once thejumpersettingshave been confirmed,configurethehostinputsupplytoapplytheappropriate bus voltagelistedinTable2 and confirmthattheselectedoutputvoltageisobtained. Table2.Output Voltageand SwitchingFrequency Jumper Settings VOUT SELECT TPS84210, FSW TPS84410, FSW TPS84610, FSW VIN BUS VOLTAGE SELECT SELECT SELECT 3.3V 1.5MHz 1 MHz - 5 V 2.5V 1.5MHz 1 MHz - 5 V 1.8V 1 MHz 1 MHz - 5 V or3.3V 1.2V 750 kHz 750 kHz - 5 V or3.3V 0.8V 650 kHz 650 kHz - 5 V or3.3V 4 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to6-A SLUU633A –September 2011–RevisedFebruary2012 IntegratedPower Solution SubmitDocumentationFeedback Copyright© 2011–2012,Texas InstrumentsIncorporated
www.ti.com TestPointDescriptions
4 TestPointDescriptions
Fourteenwire-looptestpointshave been providedas convenientconnectionpointsfordigitalvoltmeters (DVM) oroscilloscopeprobestoaidintheevaluationoftheIPS device.A vialabledPH isavailablenear U1 toscope on theswitchingfrequency.A descriptionofeach testpointislistedinTable3 Table3.TestPointDescriptions TEST POINT DESCRIPTION VIN Inputvoltagemonitor.ConnectDVM tothispointformeasuringefficiency. VOUT Outputvoltagemonitor.ConnectDVM tothispointformeasuringefficiency,lineregulation,and loadregulation. GND Inputand outputvoltagemonitorgrounds(locatedbetween terminalblocks).Referencetheabove DVMs toany ofthesefourgroundpoints. VIN (scope) Inputvoltagescope monitor.Connectan oscilloscopetothissetofpointstomeasure inputripple voltage. VOUT (scope) Outputvoltagescope monitor.Connectan oscilloscopetothissetofpointstomeasure output ripplevoltageand transientresponse. PWRGD Monitorsthepower good signaloftheIPS device.Thisisan open drainsignalthatrequiresan externalpull-upresistortoVIN ifmonitoringisdesired.A 10-kΩ to100-kΩ pull-upresistoris recommended. PWRGD ishighiftheoutputvoltageiswithin92% to106% ofitsnominalvalue. INH/UVLO ConnectthispointtocontrolgroundtoinhibittheIPS device.Allowthispointtofloattoenablethe device.Do notuse a pull-upresistor.An externalresistorcan be connectedfromthispointto controlgroundtoincreasetheunder-voltagelockout(UVLO) ofthedevice. RT/CLK ConnectstotheRT/CLK pinoftheIPS device.An externalclocksignalcan be appliedtothis pointtosynchronizethedevicetoan appropriatefrequency. SS/TR Connectstotheinternalslow-startcapacitoroftheIPS device.An externalcapacitorcan be connectedfromthispointtocontrolgroundtoincreasetheslow-starttimeofthedevice.This pointcan alsobe used as an inputfortrackingapplications. GND Controlgrounds(locatedalongbottomofEVM). Referenceany signalsassociatedwiththe controltestpointstoeitherofthesetwo groundpoints.
5 OperationNotes
The UVLO thresholdofthefactory-stockEVM isapproximately3.05V with0.3V ofhysteresis.The input voltagemust be above theUVLO thresholdinordertostartuptheIPS device.The UVLO thresholdcan be increasedby addinga resistortotheINH/UVLO testpointas describedabove.Afterstartup,theminimum inputvoltagetotheIPS devicemust be atleast2.95V or(VOUT + 1.1V),whicheverisgreater,inorderto producea regulatedoutput.The maximum operatinginputvoltagefortheIPS deviceis6 V.Refertothe TPS84410 datasheetforfurtherinformationon theinputvoltagerangeand UVLO operation. Afterapplicationoftheproperinputvoltage,theoutputvoltageoftheIPS devicewillramp toitsfinalvalue inapproximately1 ms. Ifdesired,thissoft-starttimecan be increasedby addinga capacitortotheSS/TR testpointas describedabove.RefertotheTPS84410 datasheetforfurtherinformationon adjustingthe soft-starttime. Table1 liststherecommended switchingfrequenciesforeach oftheVOUT selections.These recommendationscoveroperationovera widerangeofinputvoltageand outputloadconditions.Several factorssuch as dutycycle,minimum on-time,minimum off-time,and currentlimitinfluenceselectionofthe appropriateswitchingfrequency.Insome applications,otherswitchingfrequenciesmightbe used for particularoutputvoltages,dependingon theabove factors.RefertotheTPS84410 datasheetforfurther informationon switchingfrequencyselection,includingsynchronization. 5SLUU633A –September 2011–RevisedFebruary2012 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to6-A IntegratedPower SolutionSubmitDocumentationFeedback Copyright© 2011–2012,Texas InstrumentsIncorporated
TPS84x10EVM-00x Schematic www.ti.com
6 TPS84x10EVM-00x Schematic
Figure3.TPS84x10EVM-00x Schematic 6 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to6-A SLUU633A –September 2011–RevisedFebruary2012 IntegratedPower Solution SubmitDocumentationFeedback Copyright© 2011–2012,Texas InstrumentsIncorporated
www.ti.com PCB Layouts
7 PCB Layouts
Figure4.Top Layer Figure5.Internal1 Layer 7SLUU633A –September 2011–RevisedFebruary2012 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to6-A IntegratedPower SolutionSubmitDocumentationFeedback Copyright© 2011–2012,Texas InstrumentsIncorporated
PCB Layouts www.ti.com Figure6.Internal2 Layer Figure7.Bottom Layer 8 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to6-A SLUU633A –September 2011–RevisedFebruary2012 IntegratedPower Solution SubmitDocumentationFeedback Copyright© 2011–2012,Texas InstrumentsIncorporated
www.ti.com PCB Layouts Figure8.Top Assembly Figure9.Bottom Layer 9SLUU633A –September 2011–RevisedFebruary2012 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to6-A IntegratedPower SolutionSubmitDocumentationFeedback Copyright© 2011–2012,Texas InstrumentsIncorporated
ListofMaterial www.ti.com
8 ListofMaterial
Table4.TPS84x10EVM-00x ListofMaterial(1)(2)(3)(4)(5) -003 -002 -001 REF DES DESCRIPTION PartNumber MFR 1 1 1 C1 Capacitor,ceramic,10 V,x5R,10%, 47 µF, GRM32ER61A476K Murata 1210 1 1 1 C2 Capacitor,ceramic,6.3V,x5R,20%, 47 µF, GRM32ER60J476M Murata 1210 1 1 1 C7 Capacitor,polymer,10 V,20%, 220 µF,D3L 10TPE220ML Sanyo 0 0 0 C8 Capacitor,polymer,10 V,20%, 220 µF,D3L 10TPE220ML Sanyo 1 1 1 C4 Capacitor,polymer,6.3V,20%, 100 µF,B2 6TPE100MPB Sanyo 0 0 0 C3, C5, C6 Capacitor,ceramic,0.1µF,1210 Std STD 0 0 0 10 Capacitor,ceramic,0.01µF,0402 STD STD 2 2 2 J1-2 Header,male 2 x 5 pin,100-milspacing,0.100 PEC05DAAN Sullins inchx 5 inchx 2 inch 1 1 1 R3 Resistor,chip,1/16W, 1%, 2.87kΩ,0603 STD STD 1 1 1 R4 Resistor,chip,1/16W, 1%, 1.15kΩ,0603 STD STD 1 1 1 R5 Resistor,chip,1/16W, 1%, 681 Ω,0603 STD STD 1 1 1 R6 Resistor,chip,1/16W, 1%, 464 Ω,0603 STD STD 1 1 1 R7 Resistor,chip,1/16W, 1%, 348 kΩ,0603 STD STD 1 1 1 R8 Resistor,chip,1/16W, 1%, 715 kΩ,0603 STD STD 1 1 1 R9 Resistor,chip,1/16W, 1%, 1.2M Ω,0603 STD STD 1 1 1 R10 Resistor,chip,1/16W, 5%, 0 Ω,0603 STD STD 1 1 1 R13 Resistor,chip,1/16W, 1%, 174 kΩ,0603 STD STD 1 1 1 R14 Resistor,chip,1/16W, 1%, 113 kΩ,0603 STD STD 0 0 0 R1, R2, R11, Resistor,chip,1/16W, 1%, 100 kΩ,0402 Std Std R12 (1) These assembliesareESD sensitive,ESD precautionsshallbe observed. (2) These assembliesmust be cleanand freefromfluxand allcontaminants.Use ofno cleanfluxisnotacceptable. (3) These assembliesmust complywithworkmanshipstandardsIPC-A-610Class2. (4) Ref designatorsmarked withan asterisk('**')cannotbe substituted.Allothercomponents can be substitutedwithequivalent MFG 's component. (5) Installlabelafterfinalwash.Textshallbe 8 ptfont.Textshallbe perTable5. 10 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to6-A SLUU633A –September 2011–RevisedFebruary2012 IntegratedPower Solution SubmitDocumentationFeedback Copyright© 2011–2012,Texas InstrumentsIncorporated
www.ti.com ListofMaterial Table4.TPS84x10EVM-00x ListofMaterial(1)(2)(3)(4)(5) (continued) -003 -002 -001 REF DES DESCRIPTION PartNumber MFR 2 2 2 TB1-2 Terminalblock,2 pin,15 A,5.1mm, 0.40inchx ED120/2DS OST 0.35inch 8 8 8 TP1, TP2 TP8 Testpoint,white,thruhole,5012,0.125inchx 5012 Keystone TP10- TP14 0.125inch 6 6 6 TP3-7 TP9 Testpoint,black,thruhole,5011,0.125inchx 5011 Keystone 0.125inch 0 0 1 U1 6-V input,4-A OutputSync.Step-Down TPS84410RKG TI ConverterwithPWM, QFN 0 1 0 U1 6-V input,2-A OutputSync.Step-Down TPS84210RKG TI ConverterwithPWM, QFN 1 0 0 U1 6-V input,6-A OutputSync.Step-Down TPS84610RKG TI ConverterwithPWM, QFN 1 1 1 PCB, 0.063inchH x 1.9inchL x 3.9inchW PWR059 ANY 2 2 2 Conn jumpershortinggoldflash SPC02SYAN Sullins 4 4 4 Bumpon hemisphere0.44inchx 0.20inchclear,SJ-5303 3M 0.440inchDiax 0.200inchH Table5.Labeling ASSEMBLY NUMBER TExT PWR059-001 TPS84410EVM-001 PWR059-002 TPS84210EVM-002 PWR059-003 TPS84610EVM-003 11SLUU633A –September 2011–RevisedFebruary2012 TPS84410EVM-001/TPS84210EVM-002/TPS84610EVM-003, 2-A to6-A IntegratedPower SolutionSubmitDocumentationFeedback Copyright© 2011–2012,Texas InstrumentsIncorporated
EvaluationBoard/KitImportantNotice Texas Instruments(TI)providestheenclosedproduct(s)underthefollowingconditions: Thisevaluationboard/kitisintendedforuse forENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and isnotconsideredby TItobe a finishedend-productfitforgeneralconsumer use.Personshandlingthe product(s)must have electronicstrainingand observegood engineeringpracticestandards.As such,thegoods beingprovidedare notintendedtobe completeintermsofrequireddesign-,marketing-,and/ormanufacturing-relatedprotectiveconsiderations, includingproductsafetyand environmentalmeasures typicallyfoundinend productsthatincorporatesuch semiconductor components orcircuitboards.Thisevaluationboard/kitdoes notfallwithinthescope oftheEuropean Uniondirectivesregarding electromagneticcompatibility,restrictedsubstances(RoHS),recycling(WEEE), FCC, CE orUL, and thereforemay notmeet the technicalrequirementsofthesedirectivesorotherrelateddirectives. Shouldthisevaluationboard/kitnotmeet thespecificationsindicatedintheUser’s Guide,theboard/kitmay be returnedwithin30 days fromthedateofdeliveryfora fullrefund.THE FOREGOING WARRANTY ISTHE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND ISIN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED,OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. The userassumes allresponsibilityand liabilityforproperand safehandlingofthegoods.Further,theuserindemnifiesTIfromall claimsarisingfromthehandlingoruse ofthegoods.Due totheopen constructionoftheproduct,itistheuser’s responsibilityto takeany and allappropriateprecautionswithregardtoelectrostaticdischarge. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. TIcurrentlydealswitha varietyofcustomersforproducts,and thereforeourarrangementwiththeuserisnot exclusive. TIassumes no liabilityforapplicationsassistance,customer productdesign,softwareperformance,or infringementof patentsor servicesdescribedherein. PleasereadtheUser’s Guide and,specifically,theWarningsand RestrictionsnoticeintheUser’s Guide priortohandlingthe product.Thisnoticecontainsimportantsafetyinformationabouttemperaturesand voltages.Foradditionalinformationon TI’s environmentaland/orsafetyprograms,pleasecontacttheTIapplicationengineerorvisitwww.ti.com/esh. No licenseisgrantedunderany patentrightorotherintellectualpropertyrightofTIcoveringorrelatingtoany machine,process,or combinationinwhichsuch TIproductsorservicesmightbe orareused. FCC Warning Thisevaluationboard/kitisintendedforuse forENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and isnotconsideredby TItobe a finishedend-productfitforgeneralconsumer use.Itgenerates,uses,and can radiateradiofrequencyenergyand has notbeen testedforcompliancewiththelimitsofcomputingdevicespursuanttopart15 ofFCC rules,whicharedesignedtoprovidereasonableprotectionagainstradiofrequencyinterference.Operationofthis equipmentinotherenvironmentsmay cause interferencewithradiocommunications,inwhichcase theuserathisown expense willbe requiredtotakewhatevermeasures may be requiredtocorrectthisinterference. EVM Warnings and Restrictions ItisimportanttooperatethisEVM withintheinputvoltagerangeof3 V to6 V and theoutputvoltagerangeof0.8V to3.6V . Exceedingthespecifiedinputrangemay cause unexpectedoperationand/orirreversibledamage totheEVM. Ifthereare questionsconcerningtheinputrange,pleasecontacta TIfieldrepresentativepriortoconnectingtheinputpower. Applyingloadsoutsideofthespecifiedoutputrangemay resultinunintendedoperationand/orpossiblepermanentdamage tothe EVM. PleaseconsulttheEVM User's Guide priortoconnectingany loadtotheEVM output.Ifthereisuncertaintyas totheload specification,pleasecontacta TIfieldrepresentative. Duringnormaloperation,some circuitcomponents may have case temperaturesgreaterthan40° C. The EVM isdesignedto operateproperlywithcertaincomponents above 80° C as longas theinputand outputrangesaremaintained.These components includebutarenotlimitedtolinearregulators,switchingtransistors,pass transistors,and currentsense resistors.These typesof devicescan be identifiedusingtheEVM schematiclocatedintheEVM User's Guide.When placingmeasurement probesnear thesedevicesduringoperation,pleasebe aware thatthesedevicesmay be verywarm tothetouch. MailingAddress:Texas Instruments,PostOfficeBox 655303,Dallas,Texas 75265 Copyright© 2012,Texas InstrumentsIncorporated
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