49FCT805

IDT49FCT805 IDT | Alldatasheet

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Technical content

Integrated Device Technology, Inc. FAST CMOS BUFFER/CLOCK DRIVER FEATURES:

• 0.5 MICRON CMOS Technology
• Guaranteed low skew < 700ps (max.)
• Low duty cycle distortion < 1ns (max.)
• Low CMOS power levels
• TTL compatible inputs and outputs
• Rail-to-rail output voltage swing
• High drive: -24mA I OH , 64mA IOL
• Two independent output banks with 3-state control
• 1:5 fanout per bank
• ‘Heartbeat’ monitor output
• Available in DIP, SOIC, SSOP (805 only), QSOP (805 only), Cerpack and LCC packages
• Military product compliant to MIL-STD-883, Class B DESCRIPTION: The IDT49FCT805/A and IDT49FCT806/A are clock drivers built using advanced dual metal CMOS technology. The IDT49FCT805/A is a non-inverting clock driver and the IDT49FCT806/A is an inverting clock driver. Each device consists of two banks of drivers. Each bank drives five output buffers from a standard TTL compatible input. The devices feature a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The IDT49FCT805/A and IDT49FCT806/A offer low capacitance inputs with hysteresis. Rail-to-rail output swing improves noise margin and allows easy interface with CMOS inputs. IDT49FCT805 IDT49FCT806 IDT49FCT805/A IDT49FCT806/A MILITARY AND COMMERCIAL TEMPERATURE RANGES SEPTEMBER 1996  1996 Integrated Device Technology, Inc. 9.1 DSC-2574/10 The IDT logo is a registered trademark of Integrated Device Technology, Inc. OE A INA INB OE B OA 1-OA5 OB 1-OB5 MON 2574 drw 01 OE A INA INB OE B OA 1-OA5 OB 1-OB5 MON 2574 drw 02 FUNCTIONAL BLOCK DIAGRAMS

FAST CMOS BUFFER/CLOCK DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES 9.1 2 PIN CONFIGURATIONS PIN DESCRIPTION IDT49FCT805 IDT49FCT806 2574 tbl 01 OB 1OA 1 OA 3 GND A OA 4 OA 5 OA 2 OE A INA OB 2 OB 3 GND B OB 4 MON INB OB 5 OE B VCCB1 10 11 DIP/SOIC/SSOP/QSOP/CERPACK TOP VIEW P20-1 D20-1 SO20-2 SO20-7 SO20-8 E20-1 V CCA 2574 drw 03 NC (1) OB 1OA 1 OA 3 GND A OA 4 OA 5 NC OA 2 OE A INA OB 2 OB 3 GND B OB 4 MON INB OB 5 OE B VCCB1 10 11 DIP/SOIC/CERPACK TOP VIEW P20-1 D20-1 SO20-2 E20-1 VCCA 2574 drw 05 (1) OB 2 OB 3 GND B OB 4 OB 5 INDEX LCC TOP VIEW 3 2 20 19 91 0 1 1 1 2 1 3 L20-2 OA 3 GND A OA 4 OA 5 NC 2574 drw 06 OE A INA INB OE B MON OA 2 OA 1 VCCA VCCB OB 1 (1) Pin Names Description OEA, OEB 3-State Output Enable Inputs (Active LOW) INA, INB Clock Inputs OA n, OBn Clock Outputs (FCT805) OAn, OBn Clock Outputs (FCT806) MON Monitor Output (FCT805) MON Monitor Output (FCT806 INDEX LCC TOP VIEW 3 2 20 19 91 01 1 1 2 1 3 L20-2 OA 3 GND A OA 4 OA 5 NC OB 2 OB 3 GND B OB 4 OB 5 2574 drw 04 OE A INA INB OE B MON OA 2 OA 1 VCCA VCCB OB 1 (1) NOTE: 1. Pin 8 is not internally connected on devices with a "K" prefix in the date code. On older devices, pin 8 is internally connected to GND. To insure compatibility with all products, pin 8 should be connected to GND at the board level.

FAST CMOS BUFFER/CLOCK DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES 9.1 3 ABSOLUTE MAXIMUM RATINGS (1) CAPACITANCE (TA = +25°C, f = 1.0MHz) NOTE: 1. This parameter is measured at characterization but not tested. 2574 lnk 04 Symbol Parameter (1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 4.5 6.0 pF COUT Output Capacitance VOUT = 0V 5.5 8.0 pF DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC – 0.2V Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10% Symbol Parameter Test Conditions (1) Min. Typ.(2) Max. Unit VIH Input HIGH Level Guaranteed Logic HIGH Level 2.0 — — V VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V II H Input HIGH Current(5) VCC = Max. V I = VCC —— ±1 µA II L Input LOW Current(5) VCC = Max. V I = GND —— ±1 µA IOZH Off State (HIGH Z)(5) VCC = Max. V O = VCC —— ±1 µA IOZL Output Current(5) VO = GND —— ±1 µA VIK Clamp Diode Voltage V CC = Min., IIN= –18mA — –0.7 –1.2 V IOS Short Circuit Current V CC = Max.(3), VO = GND –60 –120 — mA VOH Output HIGH Voltage V CC = 3V, VIN = VLC or VHC, IOH = –32µAV HC V CC —V VCC = Min. I OH = –300µAV HC VCC — VIN = VIH or VIL IOH = –12mA MIL. IOH = –15mA COM'L. 3.6 4.3 — IOH = -24mA MIL. IOH = -24mA COM'L. 2.4 3.8 — VOL Output LOW Voltage V CC = 3V, VIN = VLC or VHC, IOL = 300µA — GND V LC V VCC = Min. I OH = 300µA — GND V LC (4) VIN = VIH or VIL IOL = 48mA MIL. — 0.3 0.55 IOL = 64mA COM'L. VH Input Hysteresis for all inputs — — 200 — mV ICC Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 5 500 µA NOTES: 2574 tbl 05 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. The test limit for this parameter is ± 5µA at T A = –55°C. NOTE: 2574 tbl 02 1. H = HIGH, L = LOW, Z = High Impedance FUNCTION TABLE (1) Outputs Inputs 49FCT805 49FCT806 OEOEA , OEOEB INA , INB OA n, OBn MON OAOAn, OBOBn MONMON LLLL H H LHHHL L HLZLZ H HHZHZL Symbol Description Max. Unit VTERM (2) Terminal Voltage with Respect to GND –0.5 to +7.0 V VTERM (3) Terminal Voltage with Respect to GND –0.5 to VCC +0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +120 mA NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed V CC by +0.5V unless otherwise noted. 2. Input and VCC terminals. 3. Output and I/O terminals. 2574 lnk 03

FAST CMOS BUFFER/CLOCK DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES 9.1 4 POWER SUPPLY CHARACTERISTICS NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input; (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ΔICC DH N T + ICCD (fO N O ) ICC = Quiescent Current (ICCL, ICCH and ICCZ ) ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V) D H = Duty Cycle for TTL Inputs High N T = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fO = Output Frequency N O = Number of Outputs at fO All currents are in milliamps and all frequencies are in megahertz. 2574 tbl 06 Symbol Parameter Test Conditions (1) Min. Typ.(2) Max. Unit ΔICC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN = 3.4V(3) — 1.0 2.5 mA ICCD Dynamic Power Supply Current(4) VCC = Max. Outputs Open OE A = OEB = GND 50% Duty Cycle VIN = VCC VIN = GND — 0.15 0.20 mA/ MHz/bit IC Total Power Supply Current(6) VCC = Max. Outputs Open fo= 10MHz V IN = VCC VIN = GND — 1.5 2.5 mA 50% Duty Cycle OEA = OEB =VCC Mon. Output Toggling VIN = 3.4V VIN = GND — 2.0 3.8 VCC = Max. Outputs Open fo = 2.5MHz V IN = VCC VIN = GND — 4.1 6.0 (5) 50% Duty Cycle OEA = OEB = GND Eleven Outputs Toggling V IN = 3.4V VIN = GND — 5.1 8.5 (5)

FAST CMOS BUFFER/CLOCK DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES 9.1 5 SWITCHING CHARACTERISTICS OVER OPERATING RANGE (3,4) 2574 tbl 07NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. t PLH , tPHL , tSK (t) are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC , operating temperature and process parameters. These propagation delay limits do not imply skew. IDT49FCT805/806 IDT49FCT805A/806A Com'l. Mil. Com'l. Mil. tPLH tPHL Propagation Delay INA to OAn, INB to OBn C L = 50pF R L = 500Ω tR Output Rise Time — 1.5 — 1.5 — 1.5 — 1.5 ns tF Output Fall Time — 1.5 — 1.5 — 1.5 — 1.5 ns tSK (o) Output skew: skew between outputs of all banks of same package (inputs tied together) tSK (p) Pulse skew: skew between opposite transitions of same output (|tPHL -tPLH |) tSK (t) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade tPZL tPZH Output Enable Time OEA to OAn, OEB to OBn tPLZ tPHZ Output Disable Time OEA to OAn, OEB to OBn

FAST CMOS BUFFER/CLOCK DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES 9.1 6 TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS Pulse Generator R T D.U.T. VCC VIN C L V OUT 50pF 500Ω 500Ω 7.0V ENABLE AND DISABLE TIME SWITCH POSITION Test Switch Disable LOW Enable LOW Closed Disable HIGH Enable HIGH Open 2574 lnk 11DEFINITIONS: C L = Load capacitance: includes jig and probe capacitance. R T = Termination resistance: should be equal to ZOUT of the Pulse Generator. 2574 drw 07 PACKAGE SKEW - t SK (t)PULSE SKEW - tSK (p) tPLH1 OUTPUT 1 OUTPUT 2 tSK(o) tPLH2 VOH 1.5V 1.5V VOL VOH 1.5V VOL INPUT tPHL1 tPHL2 tSK(o) tSK(o) = |tPLH2 - tPLH1 | or |tPHL2 - tPHL1 | CONTROL INPUT OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH 1.5V 3.5V SWITCH CLOSED SWITCH OPEN V OL VOH0.3V 0.3V tPLZtPZL tPZH tPHZ 3.5V 1.5V 1.5V ENABLE DISABLE VOH tPLH tPHL VOL 1.5V 1.5V tR tF 2.0V 0.8V INPUT OUTPUT INPUT tPLH1 PACKAGE 1 OUTPUT PACKAGE 2 OUTPUT tSK(t) tPLH2 VOH 1.5V 1.5V VOL VOH 1.5V VOL tPHL1 tPHL2 tSK(t) tSK(t) = |tPLH2 - tPLH1 | or |tPHL2 - tPHL1 | tPLH tPHL VOH 1.5V 1.5V VOL tSK(p) = |tPHL - tPLH | INPUT OUTPUT Package 1 and Package 2 are same device type and speed grade 2574 drw 092574 drw 08 2574 drw 10 2574 drw 11 PACKAGE DELAY OUTPUT SKEW - t SK (o) ENABLE AND DISABLE TIMES NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH 2. Pulse Generator for All Pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns 2574 drw 12

FAST CMOS BUFFER/CLOCK DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES 9.1 7

ORDERING INFORMATION

X Process/ Blank B P D E L SO PY Q 805 806 805A 806A Commercial (0°C to +70°C) MIL-STD-883, Class B (–55°C to +125°C) Plastic DIP CERDIP CERPACK Leadless Chip Carrier Small Outline IC Shrink Small Outline IC Quarter-size Small Outline IC Non-Inverting Buffer/Clock Driver Inverting Buffer/Clock Driver TemperatureRange IDT49FCT 2574 drw 17