4731B FAIRCHILD | Alldatasheet
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Technical content
DESCRIPTION — The 47318/47318X is a Quad 64-Bit Shift Register each with separate Serial Data Tosi symeo Inputs (Da-Dp), Clock Inputs (CPa-CPp) and Data Outputs (Ag34-Qg30) from the 64th register position. Information present on the Serial Date Inputs is shifted into the first register position and all the data in_the register is shifted one position to the right on a HIGH-to-LOW transition of the Clock Inputs ofr (CPa-CPp). oN Low impedance outputs are provided for direct interface to TTL. The 47318 is specified to operate woe over a power supply voltage range of 4.5 V to 12.5 V, the 47318X is specified to operate over a power supply voltage range of 3 V to 15 V. ¢ FREQUENCIES UP TO 8 MHz AT Vpp = 10V coc © SERIAL-TO-SERIAL DATA TRANSFER oon ¢ SEPARATE CLOCK INPUTS, DATA INPUTS AND nol cre FULLY BUFFERED OUTPUTS FOR EACH REGISTER ¢ DIRECT INTERFACE TO TTL ¢ 14PIN PACKAGE oo, PIN NAMES | owe} —1 Pap Serial Data Inputs | sol ere CPatPp Clock Input (H->L Edge-Triggered) 53-0630 Butfered Outputs from the 64th Register Position a0 fp 2 Vpo = Pints vss > Pin 7 7 ‘CONNECTION DIAGRAMS LOGIC DIAGRAM Dip (TOP VIEW)
14 OF A 4731B/47318X
| 1000 Fe @-"@-Or© 2E]es0 sf Bodo > 8 se 2 Fro re «Osa | se oO ofr ocr ° 9 | | ej te = Do rE ss Sess Fe O-©-O-O FLATPAK (TOP VIEW) ----p> a >» a cn) 2 1 f8nc yoo 16 20nc | Gs re80 01 Fe62 ny, stolen ona of ce fcr ol o se ome 63 = O-@-O-@ so = ae ~~ sce ato Vpp" Fin 14 7). nc 10 Veg oPin? .. ose O =Pin Number = * 7-259
FAIRCHILD CMOS * 4731B/4731BX DC CHARACTERISTICS: Vpp as shown, Vsg = 0 V (See Note 1) ‘AC CHARACTERISTICS AND SET-UP REQUIREMENTS: Vip as shown, Vsg = 0 V, Ta = 25°C (See Note 2) | SYMBOL, PARAMETER Vop=5V Vpp = 18V_|units | Test conpiTIONS a ca er a PR *PLH = 190 | 450 96 | 200 os | 160 {PHL ‘opegation Delay, CP to Ogg 190 | 450 95 | 200 65 | 160 | TTL 46 | 135 3 | 70 20 | 45 | iqCP_ | Minimum Put Wath 360 | a0. 960_| so Ya6 aoe = | ts ‘Set-Up Time D to GP 100 | -20 | 40/12] 40 | -7 | Tes cone th Hold Time D to GP 100 | 35 4o| 12 ao} ae "s | MAX | inote 3) Pst«l Taj el | | " SWITCHING WAVEFORMS cP 50% 50% 50% ° = AND SET-UP AND HOLD TIMES, D To CP 7-260