NCV4275_V01 ONSEMI | Alldatasheet
Document overview
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- PDF pages: 14
Technical content
Features
- 5.0 V , ±2% Output V oltage
- 450 mA Output Current
- V ery Low Current Consumption
- Active Reset Output
- Reset Low Down to VQ = 1.0 V
- 500 mV (max) Dropout V oltage
- Fault Protection ♦ +45 V Peak Transient V oltage ♦ −42 V Reverse V oltage ♦ Short Circuit ♦ Thermal Overload
- Pb−Free Packages are Available
- NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes I D Q GND RO Current Limit and Saturation SenseBandgap Reference Thermal Shutdown Reset Generator
Figure 1. Block Diagram
ORDERING INFORMATION
A = Assembly Location WL, L = Wafer Lot Y = Year WW = Work Week G = Lead Free Indicator 4275G ALYWW NC V4275 AWLYWWG See detailed ordering and shipping information in the dimensions section on page 12 of this data sheet.
http://onsemi.com PIN FUNCTION DESCRIPTION Pin No. Symbol Description ÑÑÑÑ ÑÑÑÑ ÑÑÑÑÑÑ ÑÑÑÑÑÑ I ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ Input; Battery Supply Input Voltage. Bypass to ground with a ceramic capacitor. ÑÑÑÑ ÑÑÑÑ ÑÑÑÑÑÑ ÑÑÑÑÑÑ RO ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ Reset Output; Open Collector Active Reset (accurate when I > 1.0 V). ÑÑÑÑ ÑÑÑÑ ÑÑÑÑÑÑ ÑÑÑÑÑÑ GND ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ Ground; Pin 3 internally connected to tab. ÑÑÑÑ ÑÑÑÑ ÑÑÑÑÑÑ ÑÑÑÑÑÑ D ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ Reset Delay; timing capacitor to GND for Reset Delay function. ÑÑÑÑ ÑÑÑÑ ÑÑÑÑÑÑ ÑÑÑÑÑÑ Q ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ Output; ±2.0%, 450 mA output. 22 /C0109F, ESR < 5.0 Ω to ground. MAXIMUM RATINGS† Rating Symbol Min Max Unit Input Voltage VI −42 45 V Input Peak Transient Voltage VI − 45 V Output Voltage VQ −1.0 16 V Reset Output Voltage VRO −0.3 25 V Reset Output Current IRO −5.0 5.0 mA Reset Delay Voltage VD −0.3 7.0 V Reset Delay Current ID −2.0 2.0 mA Input Voltage Operating Range VI 5.5 42 V ESD Susceptibility −Human Body Model −Machine Model 4.0 200 kV V Junction Temperature TJ −40 150 °C Storage Temperature Tstg −55 150 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. LEAD TEMPERATURE SOLDERING REFLOW (Note 1) Lead Free, 60 sec−150 sec above 217 TSLD − 265 Peak °C Leaded, 60 sec−150 sec above 183 TSLD − 240 Peak °C THERMAL CHARACTERISTICS Characteristic Test Conditions (Typical Value) Unit DPAK 5−PIN PACKAGE Min Pad Board (Note 2) 1″ Pad Board (Note 3) Junction−to−Tab (psi−JLx, /C0121JLx) 4.2 4.7 C/W Junction−to−Ambient (R/C0113JA, /C0113JA) 100.9 46.8 C/W D2PAK 5−PIN PACKAGE Junction−to−Tab (psi−JLx, /C0121JLx) 3.8 4.0 C/W Junction−to−Ambient (R/C0113JA, /C0113JA) 74.8 41.6 C/W 1. PR R IPC / JEDEC J−STD−020C †During the voltage range which exceeds the maximum tested voltage of I, operation is assured, but not specified. Wider limits may apply. Thermal dissipation must be observed closely.
Figure 10. Current Consumption Iq vs. Figure 11. Charge Current ID,C vs. Temperature TJ
0 ID,C (/C0109A)5
Figure 12. Delay Switching Threshold VDU, VDL vs.
Figure 14. Reset Timing
http://onsemi.com Calculating Power Dissipation in a Single Output Linear Regulator The maximum power dissipation for a single output regulator (Figure 15) is: PD(max) /C0043[VI(max) /C0042VQ(min)]IQ(max) (1) /C0041VI(max)Iq where VI(max) is the maximum input voltage, VQ(min) is the minimum output voltage, IQ(max) is the maximum output current for the application, Iq is the quiescent current the regulator consumes at IQ(max). Once the value of P D(max) is known, the maximum permissible value of R /C0113JA can be calculated: R/C0113JA /C0043150° C /C0042TA PD (2) The value of R/C0113JA can then be compared with those in the package section of the data sheet. Those packages with R /C0113JA’s less than the calculated value in Equation 2 will keep the die temperature below 150 °C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. SMART REGULATOR® Iq Control Figure 15. Single Output Regulator with Key the outside environment will have a thermal resistance. R/C0113JC appears in the package section of the data sheet. data sheets of heatsink manufacturers.
Table 2. D2PAK 5−Lead Thermal RC Network Models NOTE: Bold face items represent the package without the external thermal system.
http://onsemi.com 100 1.0 0.1 0.01 PULSE WIDTH (sec) R/C0113JA 788 mm2 C°/W Non−normalized Response 50% Duty Cycle 20% 10% 100 1.0 0.1 0.01 PULSE WIDTH (sec) R/C0113JA 736 mm2 C°/W Non−normalized Response 50% Duty Cycle Figure 22. Duty Cycle for 1” Spreader Boards, DPAK 5−Lead Figure 23. Duty Cycle for 1” Spreader Boards, D2PAK 5−Lead Device Package Shipping† NCV4275DTRK DPAK
2500 Tape & ReelNCV4275DTRKG DPAK
(Pb−Free) NCV4275DS D2PAK
50 Units/RailNCV4275DSG D2PAK
(Pb−Free) NCV4275DSR4 D2PAK
800 Tape & ReelNCV4275DSR4G D2PAK
(Pb−Free) †For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel P ackaging Specifications Brochure, BRD8011/D.
http://onsemi.com PACKAGE DIMENSIONS D A K B RV S F L G 5 PL M0.13 (0.005) T E C U J H −T− SEATING PLANE Z DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.235 0.245 5.97 6.22 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.020 0.028 0.51 0.71 E 0.018 0.023 0.46 0.58 F 0.024 0.032 0.61 0.81 G 0.180 BSC 4.56 BSC H 0.034 0.040 0.87 1.01 J 0.018 0.023 0.46 0.58 K 0.102 0.114 2.60 2.89 L 0.045 BSC 1.14 BSC R 0.170 0.190 4.32 4.83 S 0.025 0.040 0.63 1.01 V 0.035 0.050 0.89 1.27 Z 0.155 0.170 3.93 4.32 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. R1 0.185 0.210 4.70 5.33 1234 5 DPAK 5, CENTER LEAD CROP DT SUFFIX CASE 175AA−01 ISSUE A 6.4 0.252 0.8 0.031 10.6 0.417 5.8 0.228 SCALE 4:1 /C0466mm inches/C0467 0.34 0.013 5.36 0.217 2.2 0.086 SOLDERING FOOTPRINT* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com PACKAGE DIMENSIONS D2PAK, 5 LEAD DS SUFFIX CASE 936A−02 ISSUE C
5 REF
A 123 K B S H D G C E M L PN R V U TERMINAL 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A AND K. 4. DIMENSIONS U AND V ESTABLISH A MINIMUM MOUNTING SURFACE FOR TERMINAL 6. 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.025 (0.635) MAXIMUM. DIM A MIN MAX MIN MAX MILLIMETERS 0.386 0.403 9.804 10.236 INCHES B 0.356 0.368 9.042 9.347 C 0.170 0.180 4.318 4.572 D 0.026 0.036 0.660 0.914 E 0.045 0.055 1.143 1.397 G 0.067 BSC 1.702 BSC H 0.539 0.579 13.691 14.707 K 0.050 REF 1.270 REF L 0.000 0.010 0.000 0.254 M 0.088 0.102 2.235 2.591 N 0.018 0.026 0.457 0.660 P 0.058 0.078 1.473 1.981 R 5 REF S 0.116 REF 2.946 REF U 0.200 MIN 5.080 MIN V 0.250 MIN 6.350 MIN /C0095/C0095 M0.010 (0.254) T −T− OPTIONAL CHAMFER 8.38 0.33 1.016 0.04 16.02 0.63 10.66 0.42 3.05 0.12 1.702 0.067 SCALE 3:1 /C0466mm inches/C0467 SOLDERING FOOTPRINT* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, in cluding without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney f ees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 NCV4275/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.