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4116 FAIRCHILD | Alldatasheet

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A Fairchild Power Switch (FPS) based on Switched Mode Power Supply for LCD Monitor Use www.fairchildsemi.com ©2002 Fairchild Semiconductor Corporation 1. Introduction This application note describes a complete flyback switched mode power supply that uses a Fairchild Power Switch. The MOSFET and its control IC are built into one package. The MOSFET is in fact a SenseFET. Various protection features are also included. Fairchild Power Switch can enhance the reliability and productivity of the system when compared to other designs. The FS6M series has a more avalanche rugged SenseFET than the previous Fairchild Power Switch series. The FS6M series features include burst mode operation for low power consumption in DPMS mode. This application note describes the features and design considerations of the FS6M series for the LCD monitor power supply and adaptor, which improves upon the existing KA5X-series. FS6Mxx652RT has one package type: TO-220F-5L as shown below. Fairchild Power Switch is classified according to the voltage and current rating of the internal SenseFET. The FS6M series parts with absolute voltage and absolute current ratings of 650V/7A and 650V/12A. When in power saving mode, the FS6M series pulls down the output voltages to a predetermined level and enters burst mode with a switching frequency of 70kHz. Rev. 1.0.0 Figure 1-1. Package Line-Up 1 2 3 4 5 TO-220F-5L FSC 6M07652R Table 1: Product Line-up (LCD Monitor Application) Product Rating Package FS6M07652RTC 7A/650V TO-220F-5L FS6M12653RTC 12A/650V TO-220F-5L

Features

2.1 Internal Block and Features

Pulse by pulse current limiting
Fixed frequency(70kHz)
Internal Burst Mode Controller for DPMS
Internal high voltage SenseFET (QFET)
World wide Input voltage
Optimum Gate Driver
Low Standby Power Consumption (Low start-up current & low operating current)
Various Internal Protection Circuits - Over V oltage Protection (OVP) (Auto-restart) - Over Load Protection (OLP) (Auto-restart) - Over Current Latch (OCL) (Auto-restart) - Thermal Shutdown Protection (TSD) (Latch)
S o f t s t a r t S R Q S R Q S R Q TS D (Tj=160℃) Ifb 11113333 5555 4444 2222 Vref Rsenese 2.5R R Vref Internal Bias Vref UVLO Ron Roff PWM OCL Burst mode controller Filter (130nsec) Power-on Reset (Vcc=6.5V) UVLO Reset (Vcc=9V) OLP OVP Vth=7.5V Vcc Vth=33V Vth=2V Vfb Offset Idelay Vcc Vfb Vth=1V Vcc Vth=11V/12V OSC Vref Figure 2-1. Internal Block Diagram

2.2 Starting Resistance Design And UVLO

Input voltage range: 80 ~ 265V (Ac) At Minimum Input V oltage Va(dc), the starting resistance is and, at Maximum Input V oltage Va(dc), the power loss is At the minimum voltage, the starting resistance is set to ensure that the current through it is larger than the maximum start up current for the Fairchild Power Switch (170 µA). The starting resistor produces a starting current, which charges the V CC capacitor. The Fairchild Power Switch starts switching the internal SenseFET when the VCC voltage becomes greater than 15V (the start voltage). Once it starts to operate, the current drawn by the control IC suddenly increases to 10mA. The starting resistor cannot source this and consequently, the transformer auxiliary winding supplies most of the IC current after start up. The start time will be delayed if the V CC capacitor is too large, so a moderate size capacitor should be used. Generally, 22~47µF capacitor values are considered good. This operation is described in Figure 2-2. V CC only needs to be maintained above 9V after starting, but should be set so that OVP (Min. V CC voltage above 30V) is not triggered. Approximately 24V is appropriate for the VCC voltage. Figure 2-2. Start-up Waveform Figure 2-3. UVLO Block

2.3 Fairchlid Power Switch Protection Circuit

The Fairchild Power Switch has several self-protection circuits, which can be used without adding external components, thus providing system reliability without increasing cost. Under auto restart mode, protection circuits become deactivated when V CC falls below 9V (stop voltage), after which Fairchild Power Switch tries to restart. Under latch mode, protection circuits become deactivated only when V CC falls to 6.5V (reset voltage), then Fairchild Power Switch tries to restart. When V CC drops to 9V due to latch protection, the operating current of the IC drops from 10mA to 100 µA. Therefore the V CC capacitor starts to charge towards 15V through the starting resistor. For V CC to fall to 6.5V (reset voltage), the input voltage must be removed.

2.3.1 Over Load Protection (OLP)

Overload as described here is different from a load short circuit. It is a condition where a load becomes greater than the preset level, though it is operating normally. Essentially, the overload protection circuit forces the Fairchild Power Switch to stop its operation if the load draws a higher current then the predetermined maximum value. A problem associated with this type of protection circuit is that it can trigger erroneously on load transients. As a security measure, the Fairchild Power Switch triggers the protection circuit after a specific time delay. This avoids false triggering on short load transients. The above operations are executed as follows. Since the Fairchild Power Switch uses current mode control, maximum switch current is limited internally. For a fixed input voltage, this limits the power. Therefore, if the power at the output exceeds this maximum, V O shown in figure 2-4 becomes less than the set voltage, and the KA431(LM431) can draw only the allowed minimum current. As a result, the photo-transistor’s current becomes zero. If all the current of the 0.9mA current source flows through the internal resistor (2.5R+R= 3.3K), Vfb becomes approximately 3V . At this time the 2µA current source starts to charge Cfb. Because the photo transistor’s current is zero, Vfb continues to increase. The Fairchild Power Switch shuts down when Vfb reaches 7.5V . The shutdown delay time can be easily determined as the time required to increase the Cfb Va dc() 113V (Vp = 80 2 )= Rstart 113 200 µ A 565K=÷= Va dc() 373V (Vp=265 2 )≅ Pl o s s() Vacd c() 2 Select: Rstart =565KΩ /0.5W ICC [mA] 0.1 6V 9V 15V V Z [V] VCC Power On Reset Range Fairchild Power Switch(SPS) UVLO Cvcc Latch Comparator Power On Reset Good Logic Vz Internal Bias Rstart 15V/9V Vref DC Link

©2002 Fairchild Semiconductor Corporation by 4.5V (from 3V to 7.5V) using 2 µA. When Cfb is 47nF , delay time is approximately 100ms. Fairchild Power Switch will not shut down within this time. Increasing Cfb to get a longer delay time can become a problem, because Cfb is an important parameter in determining the SMPS dynamic response time. One method to delay the shutdown time is to add a resistor between the F/B pin and GND and to subtract the amount of the delay current. When the 4. 7M Ω resistor was used experimentally with Cfb of 47nF, shutdown time was almost doubled to 180~200ms. When Vfb voltage is 7.5V , the current flowing to the 4.7M Ω resistor is approximately 1.6µA. To obtain the same results, a zener diode (approx. 3.9V) can be series connected to a capacitor (47nF) which can then be parallel connected to Cfb as shown in Figure 2.4. Figure 2-4. Fairchild Power Switch (FPS) Long Delayed Shutdown Cfb Cd KA431 6 1 0.9mA Idelay 7.5V Vz=3.9V Vo Fairchild Power Switch(SPS) 2 3 OLP Latch 2uA Vfb Vfb* (LM431)

2.3.2 Over Voltage Protection

Fairchild Power Switch has self protection features that function even when abnormal states occur such as an open or short circuits in the feedback loop. When the feedback terminal shorts as viewed from the primary side, the feedback terminal voltage becomes zero and prevents switching from starting. If it opens, the protection circuit acts as an over voltage protection circuit. When there is an abnormal state or a possibility of opening due to improper soldering etc. in the secondary side feedback circuit, the primary side continues to switch using the maximum set current until the protection circuit starts to operate. In such instances, it is common for the secondary side voltage to become greater than the rated voltage, which can lead to a fuse blowing or, more seriously, a fire if a protection circuit is not in place. Even if this was not the case, ICs immediately connected to the secondary output without a regulator can be destroyed. Therefore, the Fairchild Power Switch employs the over voltage protection circuit to protect against feedback anomalies. The Fairchild Power Switch V CC is proportional to the output voltage. When the Fairchild Power Switch V CC exceeds 33V , the over voltage protection feature is triggered. Therefore, VCC must be maintained at less than 30V during normal operation. 2.3.3 Over Current Protection (OCP). The existing concept of Ipeak control does not go beyond limiting the amount of current during normal operation. The OCP block prevents damage to Fairchild Power Switch from abnormal states, such as a diode or a load short. A diode or a load short causes a large current to flow through the SenseFet for a short time. This can be tens of amperes. The leading edge blanking circuit sets the minimum turn on time at 600nS. Tens of amperes for 600nS could destroy the Fairchild Power Switch and so the OCL block senses this instantaneous current and latches like the existing protection circuit.

©2002 Fairchild Semiconductor Corporation Figure 2-5. Over Current Latch (OCL) 3. Display Power Management Signalling (DPMS) Design Method With high interest in power management recently, much effort has been concentrated in implementing the DPMS mode. The FS6S series uses burst mode for DPMS in order to achieve cost effectiveness and minimize the power consumption.

3.1 Burst Mode Operation

The FS6S-series has a particularly useful function for the DPMS mode: burst mode operation. Normally, customers use an auxiliary power system for DPMS in large monitors. This method can lower power consumption but increases costs. The FS6S-series can drop the output voltage with only minimal external components by using burst mode. This reduces power loss in DPMS mode. In the DPMS mode, Vfb is pulled low by the external micro-controller.

3.2 Implementation of the Burst Mode

The required circuit for implementing the burst mode is shown in Figure 4-1. Q1, D1, Rx, R5 and R6 are added to the secondary feedback network. During normal operation, Q1 is on, which isolates Rx from the feedback network. V o2 is sensed and the amplified error is transferred to the primary side through the photo coupler. By turning off Q1, Rx is connected to the feedback network. The error amplifier increases the current through the photo coupler, and thus Vfb of the FS6S-series drops to zero. Therefore no additional opto coupler is required to switch into burst mode. Rx can be calculated by the following equation when KA431(LM431) is used as an error amp. where V o1 and V o2 are the reduced voltages in burst mode. 300ns Figure of OCL Operation Minimum Turn-on Time OCL Level Latch Rsense R S Rx R7 R8 Vol 2.5– VD1–()× Vo1 R7 IbIc R2 R3 R5 KA431 6 1 Micom signal Ia Vo2 Rx Figure 3-1. Rx Setting circuit for Burst mode operation

3.3 Experiment of the Burst mode operation

3.3.1 Vcc/Vds/ Vregin/Vregout waveform

at the Burst Mode operation Figure 3-2. Vcc / Vds at the Burst mode operation Figure 3-3. Vregin / Vregout at the Burst mode operation Experimental results are shown in, Figure 4-2 and Figure 4-3. With minimum load and normal operation: Vac = 240V , Pin = 4.82W, V CC = 18V , V o = 12.24V. When Fairchild Power Switch operates Burst Mode: Pin = 2.72W, V CC = 11~12V , V o = 6.7V .

4.1 Flyback converter demo circuit for LCD Monitor

Figure 4-1. Fairchild Power Switch (FPS) Flyback Converter DEMO BOARD for the LCD Monitor R201 C106 1uF/50V R209 0.22k Circuit for Burst modeo R205 2.7K 5D-9 R104 C301 4.7nF C102 100nF/275VAC IC301 HC11A817A SW201 Micom Sig' R207 4.7K 60mA Burs mode KA7805

2 Vin

R101 560k/0.5W R102 390K/1W R204 0.85K R208 4.7K T1:EFD3030 6 7 D202 MBRF1045 C104 22nF/630V RT101 C101 100n/275VAC IC201 KA431 C205 47nF D202 TVR10G D203 TVR10G 2KBP06M3N257 DB101 +C203 1000uF/10V IC101 FS6M07652R Vfb Vcc GND Drain S/S F101 FUSE R103 47K/2W L201 1.5A L202 + C103 82uF/400V R210 +C202 470uF/25V 12V C206 100u/10V C105 0.22nF/1KV +C201 470uF/25V R206 2.7k R203 1.2k 3.3V 250V 2A R202 1.2k +C204 1000uF/10V Q201 D201 UGF8DT C108 33uF/50V D201 UF4007 Line Filter: LF101:13mH C107 47n/50V

4.2 Part List for Fairchild Power Switch (FPS) Flyback

Converter DEMO BOARD for the LCD Monitor Part Value Note Part Value Note Fuse C204 1000 µF 10V Electrolytic Capacitor F101 250V/2A - C205 47nF 50V Electrolytic Capacitor NTC C206 100 µF 10V Electrolytic Capacitor RT101 5D-9 - C301 4.7nF Polyester Film Cap Resistor -- - R101 560K 1/2W - - - R102 390K 1W - - - R103 47K 2W - - - R104 22 1/4W - - - R201 1K 1/4W Diode R202 1.2K 1/4W D101 UF4007 - R203 1.2K 1/4W D102 TVR10G - R204 0.9K 1/4W D201 UGF8DT - R205 2.7K 1/4W D202 MBRF1045 - R206 2.7K 1/4W D203 TVR10G - R207 4.7K 1/4W - - - R208 4.7K 1/4W - - - R209 0.22K 1/4W - - - R210 38 1/4W Bridge Diode Capacitor BD1 2KBP06M 3N257 - C101 100nF 275VAC Box Capacitor Inductor C102 100nF 275VAC Box Capacitor L201 L202 5µH 6µH C103 82 µF 400V Electrolytic Capacitor Film Capacitor C104 22nF 630V Line Filter C105 0.22nF 1KV Ceramic Capacitor LF101 13mH - C106 1 µF 50V Electrolytic Capacitor IC C107 47nF 50V Electrolytic Capacitor IC101 FS6S07652RT FPSFPS(2A 650V): Fairchild C108 33 µF 50V Electrolytic Capacitor IC201 KA431 (LM431) Voltage reference Fairchild - - - IC202 KA7805 Voltage regulator Fairchild - - - IC301 HC11A817A Photo Coupler/QT C201 470 µF 25V Electrolytic Capacitor Q201 KSC945 Transistor Fairchild C202 470 µF 25V Electrolytic Capacitor - - - C203 1000 µF 10V Electrolytic Capacitor - - -

4.3 Transformer Specification

Figure 4-2. FS6M07652RT Transformer Spec for LCD Monitor Np/2 NV2 NV1 * REMOVEDP INN O .: #4 * THE ' ●'M ARKS ARE START POINT. 2222....W I N D I N GWINDINGWINDINGWINDING SPECIFICATIONSPECIFICATIONSPECIFICATIONSPECIFICATION 3333....E L E C T I C A LELECTICALELECTICALELECTICAL CHARACTERISTICCHARACTERISTICCHARACTERISTICCHARACTERISTIC CLOSURE PIN SPEC. REMARKS INDUCTANCE 1 - 3 650uH ±1 0% 100KHz, 1V LEAKAGE L 1 - 3 10uH M AX. 2ndA LL SHORT 4444....C O R ECORECORECORE &&&&B O B B I NBOBBINBOBBINBOBBIN CORE : EFD3030 BOBBIN : EFD3030 Nvcc 2.5㎜2.5㎜ NO. PIN(S → F) WIR E TURNS WINDING ME THOD Np/2 2 →1 0.3φ× 1 40 SOLENOID WINDING INSULATION :P OLYESTERT A PE t=0.050 mm, 2Layer Nv2 8 → 7 0.3φ× 4 4 CENTERW INDING INSULATION :P OLYESTERT A PE t=0.050 mm, 2Layers Nvcc 5 → 6 0.2φ× 1 24 CENTERW INDING INSULATION :P OLYESTERT A PE t=0.050 mm, 2Layers Nv1 12 →1 0 0.3φ× 2 13 CENTERW INDING INSULATION :P OLYESTERT A PE t=0.050 mm, 2Layers Np/2 3 → 2 0.3φ× 1 40 SOLENOID WINDING OUTERI NSULATION :P OLYESTERT A PE t=0.050 mm, 2Layers Np/2 NP Nvcc 11 2 Nv1 Nv2 2.5㎜ 2.5㎜ 6㎜ 6㎜

©2002 Fairchild Semiconductor Corporation 5. Example Transformer Design for a Monitor SMPS When designing the transformer for a LCD monitor SMPS several parameters should be taken into account. Input and output voltages will determine the windings. Consideration should be given to the switching frequency range, continuous and discontinuous current modes and core size. A typical design sequence is as follows: 5-1. Determine System Specifications: Output Power, PO = 30W (at 12 and 3.3V) V ac input range = 85 to 265Vac (universal input), 60Hz Efficiency η ≥ 70% 5-2. Determine Minimum Dc Input Voltage (Vmin), Primary Peak Current (Ipeak) And Primary Rms Current (Irms). When the SMPS operates at the same output power for all ac inputs, the maximum peak drain current occurs at the minimum input voltage (V min). Also, V min will exhibit the largest ripple voltage (∆V) at that time. The dc link capacitor Cin is charged and discharged at 120Hz (Figure 5-1). Figure 5-1. If power output stays constant as the ac input varies, peak current drain will occur at V min. Also, the largest ripple on Vmin occurs at this point; dc link capacitor Cin charges/discharges at 120Hz. a. Calculate energy discharge time, Td: b. Calculate dc link capacitor, Cin: c. For this charger: d. Assume 20Vac of ripple, from which: However, 132µF is not a standard value of capacitor. Hence, to calculate the true V min, select the nearest standard value for Cin (82µF) and substitute it above, solving for Vmin = 86V . e. Primary current reaches its Ipeak value at Vmin and maximum duty (D max). Also in most current mode SMPSs, Dmax should be kept below 50% to eliminate any possibility of sub harmonic instabilities. Primary Irms can be derived from Ipeak : 5-3. Determine Primary Inductance, Lp : This is the primary inductance needed to transfer the required power from primary to secondary. It is recommended to select the minimum synchronous frequency as the switching frequency, f s, of the monitor application. 5-4. Determine Core Size: The core used must be able to store the required peak energy in a small gap without saturation and with acceptable core losses. The following equation is commonly used to ensure proper core size (area product) in a saturation limited case. where, A w = magnetic window area, cm2 Ae = magnetic cross section area, cm2 K = core utilization factor, 0.2 B m = maximum flux density, Teasel; therefore, Vmin,peak Vmin F= 120 Td T=1/120 Td 1 fs----- 1 4---× 1 arc Vmin π 2--- Win Pin T× d Win input energy during discharge= Pin input power= Win 1 2--- Cin V2min peak, V2min–()⋅⋅= Td 6.78 msV min peak, 85 2 V min 85 2 20–=,=()= Win Pout Cin 2Wi n V2min peak, V2min– 20 . 2 9× 28 5×() 28 52 0–×() Ipeak

2 Po×

Dmax Vmin× ∆ I fs× 0.85 70 10 3×× AP A e Aw Lp Ip Irms 108⋅⋅ ⋅ 1.31 cm2=⋅= AP 650 10 6–× 1.52× 0.85 104××  1.31 2.47cm2==

©2002 Fairchild Semiconductor Corporation From the catalog data, select the smallest ferrite core available with an area product, AP, that exceeds the calculated value. The specifications of the selected core, EFD3030 are AP = 2.47 cm Aw = 2.23cm2, Ae = 1.07cm2 5-5. Determine Primary Turns, NP: From Faraday's law, the minimum number of primary turns can be expressed as where, T on(max) is maximum turn on time, and ∆Bm is maximum peak to peak flux density swing 5-6. Determine Secondary Turns, Ns: Using the V olt-seconds equation, the turns ratio n = Np/Ns can be calculated at maximum duty ratio, as where, Vo = output voltage, and Vd = diode forward voltage drop; hence, 5-7. Determine Bias Turns, Nb, And Auxiliary Turns, Na: Secondary side calculation in volts per turn units is The bias side must have same volts-per turn value as the secondary side and so can be calculated as Auxiliary turns are calculated using the same volts per unit. Author: FAIRCHILD Wonsob Lee Experience: Participated in the development of Fairchild Power Switch(FPS) in 1998. Presently, responsible for the development and application of IC for the monitor. E-mail: sobi@fairchildsemi.co.kr Tel: 82-32-680-1834 Fax: 82-32-680-1317 Tonm ax() 1 fs----- Dmax×= 70 10 3× 6.43µ S= NP min() Vmin Tonm ax()× 0.1 6 9 10 6–×× n Vmin Dutymax× Vo Vd+() 1 Dutymax–()× Ns Np Seco ndar y Volt/turn Vs Ns Nb Vb

3/24/04 0.0m 002  2002 Fairchild Semiconductor Corporation DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

Product Information

4116 specifications and overview.

Summary

A Fairchild Power Switch

Description

A Fairchild Power Switch

Source title 4116 Datasheet(PDF) - Fairchild Semiconductor

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