4069UB

CD4069UBC NSC | Alldatasheet

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Y Wide supply voltage range 3.0V to 15V Y High noise immunity 0.45 V DD typ. Y Low power TTL Fan out of 2 driving 74L compatibility or 1 driving 74LS Y Equivalent to MM54C04/MM74C04 Schematic and Connection Diagram TL/F/5975–1 Dual-In-Line Package TL/F/5975–2 Order Number CD4069UB AC Test Circuits and Switching Time Waveforms TL/F/5975–3 TL/F/5975–4 C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Notes1&2 ) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. DC Supply Voltage (V DD) b0.5V to a18 V DC Input Voltage (V IN) b0.5V to V DD a0.5 V DC Storage Temperature Range (T S) b65§Ct o a150§C Power Dissipation (P D) Dual-In-Line 700 mW Small Outline 500 mW Lead Temperature (T (Soldering, 10 seconds) 260 §C Recommended Operating Conditions (Note 2) DC Supply Voltage (V DD) 3 Vt o1 5 V DC Input Voltage (V IN) 0 Vt oV DD VDC Operating Temperature Range (T A) CD4069UBM b55§Ct o a125§C CD4069UBC b40§Ct o a85§C Symbol Parameter Conditions b55§C a25§C a125§C Units Min Max Min Typ Max Min Max IDD Quiescent Device Current V DD e 5V, 0.25 0.25 7.5 mA VIN e VDD or V SS VDD e 10V, 0.5 0.5 15 mA VIN e VDD or V SS VDD e 15V, 1.0 1.0 30 mA VIN e VDD or V SS VOL Low Level Output Voltage lIOl k 1 mA VDD e 5V 0.05 0 0.05 0.05 V VDD e 10V 0.05 0 0.05 0.05 V VDD e 15V 0.05 0 0.05 0.05 V VOH High Level Output Voltage lIOl k 1 mA VDD e 5V 4.95 4.95 5 4.95 V VDD e 10V 9.95 9.95 10 9.95 V VDD e 15V 14.95 14.95 15 14.95 V VIL Low Level Input Voltage lIOl k 1 mA VDD e 5V, V O e 4.5V 1.0 1.0 1.0 V VDD e 10V, V O e 9V 2.0 2.0 2.0 V VDD e 15V, V O e 13.5V 3.0 3.0 3.0 V VIH High Level Input Voltage lIOl k 1 mA VDD e 5V, V O e 0.5V 4.0 4.0 4.0 V VDD e 10V, V O e 1V 8.0 8.0 8.0 V VDD e 15V, V O e 1.5V 12.0 12.0 12.0 V IIN Input Current V DD e 15V, V IN e 0V b0.10 b10b5 b0.10 b1.0 mA VDD e 15V, V IN e 15V 0.10 10 b5 0.10 1.0 mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: V SS e 0V unless otherwise specified. Note 3: IOH and I OL are tested one output at a time.

Symbol Parameter Conditions b40§C a25§C a85§C Units Min Max Min Typ Max Min Max IDD Quiescent Device Current V DD e 5V, 1.0 1.0 7.5 mA VIN e VDD or V SS VDD e 10V, 2.0 2.0 15 mA VIN e VDD or V SS VDD e 15V, 4.0 4.0 30 mA VIN e VDD or V SS VOL Low Level Output Voltage lIOl k 1 mA VDD e 5V 0.05 0 0.05 0.05 V VDD e 10V 0.05 0 0.05 0.05 V VDD e 15V 0.05 0 0.05 0.05 V VOH High Level Output Voltage lIOl k 1 mA VDD e 5V 4.95 4.95 4.95 V VDD e 10V 9.95 9.95 9.95 V VDD e 15V 14.95 14.95 14.95 V VIL Low Level Input Voltage lIOl k 1 mA VDD e 5V, V O e 4.5V 1.0 1.0 1.0 V VDD e 10V, V O e 9V 2.0 2.0 2.0 V VDD e 15V, V O e 13.5V 3.0 3.0 3.0 V VIH High Level Input Voltage lIOl k 1 mA VDD e 5V, V O e 0.5V 4.0 4.0 4.0 V VDD e 10V, V O e 1V 8.0 8.0 8.0 V VDD e 15V, V O e 1.5V 12.0 12.0 12.0 V IIN Input Current V DD e 15V, V IN e 0V b0.30 b10b5 b0.30 b1.0 mA VDD e 15V, V IN e 15V 0.30 10 b5 0.30 1.0 mA TA e 25§C, C L e 50 pF, R L e 200 k X,t r and t f s 20 ns, unless otherwise specified Symbol Parameter Conditions Min Typ Max Units tPHL or t PLH Propagation Delay Time from V DD e 5V 50 90 ns Input to Output V DD e 10V 30 60 ns VDD e 15V 25 50 ns tTHL or t TLH Transition Time V DD e 5V 80 150 ns VDD e 10V 50 100 ns VDD e 15V 40 80 ns CIN Average Input Capacitance Any Gate 6 15 pF CPD Power Dissipation Capacitance Any Gate (Note 4) 12 pF *AC Parameters are guaranteed by DC correlated testing. Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: V SS e 0V unless otherwise specified. Note 3: IOH and I OL are tested one output at a time. Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 54C/74C Family Characteristics application noteÐAN-90.

Typical Performance Characteristics Gate Transfer Characteristics TL/F/5975–5 Power Dissipation vs Frequency TL/F/5975–6 Propagation Delay vs Ambient Temperature TL/F/5975–7 Propagation Delay vs Ambient Temperature TL/F/5975–8 Propagation Delay Time vs Load Capacitance TL/F/5975–9

Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD4069UBMJ or CD4069UBCJ

CD4069UBM/CD4069UBC Inverter Circuits Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number CD4069UBMN or CD4069UBCN LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

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