4017BP | DigiCamel IC Datasheet

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HEF4017B NXP | Alldatasheet

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Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
PDF pages: 16

Technical content

General description The HEF4017B is a 5-stage Johnson decade counter with ten spike-free decoded active HIGH outputs (Q0 to Q9), an active LOW carry output from the most signiﬁcant ﬂip-ﬂop Q5-9), active HIGH and active LOW clock inputs (CP0,CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a LOW-to-HIGH transition at CP0 whileCP1 is LOW or a HIGH-to-LOW transition atCP1 while CP0 is HIGH (seeTable3). When cascading counters, theQ5-9 output, which is LOW while the counter is in states 5, 6, 7, 8, and 9, can be used to drive the CP0 input of the next counter. A HIGH on MR resets the counter to zero (Q0 = Q5-9 = HIGH; Q1 to Q9 = LOW) independent of the clock inputs (CP0,CP1). Automatic counter code correction is provided by an internal circuit: following any illegal code the counter returns to a proper counting mode within 11 clock pulses. Schmitt trigger action makes the clock inputs highly tolerant of slower rise and fall times. It operates over a recommended V DD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD , VSS , or another input. It is also suitable for use over both the industrial (−40 °C to +85°C) and automotive (−40 °Ct o +125 °C) temperature ranges. 2. Features n Automatic counter correction n Tolerant of slow clock rise and fall times n Fully static operation n 5 V, 10 V, and 15 V parametric ratings n Standardized symmetrical output characteristics n Operates across the automotive temperature range−40 °C to +125°C n Complies with JEDEC standard JESD 13-B n ESD protection: u HBM JESD22-A114E exceeds 2000 V u MM JESD22-A115-A exceeds 200 V 3. Applications n Industrial and automotive HEF4017B 5-stage Johnson decade counter Rev. 04 — 9 December 2008 Product data sheet

13 CP1

6.1 Pinning

6.2 Pin description

Table 2. Pin description

Recommended operating conditions

Table 4. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Table 5. Recommended operating conditions Table 6. Static characteristics VSS = 0 V; VI = VSS or VDD unless otherwise speciﬁed.

5 V -5-5- 1 5 0 - 1 5 0 µA

10 V - 10 - 10 - 300 - 300 µA

15 V - 20 - 20 - 600 - 600 µA

Table 6. Static characteristics …continued VSS = 0 V; VI = VSS or VDD unless otherwise speciﬁed. Table 7. Dynamic characteristics

HEF4017B_4 © NXP B.V. 2008. All rights reserved. [1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). [2] tt is the same as tTHL and tTLH .

5 V 90 45 - ns

10 V 40 20 - ns

15 V 20 10 - ns

5 V 80 40 - ns

15 V 30 10 - ns

15 V 30 15 - ns

5 V 50 25 - ns

10 V 30 15 - ns

5 V 60 30 - ns

10 V 12 30 - MHz

15 V 15 30 - MHz

HEF4017B_4 © NXP B.V. 2008. All rights reserved. Table 8. Dynamic power dissipation PD PD can be calculated from the formulas shown. VSS = 0 V; tr = tf≤ 20 ns; Tamb = 25°C. Σ(CL × fo) = sum of the outputs.

10 V P D = 2200× fi +Σ(fo × CL)× VDD 2

15 V P D = 6000× fi +Σ(fo × CL)× VDD 2

The shaded areas indicate where the output state is set by the input count.

Decade counter with decimal decoding
1 out of n decoding counter (when cascaded)
Sequential controller
Timer Figure11 shows a technique for extending the number of decoded output states for the HEF4017B. Decoded outputs are sequential within each stage and from stage to stage, with no dead time (except propagation delay). Test data is given inTable10. Deﬁnitions for test circuit: DUT = Device Under Test; C L = load capacitance including jig and probe capacitance; R T = termination resistance should be equal to the output impedance Zo of the pulse generator. Fig 10. Test circuit VDD VI VO 001aag182 DUT C LR T G

Table 10. Test data

5 V to 15 V V SS or VDD ≤ 20 ns 50 pF

Enabling the counter onCP1 when CP0 is HIGH, or on CP0 whenCP1 is LOW, causes an extra count.

HEF4017B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 9 December 2008 12 of 16 NXP Semiconductors HEF4017B 5-stage Johnson decade counter 14. Package outline Fig 12. Package outline SOT38-4 (DIP16) REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT38-4 95-01-14 03-02-13 M H c (e )1 M E A L seating plane w M e D A 2 Z E pin 1 index b 0 5 10 mm scale Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. UNIT A max. 12 b1 (1) (1) (1) b2 cD E e M ZHL mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) A min. A max. b max.wM Ee1 1.73 1.30 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 7.80 10.0 inches 0.068 0.051 0.021 0.015 0.014 0.009 1.25 0.85 0.049 0.033 0.77 0.73 0.26 0.24 0.14 0.31 0.39 DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4

HEF4017B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 9 December 2008 13 of 16 NXP Semiconductors HEF4017B 5-stage Johnson decade counter Fig 13. Package outline SOT109-1 (SO16) X w M q AA 1 A 2 bp D H E Lp Q detail X E Z e c L v M A (A )3 A y pin 1 index UNIT A max. A 1 A 2 A 3 bp cD (1) E (1) (1)eH E LL p QZ ywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 SOT109-1 99-12-27 03-02-19 076E07 MS-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.0410.244 0.228 0.028 0.020 0.028 0.0120.01 0.25 0.01 0.0040.039 0.016 0 2.5 5 mm scale SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Rename the pins throughout to be consistent with rest of HEF family.
Increased the maximum ambient temperature to 125°C throughout.
Section 2 “Features” added.
Package version SOT38-1 changed to SOT38-4 inSection4, andFigure12. Package SOT74 removed fromSection4.
Table 1 “Ordering information” andTable 2 “Pin description” restructured.
Figure 3 “Logic symbol” andFigure 4 “IEE logic symbol” added.
Section 8 “Limiting values” andSection 10 “Static characteristics” added, taken from the HE4000B Family Speciﬁcations data sheet.
Section 9 “Recommended operating conditions” added.
Table 6 “Static characteristics” restructured.
Values for IDD , IOL and IOH updated inTable 6 “Static characteristics”.
thold and tRMR renamed to th hold time and trec recovery time inTable 7 “Dynamic characteristics”. andSection 12 “Waveforms”.
tWCPL , tWCPH and tWMRH renamed to tW minimum pulse width inTable 7 “Dynamic characteristics”. andSection 12 “Waveforms”.
Figure 7 “Waveforms showing the propagation delays for CP0, CP1 to Qn, Q5-9 outputs and the output transition times” andFigure 10 “Test circuit” added.
Maximum frequency and propagation added toFigure8 “Waveforms showingtheminimum pulse width for CP0, CP1 and MR input; the maximum frequency for CP0 and CP1 input; the recovery time for MR and the MR input to Qn and Q5-9 output propagation delays”.
Section 14 “Package outline” added. HEF4017B_CNV_3 19950101 Product speciﬁcation - HEF4017B_CNV_2 HEF4017B_CNV_2 19950101 Product speciﬁcation - -

17.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Deﬁnitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

17.2 Deﬁnitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modiﬁcations or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the full data sheet shall prevail.

17.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation speciﬁcations and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation. Limiting values —Stress above one or more limiting values (as deﬁned in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/proﬁle/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conﬂict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

17.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 18. Contact information For more information, please visit:http://www.nxp.com For sales ofﬁce addresses, please send an email to:salesaddresses@nxp.com Document status[1][2] Product status[3] Deﬁnition Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development. Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation. Product [short] data sheet Production This document contains the product speciﬁcation.

NXP Semiconductors HEF4017B 5-stage Johnson decade counter © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 9 December 2008 Document identifier: HEF4017B_4 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 19. Contents

Product Information

4017BP specifications and overview.

Summary

5-stage Johnson decade counter Rev. 04-9 December 2008

Description

5-stage Johnson decade counter Rev. 04-9 December 2008

Source title 4017BP Datasheet(PDF) - NXP Semiconductors

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