CD4017BC_V01 FAIRCHILD | Alldatasheet
Document overview
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Technical content
Features
I Wide supply voltage range: 3.0V to 15V I High noise immunity: 0.45 VDD (typ.) I Low power Fan out of 2 driving 74L TTL compatibility: or 1 driving 74LS I Medium speed operation: 5.0 MHz (typ.) with 10V VDD I Low power: 10 µW (typ.) I Fully static operation
Applications
Automotive Instrumentation Medical electronics Alarm systems Industrial electronics Remote metering Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams CD4017B Top View CD4022B Top View Order Number Package Number Package Description CD4017BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4017BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide CD4022BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4022BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
www.fairchildsemi.com 2 CD4017BC CD4022BC Logic Diagrams CD4017B Terminal No. 8 = GND Terminal No. 16 = VDD CD4022B Terminal No. 16 = VDD Terminal No. 8 = GND
3 www.fairchildsemi.com CD4017BC CD4022BC Absolute Maximum Ratings(Note 1) (Note 2) Recommended Operating Conditions (Note 2) Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices should be operated at these limits. The table of “Recom- mended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation. Note 2: V SS = 0V unless otherwise specified. Note 3: IOL and IOH are tested one output at a time. DC Supply Voltage (VDD ) −0.5 VDC to +18 VDC Input Voltage (VIN) −0.5 VDC to VDD +0.5 VDC Storage Temperature (TS) −65°C to +150°C Power Dissipation (PD ) Dual-In-Line 700 mW Small Outline 500 mW Lead Temperature (TL) (Soldering, 10 seconds) 260 °C DC Supply Voltage (VDD ) +3 VDC to +15 VDC Input Voltage (VIN) 0 to V DD VDC Operating Temperature Range (TA) −55°C to +125°C Symbol Parameter Conditions −55°C +25°+ 125°C Units Min Max Min Typ Max Min Max IDD Quiescent Device V DD = 5V 5 0.3 5 150 µACurrent V DD = 10V 10 0.5 10 300 VDD = 15V 20 1.0 20 600 VOL LOW Level |I O | < 1.0 µA Output Voltage V DD = 5V 0.05 0 0.05 0.05 VVDD = 10V 0.05 0 0.05 0.05 VDD = 15V 0.05 0 0.05 0.05 VOH HIGH Level |I O | < 1.0 µA Output Voltage V DD = 5V 4.95 4.95 5 4.95 VVDD = 10V 9.95 9.95 10 9.95 VDD = 15V 14.95 14.95 15 14.95 VIL LOW Level |I O | < 1.0 µA VIH HIGH Level |I O | < 1.0 µA IIN Input Current V DD = 15V, VIN = 0V −0.1 −10−5 −0.1 −1.0 µA VDD = 15V, VIN = 15V 0.1 10 −5 0.1 1.0
www.fairchildsemi.com 4 CD4017BC CD4022BC TA= 25°C, CL= 50 pF, RL= 200k, trCL and tfCL= 20 ns, unless otherwise specified Note 4: AC Parameters are guaranteed by DC correlated testing. TA = 25°C, CL = 50 pF, RL = 200k, trCL and tfCL = 20 ns, unless otherwise specified Symbol Parameter Conditions Min Typ Max Units CLOCK OPERATION tPHL, tPLH Propagation Delay Time Carry Out Line V DD = 5V 415 800 nsVDD = 10V 160 320 VDD = 15V 130 250 Carry Out Line V DD = 5V C L = 15 pF 240 480 nsVDD = 10V 85 170 VDD = 15V 70 140 Decode Out Lines V DD = 5V 500 1000 nsVDD = 10V 200 400 VDD = 15V 160 320 tTLH , tTHL Transition Time Carry Out and Decode Out Lines tTLH VDD = 5V 200 360 nsVDD = 10V 100 180 VDD = 15V 80 130 tTHL VDD = 5V 100 200 nsVDD = 10V 50 100 VDD = 15V 40 80 fCL Maximum Clock Frequency V DD = 5V Measured with 1.0 2 MHzVDD = 10V Respect to Carry 2.5 5 VDD = 15V Output Line 3.0 6 tWL , tWH Minimum Clock Pulse Width V DD = 5V 125 250 nsVDD = 10V 45 90 VDD = 15V 35 70 trCL, tfCL Clock Rise and Fall Time V DD = 5V 20 µsVDD = 10V 15 VDD = 15V 5 tSU Minimum Clock Inhibit Data Setup Time V DD = 5V 120 240 nsVDD = 10V 40 80 VDD = 15V 32 65 C IN Average Input Capacitance 57 . 5 p F Symbol Parameter Conditions Min Typ Max Units RESET OPERATION tPHL, tPLH Propagation Delay Time Carry Out Line V DD = 5V 415 800 nsVDD = 10V 160 320 VDD = 15V 130 250 Carry Out Line V DD = 5V 240 480 nsVDD = 10V C L = 15 pF 85 170 VDD = 15V 70 140 Decode Out Lines V DD = 5V 500 1000 nsVDD = 10V 200 400 VDD = 15V 160 320 tW Minimum Reset V DD = 5V 200 400 nsPulse Width V DD = 10V 70 140 VDD = 15V 55 110 tREM Minimum Reset V DD = 5V 75 150 nsRemoval Time V DD = 10V 30 60 VDD = 15V 25 50
5 www.fairchildsemi.com CD4017BC CD4022BC Timing Diagrams CD4017B CD4022B
www.fairchildsemi.com 6 CD4017BC CD4022BC Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A
7 www.fairchildsemi.com CD4017BC CD4022BC Decade Counter/Divider with 10 Decoded Outputs Divide-by-8 Counter/Divider with 8 Decoded Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com