38590 YAGEO | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 10
Technical content
GENERAL PURPOSE CHIP RESISTORS RC0603 (Pb Free) 5%; 1% Product specification – Aug 19, 2004 V.2
Chip Resistor Surface Mount www.yageo.com Aug 19, 2004 V.2 SERIESRC 0603 (Pb Free) YYAAGGEEOO OORRDDEERRIINNGG CCOODDEE CTC CODE RC0603 X X X XX XXXX L (1) TOLERANCE F = ±1% J = ±5% (2) PACKAGING TYPE R = Paper/PE taping reel (3) TEMPERATURE COEFFICIENT OF RESISTANCE – = Base on spec (4) TAPING REEL 07 = 7 inch dia. Reel 10 = 10 inch dia. Reel (not preferred) 13 = 13 inch dia. Reel (5) RESISTANCE VALUE 5R6, 56R, 560R, 5K6, 56K, 22M. (6) RESISTOR TERMINATIONS L = Lead free terminations (pure Tin) ORDERING EXAMPLE The ordering code of a RC0603 chip resistor, value
56 X with ±1% tolerance, supplied in 7-inch tape reel
is: RC0603FR-0756RL. NOTE 1. The “L” at the end of the code is only for ordering. On the reel label, the standard CTC will be mentioned an additional stamp “LFP”= lead free production. 2. Products with lead in terminations fulfil the same requirements as mentioned in this datasheet. 3. Products with lead in terminations will be phased out in the coming months (before July 1st, 2006) SCOPE This specification describes RC0603 seri es chip resistors with lead-free terminations made by thick film process.
ORDERING INFORMATION
Part number is identified by the series, size, tolerance, packing type, temperature coefficient, taping reel and resistance value.
Chip Resistor Surface Mount www.yageo.com Aug 19, 2004 V.2 SERIESRC 0603 (Pb Free) resistance value. Finally, the two external terminations (pure Tin) are added. See Fig. 4. CONSTRUCTION The resistors are constructed out of a high-grade ceramic body. Internal metal electrodes are added at each end and connected by a resistive paste. The composition of the paste is adjusted to give the approximate required resistance and laser cutting of this resistive layer that achieves tolerance trims the value. The resistive layer is covered with a protective coat and printed with the MARKING RC0603 E-24 series: 3 digits First two digits for significant figure and 3rd digit for number of zeros E-96 series: 3 digits fo r 0603 ±1% EIA-96 marking method For 0603 ±1% E-24 series, one short bar under marking letter For marking codes, please see EIA-marking code rules in data sheet “Chip resistors instruction”. Fig. 1 Value=10 KΩ ynsc001 Fig. 2 Value=12.4 K Ω /K31/K30/K43 ynsc002 Fig. 3 E-24 1% Value=56 K ynsc003 DIMENSIONS TYPE RC0603 L (mm) 1.60 ±0.1 W (mm) 0.80 ±0.10 H (mm) 0.45 ±0.10 I1 (mm) 0.25 ±0.15 I2 (mm) 0.25 ±0.15 handbook, 4 columns protective coat resistor layer inner electrode end termination ceramic substrate MBE940_a H Fig. 4 Chip resistor construction Table 1 MBE940_a protective coat W L Fig. 5 Chip resistor dimension For dimension see Table 1
Chip Resistor Surface Mount www.yageo.com Aug 19, 2004 V.2 SERIESRC 0603 (Pb Free) FOOTPRINT AND SOLDERING PROFILES For recommended footprint and soldering profiles, please see the special data sheet “Chip resistors mounting”. ENVIRONMENTAL DATA For material declaration information (IMDS-data) of the products, please see the separated info “Environmental data”.
ELECTRICAL CHARACTERISTICS
CHARACTERISTICS RC0603 1/10 W Operating Temperature Range –55 °C to +155 °C Maximum Working Voltage 50 V Maximum Overload Voltage 100 V Dielectric Withstanding Voltage 100 V 5% (E24) 1 Ω to 22 MΩ 1% (E96) 1 Ω to 10 MΩResistance Range Zero Ohm Jumper < 0.05 Ω 10 Ω < R ≤ 10 MΩ ±100 ppm/°CTemperature Coefficient R ≤ 10 Ω; R > 10 MΩ ±200 ppm/°C Rated Current 1.0 AJumper Criteria Maximum Current 2.0 A PACKING STYLE AND PACKAGING QUANTITY PRODUCT TYPE PACKING STYLE REEL DIMENSION QUANTITY PER REEL RC0603 Paper / PE Taping Reel (R) 7" (178 mm) 5,000 units 10" (254 mm) / not preferred 10,000 units 13" (330 mm) 20,000 units NOTE 1. For Paper/PE tape and reel specification/dimensions , please see the special data sheet “Packing” document. Table 3 Packing style and packaging quantity Table 2
Chip Resistor Surface Mount www.yageo.com Aug 19, 2004 V.2 SERIESRC 0603 (Pb Free) 10 1 1 MBD591 102 10 210 310 410 510 6 10 2 Pmax (W) single pulse t /t =1000pi 10 1 t (s)i Fig. 8 Pulse on a regular basis for type: RC0603 ; maximum permissible peak pulse powe r as a function of pulse duration for single pulse and repetitive pulse tp/ti = 1000 300 100 200 MBD592 10 1 110 210 310 410 510 6 Vmax (V) t (s)i Fig. 9 Pulse on a regular basis for type: RC0603 ; maximum permissible peak pulse voltage as a function of pulse duration
Chip Resistor Surface Mount www.yageo.com Aug 19, 2004 V.2 SERIESRC 0603 (Pb Free) TESTS AND REQUIREMENTS TEST TEST METHOD PROCEDURE REQUIREMENTS At +25/–55 °C and +25/+125 °C Temperature Coefficient of Resistance (T.C.R.) MIL-STD-202F-method 304; JIS C 5202-4.8 Formula: Where t1=+25 °C or specified room temperature t2=–55 °C or +125 °C test temperature R1=resistance at reference temperature in ohms R2=resistance at test temperature in ohms Refer to table 2 Thermal Shock MIL-STD-202F-method 107G; IEC 60115-1 4.19 At –65 (+0/–10) °C for 2 minutes and at +155 (+10/–0) °C for 2 minutes; 25 cycles ±(0.5%+0.05 Ω) for 1% tol. ±(1.0%+0.05 Ω) for 5% tol. Low Temperature Operation MIL-R-55342D-Para 4.7.4 At –65 (+0/–5) °C for 1 hour; RCWV applied for 45 (+5/–0) minutes ±(0.5%+0.05 Ω) for 1% tol . ±(1.0%+0.05 Ω) for 5% tol. No visible damage Short Time Overload MIL-R-55342D-Para 4.7.5; IEC 60115-1 4.13 2.5 × RCWV applied for 5 seconds at room temperature ±(1.0%+0.05 Ω) for 1% tol. ±(2.0%+0.05 Ω) for 5% tol. No visible damage Insulation Resistance MIL-STD-202F-method 302; IEC 60115-1 4.6.1.1 RCOV for 1 minute Type RC0603 Voltage (DC) 100 V ≥10 GΩ Dielectric Withstand Voltage MIL-STD-202F-method 301; IEC 60115-1 4.6.1.1 Maximun voltage (Vrms) applied for 1 minute Type RC0603 Voltage (AC) 100 Vrms No breakdown or flashover Resistance to Soldering Heat MIL-STD-202F-method 210C; IEC 60115-1 4.18 Unmounted chips; 260 ±5 °C for 10 ±1 seconds ±(0.5%+0.05 Ω) for 1% tol. ±(1.0%+0.05 Ω) for 5% tol. No visible damage Life MIL-STD-202F-method 108A; IEC 60115-1 4.25.1 At 70±2 °C for 1,000 hours; RCWV applied for 1.5 hours on and 0.5 hour off ±(1%+0.05 Ω) for 1% tol. ±(3%+0.05 Ω) for 5% tol. R2–R1 R1(t2–t1) Table 4 Test condition, procedure and requirements
Chip Resistor Surface Mount www.yageo.com Aug 19, 2004 V.2 SERIESRC 0603 (Pb Free) TEST TEST METHOD PROCEDURE REQUIREMENTS Solderability MIL-STD-202F-method 208A; IEC 60115-1 4.17 Solder bath at 245±3 °C Dipping time: 2±0.5 seconds Well tinned (≥95% covered) No visible damage Bending Strength JIS C 5202.6.14; IEC 60115-1 4.15 Resistors mounted on a 90 mm glass epoxy resin PCB (FR4) Bending: 5 mm ±(1.0%+0.05 Ω) for 1% tol. ±(1.0%+0.05 Ω) for 5% tol. No visible damage Resistance to Solvent MIL-STD-202F-method 215; IEC 60115-1 4.29 lsopropylalcohol (C3H7OH) or dichloromethane (CH2Cl2) followed by brushing No smeared Noise JIS C 5202 5.9; IEC 60115-1 4.12 Maximum voltage (Vrms) applied. Resistors range Value R < 100 Ω 10 dB 100 Ω ≤ R < 1 KΩ 20 dB
1 KΩ ≤ R < 10 KΩ 30 dB
10 KΩ ≤ R < 100 KΩ 40 dB
100 KΩ ≤ R < 1 MΩ 46 dB
1 MΩ ≤ R ≤ 22 MΩ 48 dB
(steady state) JIS C 5202 7.5; IEC 60115-8 4.24.8 RCWV applied for 1.5 hours on and 0.5 hour off ±(0.5%+0.05 Ω) for 1% tol. ±(2.0%+0.05 Ω) for 5% tol. Leaching EIA/IS 4.13B; IEC 60115-8 4.18 Solder bath at 260±5 °C Dipping time: 30±1 seconds No visible damage Intermittent Overload JIS C 5202 5.8 At room temperature; 2.5 × RCWV applied for 1 second on and 25 seconds off; total 10,000 cycles ±(1.0%+0.05 Ω) for 1% tol. ±(2.0%+0.05 Ω) for 5% tol. Resistance to Vibration On request On request Moisture Resistance Heat MIL-STD-202F-method 106F; IEC 60115-1 4.24.2 42 cycles; total 1,000 hours Shown as Fig. 10 ±(0.5%+0.05Ω) for 1% tol. ±(2.0%+0.05Ω) for 5% tol. No visible damage
Chip Resistor Surface Mount www.yageo.com Aug 19, 2004 V.2 SERIESRC 0603 (Pb Free) initial drying 24 hours 90 − 98% RH 80 − 98% RH temperature tolerance ±2 °C (±3.6 °F) unless otherwise specified initial measurements as specified in 2.2 STEP1 STEP3STEP2 prior to first cycle only STEP4 one cycle 24 hours; repeat as specified in 2.5 voltage applied as specified in 2.4 circulation of conditioning air shall be at a minimum cubic rate per minute equivalent to 10 times the volume of the chamber STEP6 STEP7 HBK073 STEP5 51 0 1 5 end of final cycle; measurements as specified in 2.7 optional sub-cycle if specified (2.3); sub-cycle performed during any 5 of the first 9 cycles; humidity uncontrolled during sub-cycle time [h] temperature [°C] 90 − 98% RH 90 − 98% RH +10 °C (+18 °F) −2 °C (−3.6 °F) 80 − 98% RH rate of change of temperature is unspecified, however, specimens shall not be subjected to radiant heating from chamber conditioning processes Fig. 10 Moisture resistance test requirements
Chip Resistor Surface Mount www.yageo.com Aug 19, 2004 V.2 SERIESRC 0603 (Pb Free)
REVISION HISTORY
REVISION DATE CHANGE NOTIFICATION DESCRIPTION Version 0 Nov. 07, 2003 - - First issue of this specification Version 1 Aug 02, 2004 - - Test method and procedure updated - PE tape added (paper tape will be replaced by PE tape) Version 2 Aug 19, 2004 - -