3656 BURR-BROWN | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 17
Technical content
FEATURES
l 8000V ISOLATION TEST VOLTAGE l 0.5µA MAX LEAKAGE AT 120V, 60Hz l 3-PORT ISOLATION l IMR: 125dB REJECTION AT 60Hz l 1" x 1" x 0.25" CERAMIC PACKAGE
APPLICATIONS
Patient Monitoring and Diagnostic Instrumentation l INDUSTRIAL Ground Loop Elimination and Off-ground Signal Measurement l NUCLEAR Input/Output/Power Isolation This product is covered by the following United States patents: 4,066,974; 4,103,267; 4,082,908. Other patents pending may also apply upon the allowance and issuance of patents thereon. The product may also be covered in other countries by one or more international patents corresponding to the above-identified U.S. patents.
DESCRIPTION
The 3656 was the first amplifier to provide a total isolation function, both signal and power isolation, in integrated circuit form. This remarkable advancement in analog signal processing capability was accom- plished by use of a patented modulation technique and miniature hybrid transformer. Versatility and performance are outstanding features of the 3656. It is capable of operating with three completely independent grounds (three-port isolation). In addition, the isolated power generated is available to power external circuitry at either the input or output. The uncommitted op amps at the input and the output allow a wide variety of closed-loop configura- tions to match the requirements of many different types of isolation applications. Output Demodulator Modulator Pulse Generator Input Demodulator Rectifiers and Filters Rectifiers and Filters Input ISO Power Output ISO Power © 1987 Burr-Brown Corporation PDS-403G Printed in U.S.A. January, 1997 International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 SBOS132
3656AG, BG, HG, JG, KG PARAMETER CONDITIONS MIN TYP MAX UNITS ISOLATION Voltage Rated Continuous(1), DC 3500 (1000) VDC Test, 10s(1) 8000 (3000) VDC Test, 60s(1) G 1 = 10V/V 2000 (700) Vrms Rejection DC 160 dB 60Hz, < 100Ω in I/P Com(2) 125 dB 60Hz, 5kΩ in I/P Com(2) 3656HG 108 dB 3656AG, BG, JG, KG 112 dB Capacitance(1) 6 (6.3) pF Resistance(1) 1012 (1012) Ω Leakage Current 120V, 60Hz 0.28 0.5 µA GAIN Equations See Text Accuracy of Equations Initial(3) 3656HG G < 100V/V 1.5 % 3656AG, JG, KG 1% 3656BG 0.3 % vs Temperature 3656HG 480 ppm/ °C 3656AG, JG 120 ppm/ °C 3656BG, KG 60 ppm/ °C vs Time 0.02 (1 + log khrs.) % Nonlinearity R A + RF = RB ≥ 2MΩ External Supplies Used at Pins 12 and 16, 3656HG Unipolar or Bipolar Output ±0.15 % 3656AG, JG, KG ±0.1 % 3656BG ±0.05 % Internal Supplies Used for Bipolar Output Voltage Output Stage Swing, Full Load (4) ±0.15 % OFFSET VOLTAGE (5), RTI Initial(3), 3656HG 15Vp between P+ and P– ±[4 + (40/G1)] mV 3656AG, JG ±[2 + (20/G1)] mV 3656BG, KG ±[1 + (10/G1)] mV vs Temperature, 3656HG ±[200 + (1000/G1)] µV/°C vs Supply Voltage Supply between P+ and P– 3656AG, BG, JG, KG ±[0.3 + (2.1/G1)] mV/V vs Current(6) ±[0.1 + (10/G1)] ±[0.2 + (20/G1)] mV/mA vs Time ±[10 + (100/G1)] • (1 + log khrs.) µV AMPLIFIER PARAMETERS, Apply to A 1 and A2 Bias Current(7) Initial 100 nA vs Temperature 0.5 nA/ °C vs Supply 0.2 nA/V Offset Current(7) 52 0 n A Impedance Common-Mode 100 || 5 M Ω || pF Input Noise Voltage f B = 0.05Hz to 100Hz 5 µVp-p fB = 10Hz to 10kHz 5 µVrms Input Voltage Range(8) Linear Operation Internal Supply ±5V External Supply Supply –5 V Output Current V OUT = ±5V ±15V External Supply ±5m A Internal Supply ±2.5 mA VOUT = ±10V ±15V External Supply ±2.5 mA VOUT = ±2V, VP+, P– = 8.5V Internal Supply ±1m A Quiescent Current 150 450 µA SPECIFICATIONS ELECTRICAL At +25°C, V± = 15VDC and 15VDC between P+ and P–, unless otherwise specified.
SPECIFICATIONS (CONT) ELECTRICAL At +25°C, V± = 15VDC and 15VDC between P+ and P–, unless otherwise specified. 3656AG, BG, HG, JG, KG PARAMETER CONDITIONS MIN TYP MAX UNITS FREQUENCY RESPONSE ±3dB Response Small Signal 30 kHz Full Power 1.3 kHz Slew Rate Direction Measured at Output +0.1, –0.04 V/ µs Settling Time to 0.05% 500 µs OUTPUT Noise Voltage (RTI) f B = 0.05Hz to 100Hz √(5)2 + (22/G1)2 µVp-p fB = 10Hz to 10kHz √(5)2 + (11/G1)2 µVrms Residual Ripple(9) 5 mVp-p POWER SUPPLY IN, at P+, P– Rated Performance 15 VDC Voltage Range(10) Derated Performance 8.5 16 VDC Ripple Current(9) 10 25 mAp-p Quiescent Current(11) Average 14 18 mA/DC Current vs Load Current(12) vs Current from +V, –V, V+, V– 0.7 mA/mA ISOLATED POWER OUT, At +V, –V, V+, V– pins(13) Voltage, No Load 15V Between P+ and P– 8.5 9 9.5 V Voltage, Full Load ±5mA (10mA sum) Load(12) 78 9 V Voltage vs Power Supply vs Supply Between P+ and P– 0.66 V/V Ripple Voltage(9) No Load 40 mVp-p Full Load ±5mA Load 80 200 mVp-p TEMPERATURE RANGE Specification 3656AG, BG –25 +85 °C 3656HG, JG, KG 0 +70 °C Operation(10) –55 +100 °C Storage(14) –65 +125 °C NOTES: (1) Ratings in parenthesis are between P- (pin 20) and O/P Com (pin 17). Other isolation ratings are between I/P Com and O/P Com or I/P Com and P–. (2) See Performance Curves. (3) May be trimmed to zero. (4) If output swing is unipolar, or if the output is not loaded, specification same as if external supply were used. (5) Includes effects of A1 and A2 offset voltages and bias currents if recommended resistors used. (6) Versus the sum of all external currents drawn from V+, V–, +V, –V (= ISO). (7) Effects of A1 and A2 bias currents and offset currents are included in Offset Voltage specifications. (8) With respect to I/P Com (pin 3) for A1 and with respect to O/P Com (pin 17) for A2. CMR for A1 and A2 is 100dB, typical. (9) In configuration of Figure 3. Ripple frequency approximately 750kHz. Measurement bandwidth is 30kHz. (10) Decreases linearly from 16VDC at 85°C to 12VDC at 100°C. (11) Instantaneous peak current required from pins 19 and 20 at turn-on is 100mA for slow rising voltages (50ms) and 300mA for fast rises (50µs). (12) Load current is sum drawn form +V, –V, V+, V– (= IISO). (13) Maximum voltage rating at pins 1 and 4 is ±18VDC; maximum voltage rating at pins 12 and 16 is ±18VDC. (14) Isolation ratings may degrade if exposed to 125°C for more than 1000 hours or 90°C for more than 50,000 hours.
PACKAGE INFORMATION
PRODUCT PACKAGE NUMBER (1) 3656 20-Lead ISO Omni 102A NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. PIN DESIGNATIONS NO. DESCRIPTION NO. DESCRIPTION 1 +V 11 Output DEMOD
2 MOD Input 12 V–
3 Input DEMOD COM 13 A 2 Noninverting Input
4– V 1 4 A 2 Inverting Input
5 Balance 15 A 2 Output
6A 1 Inverting Input 16 V+ 7A 1 Noninverting Input 17 Output DEMOD COM
8 Balance 18 No Pin
10 Input DEMOD 20 P–
NOTE: (1) Ratings in parenthesis are between P– (pin 20) and O/P Com (pin 17). Other isolation ratings are between I/P Com and O/P Com or I/P Com and P–. 3500VDC 3500VDC 1000VDC Example of the ratings for 3-port continuous isolation.
TYPICAL PERFORMANCE CURVES All specifications typical at +25°C, unless otherwise specified. –30 Frequency (Hz) SMALL SIGNAL FREQUENCY RESPONSE Relative Gain (dB) –10 –15 –20 –25 1k100 100k 3k 30k G 1 = 100G 1 = 1000 G 1 = 1 VP = 15V V OUT = 300mVrms G 2 = 2 G 1 = 10 300 10k Power Supply Voltage P± (V) OUTPUT SWING vs SUPPLY VOLTAGE Output Voltage (±V) 10 1481 6 12 1 (±V) = 5mA R L = 3k Ω , ext. V± = ±15V R L = 2kΩ , int. V± or R L = 1kΩ , ext. V± = ±15V1 (±V) = 0 Frequency (Hz) OUTPUT SWING AND DISTORTION vs FREQUENCY Output Voltage (±V) 10010 10k 1k G = 100 G = 1000 G = 1 Output Swing Distortion G = 10 Harmonic Distortion (%) 50k Phase Shift (°C) 120 150 180 210 240 270 G 1 = 100 G 1 = 1000 G 1 = 1 VP = 15V V+, V– = +15V, –15 V OUT = 300mVrms G 1 = 10 Frequency (Hz) PHASE RESPONSE 1k100 100k 10k Temperature (°C) OUTPUT VOLTAGE SWING vs TEMPERATURE AND ISOLATED SUPPLY LOAD Output Voltage (±V) 08 5–75 100 50 IISO = 0, –VOUT IISO (see note 12 of electrical specs) IISO = 0, +VOUT R B = 2MΩ IISO = max, –VOUT IISO = max, +VOUT Derated Vp± –50 25 75–25 –55 NOISE VOLTAGE vs FREQUENCY Noise Voltage (nV/ Hz) 0.1 10k 100 Frequency (Hz) 10k 100 Output Stage 1k101 100k Input Stage
TYPICAL PERFORMANCE CURVES (CONT) All specifications typical at +25°C, unless otherwise specified. 0.6 QUIESCENT CURRENT vs TEMPERATURE Normalized Quiescent Current (at VP+P– ) 2.2 1.8 1.4 Derated Vp± Temperature (°C) 08 5–75 100 50–50 25 75–25 –55 ISOLATED OUTPUT VOLTAGE AND CURRENT vs TEMPERATURE Maximum Recommended I ISO Current (±mA) Isolated Voltage Output (±V) ±V at IISO = 0 Voltage Current ±V at IISO = max Derated Vp± Temperature (°C) 08 5–75 100 50–50 25 75–25 –55 Supply Voltage at VP± (V) QUIESCENT CURRENT AND ISOLATED VOLTAGE OUTPUT vs SUPPLY VOLTAGE Quiescent Current at Vp+p– (mA) 10 1481 6 12 Isolated Voltage Output (±V) Voltage at I ISO = 0 Voltage at I ISO = ±5mA Current Gain (V/V) ISOLATION-MODE REJECTION vs GAIN Isolation-Mode Rejection (dB) 200 180 160 140 120 100 101 1000 100 R C is resistance in series with input common, pin 3. Shielded Unshielded f = 60Hz R C = 0 R C = 5kΩ –50 Frequency (Hz) ISOLATION MODE REJECTION vs FREQUENCY Normalized Isolation Mode Rejection (dB) 100k100 1k10 10k –10 –20 –30 –40 Isolation Voltage (Vp) AC AND DC LEAKAGE CURRENT vs ISOLATION VOLTAGE AC Leakage Current (µA) 2k 8k0 10k 4k 2.5 1.5 0.5 DC Leakage Current (nA) DC AC, 60Hz
Applications sections for details. single miniature toroid transformer with multiple windings. operating into the V2 winding of the transformer. FIGURE 1. Block Diagram.
- The input stage may be connected in various operational
amplifier gain configurations.
- The output stage may be operated at gains above unity.
- The internally generated isolated voltages which provide
supply voltages used instead. and Applications sections for details.
- Consideration must be given to the load placed on the
loading effect in excess of 5%.
(Select to load input demodulator with at least 2MΩ ). of A1 to reduce input offset caused by bias current). full scale with VIN at its maximum). (Load output demodulator equal to input demodulator). to limit the demodulator output voltage to 5V). (Balance the impedances seen by the + and– inputs of A1). of A1 and to insure frequency stability. FIGURE 4. Power: Two-Port, Single Supply; Signal: Inverting Gains.
Illustrative Calculations: The maximum input voltage is 100mV. It is desired to amplify the input signal for maximum accuracy. Noninverting output is desired. Input Stage: Step 1 G 1 max = 5V/max Input Signal = 5V 0.1V = 50V/V With the above gain of 50V/V, if the input ever exceeds 100mV, it would drive the output to saturation. Therefore, it is good practice to allow reasonable input overrange. So, to allow for 25% input overrange without saturation at the output, select: G1 = 40V/V G1 = 1 + (RF + RA ) = 40 Step 2 R A + RF forms a voltage divider with the 100kΩ output resistance of the demodulator. To limit the voltage divider loading effect to no more than 5%, RA + R F should be chosen to be at least 2MΩ . For most applications, the 2MΩ should be sufficiently large for RA + RF. Resistances greater than 2MΩ may help decrease the loading effect, but would increase the offset voltage drift. The voltage divider with RA + RF = 2MΩ is 2MΩ /(2MΩ + 100kΩ ) = 2/(2 + 0.1) = 95.2%, i.e., the percent loading is 4.8%. Choose RA + RF = 2MΩ (14) Step 3 Solving equations (13) and (14) R A = 50kΩ and RF = 1.95MΩ Step 4 The resistances seen by the + and – input terminals of the input amplifier A1 should be closely matched in order to minimize offset voltage due to bias currents. ∴ R C = RA || (RF + 100kΩ ) ≈ 49kΩ Output Stage: Step 5 V OUT = VIN MAX • G1 • G2 As discussed in Step 1, it is good practice to provide 25% input overrange. So we will calculate G2 for 10V output and 125% of the maximum input voltage. ∴ G 2 = 10V/5V = 2V/V Step 6 ∴ R X /RK = 1.0 ∴ R X = RK (15) Step 7 The resistance seen by the + input terminal of the output stage amplifier A2 (pin 13) is the output resistance 100kΩ of the output demodulator. The resistance seen by the (–) input terminal of A2 (pin 14) should be matched to the resistance seen by the + input terminal. The resistance seen by pin 14 is the parallel combination of R X and RK . ∴ R X || RK = 100kΩ (RX • RK /(RX + RK ) = 100kΩ R K /[1 +(RK /RX )] = 100kΩ (16) Step 8 Solving equations (15) and (16) RK = 20kΩ and RX = 200kΩ . Step 9 The output demodulator must be loaded equal to the input demodulator. ∴R B = RA + RF = 2MΩ (See equation (14) above in Step 2). Use the resistor values obtained in Steps 3, 4, 8 and 9, and connect the 3656 as shown in Figure 3. OFFSET TRIMMING Figure 5 shows an optional offset voltage trim circuit. It is important that R A + RF = RB . CASE 1: Input and output stages in low gain, use output potentiometer (R2) only. Input potentiometer (R1) may be disconnected. For example, unity gain could be obtained by setting RA = RB = 20MΩ , RC = 100kΩ , RF = 0, RX = 100kΩ , and RK = ∞ . CASE 2: Input stage in high gain and output stage in low gain, use input potentiometer (R1) only. Output potentiometer (R2) may be disconnected. For example, GT = 100 could be obtained by setting R F = 2MΩ , RB = 2MΩ returned to pin 17, RA = 20kΩ , RX = 100kΩ , and RK = ∞ . CASE 3: When it is necessary to perform a two-stage precision trim (to maintain a very small offset change under conditions of changing temperature and changing gain in A1 and A2), use step 1 to adjust the input stage and step 2 for the output stage. Carbon composition resistors are accept- able, but potentiometers should be stable. Step 1: Input stage trim (RA = RC = 20kΩ , RI = RB = 20MΩ . R X = 100kΩ , RK = ∞ , R2 disconnected); A1 high, A2 low gain. Adjust R1 for 0V ±5mV or desired setting at VOUT , pin 15.
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 2000, Texas Instruments Incorporated