AD3554 AD | Alldatasheet
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| ANALOG Fast-Settling, Wideband, FEATURES AD3554 FUNCTIONAL BLOCK DIAGRAM Very High Slew Rate: 1000V/us Fest Settling: 150ns max to +0.05% Gain Bandwidth Product: 1.7GHz typical vontvennint High Output Current: 100mA min @ Vour = 10V Pay S, Ofte Full Differential Input ENP cal fa nog! ours FREQ commensaTion “ONG, 10-3 STYLE BOTTOM VIEW PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS The AD355¢ is a FET-input, hybrid operational amplifier 1. The high slew rate (1000V/us min) and fast settling time that features an excellent combination of high slew rate, fast to 0.01% (250ns max) make the AD3554 ideal for D/A, settling time and large gain-bandwidth product. The AD3554 A/D, sample-hold, and video instrumentation circuits, has 2 fll differensial input with matched input FETs for low >. aser trimming techniques reduce initial offset voltage to offset voltage. as low as ImV max (AD3554B), thus eliminating the need ‘The AD3554 can supply +100mA at 10 volts. The slew rate for external nulling in many applications. is 1000V/ps minimum; 1200V/us is typical. Settling time 3. Very high gai . : : . Very high gain-bandwidth product (1.7GHz typical at to £0.05% of gat value is only 150n8 when configured aan A= 1000) makes the AD3554 an ideal choice for high inverting amplifier. The user can optimize the combination o frequency amplifier applications. bandwidth, slew rate, and settling time for a particular applica- . tion by selecting the external compensation capacitor, 4, FET inputs result in a low bias current (SOpA max, 10pA typ) in ahigh gain-bandwidth product operational amplifier. The AD3554 is recommended for any operational ampli- 5. Full differential input makes the AD3554 ideal for all_ fier application where speed and bandwidth are important standard operational amplifier applications such as high considerations. The high slew rate and fast settling time make speed integrators, differentiators, and high gain amplifiers. the AD3554 an excellent choice for use in fast D/A con- 6. The 100mA at 10V output makes the AD3554 suitable verters, fast current amplifiers, integrators, waveform gener- for many applications that require high output power, ators and multiplexer buffers. such as cable drivers, The capacitance of coaxial cable The AD3554 is available in three versions: the “A” and “B” (e4g., 29pF/foot for RG-58) does not load the AD3554 are specified over the -25°C to +85°C temperature range and when the coaxial cable or transmission line is terminated “S" over the -55°C to +125°C operating temperature range. in its characteristic impedance, Alll devices are packaged in the hermetically sealed TO-3 style metal can. The AD3554 is a pin-compatible replacement for 3554 devices from other manufacturers. OPERATIONAL AMPLIFIERS VOL. |, 4-111
SPECIFICATIONS (typical @ TcASE = +25°C and Vs = +15V de unless otherwise specified) eV MODEL "AD3554AM ‘AD3554BM ‘AD35545M ‘OPEN LOOP GAIN ~ TS No Load 1064B (10048 min) : . Ry = 100 9648 (904B min) . * —Re=toom rr rcv OT ll ‘OUTPUT CHARACTERISTICS . Voltage @ Ip = £100mA £11V (t10V min) . . ‘Output Resistance, Open Loop ® f= 10MHz 2002 Current @ Vo = #10V +£125mA (#100mA min) ‘ * FREQUENCY RESPONSE Bandwidth (OdB, Small Signal, Cp = 0)! 90MHz (70MHz min) ‘ : Gain-Bandwidth Product, Cp = 0 G=10v/V 225MHHz (150MHz min) : : G= 100v/V 725MHz (425MHz min) : : G = 1000V/V 1700MHz (1000MHz min) . . Full Power Bandwidth, Cr = 0, Vo = 20V p-p, Ry = 1002 19MHz (16MHz min) . . Slew Rate, Cr = 0, Vo = 20V pp, Ry = 1008 1200V /ys (1000V/us min) : * Settling Time, A = -1, to 21% 60ns : . 10 40.1% 120ns : : to 20.05% 140ns (150ns max) : . to £0,01% 200ns (250ns max) ‘ : INPUT OFFSET VOLTAGE Initial Offset 0.5mV (2.0mV max) 0.2mV (1.0mV max) ” vs. Temperature 20uV/C (SOpV/C max) BV FC (15uV/PC max) 12mV/°C (25uVPC max) ¥s. Supply, Ta = min to max BOUV/V (300uV/V max) ‘ ‘ INPUT BIAS CURRENT —— a Either Input? 10pA (SpA max) ot : Initial Difference 2pA (10pA max) : . vs. Supply Voltage 1pa/v . . INPUT IMPEDANCE Differential 10" Q2pF . . ‘Common Mode 10" O)2pF : . INPUT VOLTAGE RANGE Max Safe Input Voltage, Diff +Vecl-8) : . ‘Common Mode (Voc l-4) . : ‘Common Mode Rejection, Vom = +7V,-10V_ 7848 (6048 min) . . POWER SUPPLY Rated Performance 215V . . Operating 3(7 10 18) . : Quiescent Current 28mA (45mA max) . ‘ INPUT NOISE" Voltage, fo = 1Hz sav if fh asonv! iz max) bd . fo = 10Hz SOnVA/Hz (160nV/A/He max) . . fo = 100Hz 25nV//Hz (90nV/A/Hz max) . : fo = 1kHz 15nVA/Hz (SOnVA/Hz max) . . fo = 10kH2 Low te (GSnVA/He max) . : fo = 100kH2 BnVA/ Ha (25nVA/Hz max) . . fy = IMHz ‘TaVA/ Hz (25nVA/Hz max) . . fp = 0.342 to 10H2 2uV p-p (7HV pep max) . . fp = 10H2 to 1MHz 8uV ems (25xV mms max) . : Current, fg = 3Hz to 10Hz 45fA pp . : fg = 10H2 to IMHz 2pA rms : : TEMPERATURE RANGE sc ‘Operating, Rated Performance -25°C to +85°C . -55°C to +125°C Storage ~65°C to +130°C : : NOTES "These parameters are untested and not guaranteed. This specifica: > See Section 19 for package outline information. tion is established to 4 90% confidence level. “Specifications tame as ADSSS4AM. Bias Current specifications are guaranteed maximum at ether input _—_* Specifications same as ADSS4BM. sTqgp.= oC Forges temperatoe he arent dene Speedicetions subject to change without notice. VOL. |, 4-112 OPERATIONAL AMPLIFIERS
LAYOUT CONSIDERATIONS The selected compensation capacitor may be a trimmer, a AS is the case with any high-speed design, proper layout is fixed capacitor or a planned PC board capacitance. The critical to avoid the introduction of unnecessary errors due to capacitance value is strongly dependent on circuit layout high-frequency coupling and stray capacitance. and closed loop gain. Large ground planes should be used whenever possible to SHORT CIRCUIT PROTECTION provide a low resistance, low inductance circuit path, as well The AD3554 is short circuit protected for continuous output as shielding the effects of high-frequency coupling. Sockets shorts to ground, Output shorts to either supply will destroy 4 | should be avoided, as the increased inter-lead capacitance can _the device. degrade bandwidth. Input and output connections should be EAT SINKING kept as short as practical, particularly to the inverting input, The AD3554 does not require heat sinking for most applica- which is especially sensitive to stray capacitances. tions. However, at extreme temperature and full load Low value resistors should be used to assure that the time conditions a heat sink will be necessary as indicated in the constants formed with the circuit capacitances will not limit maximum power dissipation curve, We recommend connecting the amplifier performance. Resistor values less than 5.6k the heat sink to the amplifier case and keeping the combina- are recommended. tion ungrounded. Each power supply lead should be bypassed to ground as close. TYPICAL CIRCUITS as possible to the amplifier pins. A 10uF electrolytic or tan- talum capacitor in parallel with a 0.014F ceramic capacitor 5.62 is recommended. GROUNDING . Grounding the case will add a slight capacitance to each pin. ‘Therefore, we recommend leaving the case ungrounded. sex In inverting applications we recommend grounding the non- Vo ©)- inverting input rather than connecting it to a bias current oO oVour compensating resistor. FET input amplifiers do not require compensating resistors because of their low input bias cur- 6) One rents, som GUARDING In high input impedance applications the input terminals may 202 be surrounded by a conductive path to divert leakage currents. This guard ring should be connected to a low impedance point +s at the input signal potential. ‘* THESE COMPONENTS MAY BE ELIMINATED WHEN NOT In high frequency applications guarding may not be desirable DRIVING LARGE CAPACITIVE LOADS. as it increases the risk of oscillation due to increased printed circuit board capacitance. Figure 19. Unity Gain Inverter COMPENSATION The user can optimize the bandwidth, slew rate, or settling time by selecting the external frequency compensation ca- pacitor. No compensation capacitor is required for closed loop gains above $0 and when the load capacitance is less than oa | 100pF. When driving capacitive loads greater than 470pF, in low closed loop gain configurations, connect a 1000pF ca- 1) oVout pacitor between pin 8 and the positive supply. The perform- wo) ) ance may be improved by connecting a small resistor in series omg 1000pF* with the output and a small capacitor from pin 1 to 5. See Typical Circuits, OKs The flat high frequency response of the AD3554 may be pre- served and any high frequency peaking avoided by connecting Ns a small capacitor in parallel with the feedback resistor. This capacitor will compensate for the closed loop, high frequency, “THESE COMPONENTS MAY BE ELIMINATED WHEN NOT transfer function zero that results from the time constant . formed by the input capacitance of the amplifier, typically 2pF, and the input and feedback resistors. Using small resistor ; values will keep the break frequency of this zero sufficiently Figure 20. Follower high, avoiding peaking and preserving the phase margin. OPERATIONAL AMPLIFIERS VOL. |, 4-115
DRIVING LARGE CAPACITIVE LOADS. Figure 21. inverting Gain of 10 Amplifier