34704

34704_09 FREESCALE | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 49

Technical content

Features

• 8 DC/DC (34704A) or 5 DC/DC (34704B) switching regulators with up to ±2% output voltage accuracy
• Dynamic voltage scaling on all regulators.
• Selectable voltage mode control or current mode control on REG8
• I 2C programmability
• Output under-voltage and over-voltage detection for each regulator
• Over-current limit detection and sh ort-circuit protection for each regulator
• Thermal limit detection for each regulator, except REG7
• Integrated compensation for REG1, REG3, REG6, and REG8
• 5.0µA maximum shutdown current (All regulators are off, 5.5V VIN)
• True cutoff on all of the boost and buck-boost regulators
• Pb-free packaging designated by suffix code EP

Figure 1. 34704 Simplified Application Diagram

ORDERING INFORMATION

Range (TA) Package MC34704AEP/R2 -20°C to 85°C 56 QFN EP MC34704BEP/R2 EP SUFFIX (PB-FREE) 98ASA10751D 56-PIN QFN MPU DDR MEMORY VCORE VIO1 VIO2 VDDR VBKL LCD +5V VREF+ (5 to 16V) VREF- (-5 to -9V) 34704A/B * Available only in 34704A device REG 8 REG 4 REG 3 REG 2 REG 5 *REG 1 *REG 6 *REG 7 PGND I2C COMM GND GND

2 Freescale Semiconductor

Table 1. Device Variations

Figure 2. 34704 Internal Block Diagram

4 Freescale Semiconductor

Figure 3. 34704 Pin Connections Table 2. 34704 Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on page 17.

1 A/B BT5U Passive REG5 Boost Stage

enhance the gate of the Switch Power MOSFET.

2 A/B BT4D Passive REG4 Buck Stage

enhance the gate of the Switch Power MOSFET.

3 A/B PVIN4 Power REG4 power supply input

This is the connection to the drain of the high side switch FET. Input decoupling /filtering is required for proper REG4 operation.

4 A/B SW4D Input/Output REG4 Buck Stage

The inductor is connected between this pin and the SW4U pin.

5 A/B VOUT4 Output REG4 regulated output

6 A/B SW4U Input/Output REG4 Boost Stage

The inductor is connected between this pin and the SW4D pin.

7 A/B BT4U Passive REG4 Boost Stage

enhance the gate of the Switch Power MOSFET.

8 A/B FB4 Input REG4 voltage feedback

Connect the feedback resistor divider to this pin.

9 A/B COMP4 Passive REG4 compensation

REG4 compensation network connection.

10 A/B BT3 Passive REG3 bootstrap capacitor

enhance the gate of the Switch Power MOSFET.

11 A/B PVIN3 Power REG3 power supply input

This is the connection to the drain of the high side switch FET. Input decoupling /filtering is required for proper REG3 operation.

12 A/B SW3 Output REG3 switching node The inductor is connected between this pin and the regulated

13 A/B VOUT3 Output REG3 output voltage

This is the discharge path of REG3 output voltage.

14 A/B FB3 Input REG3 voltage feedback

Connect the feedback resistor divider to this pin.

15 A/B SS Input Soft start time The soft start time for all regulators can be adjusted by

16 A/B FREQ Input Oscillator frequency The oscillator frequency can be adjusted by connecting this pin

to an external resistor divider between VDDI and AGND pins.

17 A/B FB8 Input REG8 voltage feedback

Connect the feedback resistor divider to this pin.

18 A/B BT8 Passive REG8 bootstrap capacitor

enhance the gate of the Synchronous Power MOSFET.

19 A/B VOUT8 Output REG8 regulated output

filter as close to the pin as possible. 20 A/B SW8 Output REG8 switching node The inductor is connected between this pin and VIN pin. 21 A/B SW1 Output REG1 switching node The inductor is connected between this pin and VIN Pin.

22 A/B VG Passive REG1 regulated output

23 A VOUT1 Output REG1 regulated output

filter as close to the pin as possible. B NC0 No Connect - Pin 23 is not connected.

24 A/B BT1 Passive REG1 bootstrap capacitor

enhance the gate of the Switch Power MOSFET.

25 A/B SCL Input/Output I2C serial interface clock

I2C serial interface clock input.

26 A/B SDA Input/Output I2C serial interface data

I2C serial interface data input.

27 A/B RST Open Drain Power reset output signal

28 A COMP7 Passive REG7 compensation

REG7 compensation network connection.

29 A VREF7 Output REG7 resistor feedback

Connect this pin to the bottom of the feedback resistor divider. Table 2. 34704 Pin Definitions (continued) A functional description of each pin can be found in the Functional Pin Description section beginning on page 17.

6 Freescale Semiconductor

30 A FB7 Input REG7 voltage feedback

Connect the feedback resistor divider to this pin.

31 A DRV7 Output REG7 external Power

REG7 external Power MOSFET gate drive.

32 A VOUT7 Output REG7 output voltage

This is the discharge path of REG7 output voltage.

33 A FB6 Input REG6 voltage feedback

Connect the feedback resistor divider to this pin.

34 A BT6 Passive REG6 bootstrap capacitor

enhance the gate of the Synchronous Power MOSFET. REG6 switching node The inductor is connected between this pin and the VIN pin.

36 A VOUT6 Output REG6 regulated output

filter as close to the pin as possible. 37 A/B AGND Ground Analog ground of the IC Analog ground of the IC.

38 A/B VIN Power Battery voltage

40 A/B LION Input Battery Detection Pull this pin high to VIN to indicate a connection to a Li-Ion

41 A/B ONOFF Input Dual function IC turn On/

connected to a mechanical switch to turn the power On or Off.

42 A/B BT2U Passive REG2 Boost Stage

enhance the gate of the Switch Power MOSFET.

43 A/B COMP2 Passive REG2 compensation

REG2 compensation network connection.

44 A/B FB2 Input REG2 voltage feedback

Connect the feedback resistor divider to this pin.

45 A/B BT2D Passive REG2 Buck Stage

enhance the gate of the Switch Power MOSFET. A functional description of each pin can be found in the Functional Pin Description section beginning on page 17.

46 A/B PVIN2 Power REG2 power supply input

This is the connection to the drain of the high side switch FET. Input decoupling /filtering is required for proper REG2 operation.

47 A/B SW2D Input/Output REG2 Buck Stage

The inductor is connected between this pin and the SW2U pin.

48 A/B VOUT2 Output REG2 regulated output

49 A/B SW2U Input/Output REG2 Boost Stage

The inductor is connected between this pin and the SW2D pin.

50 A/B SW5U Input/Output REG5 Boost Stage

The inductor is connected between this pin and the SW5D pin.

51 A/B VOUT5 Output REG5 regulated output

52 A/B SW5D Input/Output REG5 Buck Stage

The inductor is connected between this pin and the SW5U pin.

53 A/B PVIN5 Power REG5 power supply input

This is the connection to the drain of the high side switch FET. Input decoupling /filtering is required for proper REG5 operation.

54 A/B BT5D Passive REG5 Buck Stage

enhance the gate of the Switch Power MOSFET.

55 A/B FB5 Input REG5 voltage feedback

Connect the feedback resistor divider to this pin.

56 A/B COMP5 Passive REG5 compensation

REG5 compensation network connection. REG7. This pad is provided to enhance thermal performance. A functional description of each pin can be found in the Functional Pin Description section beginning on page 17.

Analog Integrated Circuit Device Data

8 Freescale Semiconductor

ELECTRICAL CHARACTERISTICS

Table 3. Maximum Ratings permanent damage to the device.

1. ESD testing is performed in accordanc e with the Human Body Model (HBM) (CZAP = 100 pF, RZAP = 1500 Ω), and the Charge Device

Model (CDM), Robotic (CZAP = 4.0pF).

1. Pin soldering temperature limit is for 10 seconds maximum dura tion. Not designed for immersion soldering. Exceeding these limits may

cause malfunction or permanent damage to the device.

1. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow

and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.

1. Thermal Resistance is based on a four-layer board (2s2p)
2. Available only on the 34704A

Analog Integrated Circuit Device Data Freescale Semiconductor 9 34704 STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.

1. Available only on the 34704A

Analog Integrated Circuit Device Data

10 Freescale Semiconductor

STATIC ELECTRICAL CHARACTERISTICS REGULATOR 2 Output Voltage Range VOUT 0.6 3.3 3.6 V Output Accuracy - -2.0 - 2.0 % Line/Load Regulation(8) REGLN/LD -1.0 - 1.0 % Dynamic Voltage Scaling Range VDYN -17.5 - 17.5 % Dynamic Voltage Scaling Step Size VDYN_STEP - 2.5 - % Continuous Output Current(8) IOUT - 200 500 mA Li-Ion Battery Over-current Limit (Detected in buck high side FET) ILIM_ION - 1.4 - A Li-Ion Battery Short-circuit Current Limit (Detected in buck high side FET) ISHORT_ION - 2.1 - A Li-Ion Battery Over-current Limit Accuracy - -20 - 20 % N-CH Buck Switch Power MOSFET RDS(ON) RDS(ON)-SW - 120 - mΩ N-CH Buck Synch. Power MOSFET RDS(ON) RDS(ON)-SY - 1000 - mΩ N-CH Boost Switch Power MOSFET RDS(ON) RDS(ON)-SW - 120 - mΩ N-CH Boost Synch. Power MOSFET RDS(ON) RDS(ON)-SY - 120 - mΩ Discharge MOSFET RDS(ON) RDS(ON)-DIS - 70 - Ω Thermal Shutdown Threshold(8) TSD - 170 - °C Thermal Shutdown Hysteresis(8) TSD-HYS - 25 - °C PVIN2 Leakage Current (Off State) @25°C IPVIN2G_LKG - - 1.0 μA SW2D Leakage Current (Off State) @25°C ISW2D_LKG - - 1.0 μA SW2U Leakage Current (Off State) @25°C ISW2U_LKG - - 1.0 μA REGULATOR 3 Output Voltage Range (Li-Ion Battery) VOUT 0.6 1.2 1.8 V Output Accuracy - -4.0 - 4.0 % Line/Load Regulation(8) REGLN/LD -1.0 - 1.0 % Dynamic Voltage Scaling Range VDYN -17.5 - 17.5 % Dynamic Voltage Scaling Step Size VDYN_STEP - 2.5 - % Continuous Output Current(8) IOUT - 150 550 mA Li-Ion Battery Over-current Limit (Detected in buck high side FET) ILIM_ION - 1.0 - A Li-Ion Battery Short-circuit Current Limit (Detected in buck high side FET) ISHORT_ION - 1.5 - A Li-Ion Battery Over-current Limit Accuracy - -20 - 20 % N-CH Switch Power MOSFET RDS(ON) RDS(ON)-SW - 500 - mΩ N-CH Synch. Power MOSFET RDS(ON) RDS(ON)-SY - 500 - mΩ Discharge MOSFET RDS(ON) RDS(ON)-DIS - 70 - Ω Thermal Shutdown Threshold (8) TSD - 170 - °C Thermal Shutdown Hysteresis(8) TSD-HYS - 25 - °C PVIN3 Leakage Current (Off State) @25°C IPVIN3_LKG - - 1.0 μA SW3 Leakage Current (Off State) @25°C ISW3_LKG - - 1.0 μA Notes: 8. Guaranteed by Design Table 4. Static Electrical Characteristics (continued) values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.

Analog Integrated Circuit Device Data Freescale Semiconductor 11 34704 STATIC ELECTRICAL CHARACTERISTICS REGULATOR 4 Output Voltage Range VOUT 0.6 1.8 3.6 V Output Accuracy - -2.0 - 2.0 % Line/Load Regulation(9) REGLN/LD -1.0 - 1.0 % Dynamic Voltage Scaling Range VDYN -10 - 10 % Dynamic Voltage Scaling Step Size VDYN_STEP - 1.0 - % Continuous Output Current(9) IOUT - 100 300 mA Li-Ion Battery Over-current Limit (Detected in buck high side FET) ILIM_ION - 1.5 - A Li-Ion Battery Short-circuit Current Limit (Detected in buck high side FET) ISHORT_ION - 2.25 - A Li-Ion Battery Over-current Limit Accuracy - -20 - 20 % N-CH Buck Switch Power MOSFET RDS(ON) RDS(ON)-SW - 200 - mΩ N-CH Buck Synch. Power MOSFET RDS(ON) RDS(ON)-SY - 600 - mΩ N-CH Boost Switch Power MOSFET RDS(ON) RDS(ON)-SW - 200 - mΩ N-CH Boost Synch. Power MOSFET RDS(ON) RDS(ON)-SY - 600 - mΩ Discharge MOSFET RDS(ON) RDS(ON)-DIS - 70 - Ω Thermal Shutdown Threshold(9) TSD - 170 - °C Thermal Shutdown Hysteresis(9) TSD-HYS - 25 - °C PVIN4 Leakage Current (Off State) @25°C IPVIN4_LKG - - 1.0 μA SW4D Leakage Current (Off State) @25°C ISW4D_LKG - - 1.0 μA SW4U Leakage Current (Off State) @25°C ISW4U_LKG - - 1.0 μA REGULATOR 5 Output Voltage Range VOUT 0.6 3.3 3.6 V Output Accuracy - -2.0 - 2.0 % Line/Load Regulation(9) REGLN/LD -1.0 - 1.0 % Dynamic Voltage Scaling Range VDYN -17.5 - 17.5 % Dynamic Voltage Scaling Step Size VDYN_STEP - 2.5 - % Continuous Output Current(9) IOUT - 150 500 mA Li-Ion Battery Over-current Limit (Detected in buck high side FET) ILIM_ION - 1.4 - A Li-Ion Battery Short-circuit Current Limit (Detected in buck high side FET) ISHORT_ION - 2.1 - A Li-Ion Battery Over-current Limit Accuracy - -20 - 20 % N-CH Buck Switch Power MOSFET RDS(ON) RDS(ON)-SW - 120 - mΩ N-CH Buck Synch. Power MOSFET RDS(ON) RDS(ON)-SY - 1000 - mΩ N-CH Boost Switch Power MOSFET RDS(ON) RDS(ON)-SW - 120 - mΩ N-CH Boost Synch. Power MOSFET RDS(ON) RDS(ON)-SY - 120 - mΩ Discharge MOSFET RDS(ON) RDS(ON)-DIS - 70 - Ω Thermal Shutdown Threshold(9) TSD - 170 - °C Thermal Shutdown Hysteresis(9) TSD-HYS - 25 - °C Notes: 9. Guaranteed by Design values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.

Analog Integrated Circuit Device Data

12 Freescale Semiconductor

STATIC ELECTRICAL CHARACTERISTICS PVIN5 Leakage Current (Off State) @25°C IPVIN5_LKG - - 1.0 μA SW5D Leakage Current (Off State) @25°C ISW5D_LKG - - 1.0 μA SW5U Leakage Current (Off State) @25°C ISW5U_LKG - - 1.0 μA REGULATOR 6(11) Output Voltage Range VOUT 5.0(12) 15 15 V Output Accuracy - -4.0 - 4.0 % Line/Load Regulation(10) REGLN/LD -1.0 - 1.0 % Dynamic Voltage Scaling Range VDYN -10 - 10 % Dynamic Voltage Scaling Step Size VDYN_STEP - 2.5 - % Continuous Output Current(10) IOUT - 50 60 mA Li-Ion Battery Over-current Limit (Detected in low side FET) ILIM_ION - 3.0 - A Li-Ion Battery Short-circuit Current Limit (Detected in the Blocking FET) ISHORT_ION - 4.5 - A Li-Ion Battery Over-current Limit Accuracy - -20 - 20 % N-CH Switch Power MOSFET RDS(ON) RDS(ON)-SW - 200 - mΩ N-CH Synch. Power MOSFET RDS(ON) RDS(ON)-SY - 600 - mΩ N-CH Shutdown Power MOSFET RDS(ON) RDS(ON)-SH - 200 - mΩ Discharge MOSFET RDS(ON) RDS(ON)-DIS - 70 - Ω Thermal Shutdown Threshold(10) TSD - 170 - °C Thermal Shutdown Hysteresis(10) TSD-HYS - 25 - °C SW6 Leakage Current (Off State) @25°C ISW6_LKG - - 1.0 μA REGULATOR 7(11) Output Voltage Range (Li-Ion Battery) VOUT -5.0 -7.0 -9.0 V Output Accuracy - -2.0 - 2.0 % Line/Load Regulation(10) REGLN/LD -1.0 - 1.0 % Continuous Output Current(10) IOUT - 50 60 mA Discharge MOSFET RDS(ON) RDS(ON)-DIS - 55 - Ω Gate Drive Voltage High Level (@ -50mA, VIN=3.6V) VIN-VOH - 0.8 1.4 V Gate Drive Voltage Low Level (@ 50mA, VIN=3.6V) VOL - 1.1 1.8 V VREF7 Output Voltage VREF7 - 1.5 - V VREF7 Voltage Accuracy - 1.43 - 1.57 V VREF7 Output Load Regulation (10μA to 1.0mA) REGLD 1.43 - 1.57 V Notes 10. Guaranteed by Design 11. Available only on the 34704A 12. When battery voltage is higher than 5.0V, a diode implem entation like the one displayed on VG is necessary. values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.

Analog Integrated Circuit Device Data Freescale Semiconductor 13 34704 STATIC ELECTRICAL CHARACTERISTICS REGULATOR 8 Output Voltage Range (Li-Ion Battery) VOUT 5.0(14) 15 15 V Output Accuracy - -4.0 - 4.0 % Dynamic Voltage Scaling Range VDYN -10 - 10 % Dynamic Voltage Scaling Step Size VDYN_STEP - 2.5 - % Line/Load Regulation(13) REGLN/LD -1.0 - 1.0 % Continuous Output Current(13) IOUT - 15 30 mA Li-Ion Battery Over-current Limit (Detected in low side FET) ILIM_ION - 1.0 - A Li-Ion Battery Short-circuit Current Limit (Detected in the Blocking FET) ISHORT_ION - 1.5 - A Li-Ion Battery Over-current Limit Accuracy - -20 - 20 % N-CH Switch Power MOSFET RDS(ON) RDS(ON)-SW - 450 - mΩ N-CH Synch. Power MOSFET RDS(ON) RDS(ON)-SY - 1000 - mΩ N-CH Shutdown Power MOSFET RDS(ON) RDS(ON)-SH - 450 - mΩ Discharge MOSFET RDS(ON) RDS(ON)-DIS - 70 - Ω Thermal Shutdown Threshold(13) TSD - 170 - °C Thermal Shutdown Hysteresis(13) TSD-HYS - 25 - °C SW8 Leakage Current (Off State) @25°C ISW8_LKG - - 1.0 μA Notes 13. Guaranteed by Design 14. When battery voltage is higher than 5.0V, a diode implem entation like the one displayed on VG is necessary. values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.

Analog Integrated Circuit Device Data

14 Freescale Semiconductor

DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 5. Dynamic Electrical Characteristics values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.

1. When REG1 is used, the maximum F SW1 Frequency programed with external components should be 1500KHz

Analog Integrated Circuit Device Data Freescale Semiconductor 15 34704 DYNAMIC ELECTRICAL CHARACTERISTICS REGULATOR 3 Li-Ion Battery Operating Frequency FSW1 750 - 2000 kHz Operating Frequency Selection Step Size FSTEP - 250 - kHz REGULATOR 4 Li-Ion Battery Operating Frequency FSW1 750 - 2000 kHz Operating Frequency Selection Step Size FSTEP - 250 - kHz REGULATOR 5 Li-Ion Battery Operating Frequency FSW1 750 - 2000 kHz Operating Frequency Selection Step Size FSTEP - 250 - kHz REGULATOR 6 Li-Ion Battery Operating Frequency FSW2 250 - 1000 kHz Operating Frequency Selection Step Size FSTEP - 250 - kHz REGULATOR 7 Operating Frequency Selections FSW2 250 - 1000 kHz Operating Frequency Selection Step Size FSTEP - 250 - kHz REGULATOR 8 Li-Ion Battery Operating Frequency FSW2 250 - 1000 kHz Operating Frequency Selection Step Size FSTEP - 250 - kHz values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.

Analog Integrated Circuit Device Data

16 Freescale Semiconductor

The 34704 is an multi-channel power management IC (PMIC) meant to address power management needs for various multimedia applications microprocessors in various configurations with a target overall efficiency of > 80% at typical loads. The 34704 accepts an input voltage from various sources:

• 1 cell Li-Ion/Polymer (2.7V to 4.2V)
• 5.0V USB supply or AC wall adapter The different channels are: REG1, REG3, REG6, and REG8 use internal compensation, while REG2, REG4, REG5, and REG7 use external compensation. The switching frequency of all regulators except REG6, 7, & 8 can be selected through the FREQ pin between 750kHz and 2.0MHz in 250kHz steps, when operating from a Li-Ion battery. The high frequency operation is meant to minimize the size of external components while lower operating frequencies will allow for higher efficiency. REG7 is limited to operate at a lower frequency to minimize switching noise induced by driving the external switching MOSFET, but also can operate at the 1.0MHz value with proper board layout. REG 6, 7, and 8 switching frequency can be selected between 250kHz and 1.0MHz in 250kHz steps through I 2C. For all regulators and at lower loads, a pulse skipping mode is implemented to maintain high efficiency. The 34704 uses 4 different phases of switching for all regulators except REG6, 7, and 8, to spread out the current draw by the individual converters from the input supply over time, to reduce the peak input current demand. This allows for better EMI performance and reduction in the input filter requirements. Each regulator except REG1 uses an external feedback resistor divider to set the output voltage. All output voltages can be adjusted dynamically (Dynamic Voltage Scaling) on the fly through an I²C serial interface. All converters, except REG1, utilize automatic soft-start by ramping the reference voltage to the error amplifier to prevent sudden change in duty cycle and output current/voltage at power up. REG1 (VG) will limit the inrush current by implementing a peak current detect and a constant off time. The 34704 is equipped with a dual function Power On/Off pin (ONOFF). This pin can be controlled by a mechanical switch to turn the device on or off. Pressing and releasing the mechanical switch turns the 34704 on while pressing and holding the switch for a time period (programmable through I 2C) turns the 34704 off. Enable/disable control is also granted through I2C for groups of regulators and the whole IC. REGULATOR REGULATOR TYPE VOUT TYP (V) IOUT TYP (MA) IOUT MAX (MA) TARGET APPLICATION REG1(18) Synchronous Boost 5.0 100 500 +5V REF REG2 Synchronous Buck-Boost 2.8 / 3.3 200 500 µP I/O REG3 Synchronous Buck 1.2 / 1.5 / 1.8 150 550 µP Core REG4 Synchronous Buck-Boost 1.8 / 2.5 100 300 DDR REG5 Synchronous Buck-Boost 3.3 150 500 µP I/O REG6(18) Synchronous Boost 15.0 20 60 REF+ REG7(18) Inverter Controller -7.0 20 60 REF - REG8 Synchronous Boost 15.0 15 30 Backlight Display Notes 17. Synchronous Buck-Boost: These regulators can work as pure BUCK regulator when the output voltage is lower than the input voltage; and work as pure BOOST regulator when the input voltage is lower than the output voltage. Compensation should be done for the worst case scenario, which is in most of the cases when the device is working as a boost converter, after compensating for this scenario it is recommended to verify the buck operation to assure stability in the whole operating range. 18. Available only on the 34704A

Analog Integrated Circuit Device Data Freescale Semiconductor 17 34704 FUNCTIONAL DESCRIPTION FUNCTIONAL PIN DESCRIPTION FUNCTIONAL PIN DESCRIPTION REG5 BOOST STAGE BOOTSTRAP CAPACITOR INPUT PIN (BT5U) Connect a 1μF capacitor between this pin and SW5U pin to enhance the gate of the Switch Power MOSFET. REG4 BUCK STAGE BOOTSTRAP CAPACITOR INPUT PIN (BT4D) Connect a 0.01μF capacitor between this pin and SW4D pin to enhance the gate of the Switch Power MOSFET. REG4 POWER SUPPLY INPUT VOLTAGE (PVIN4) This is the connection to the drain of the high side switch FET. Input decoupling /filtering is required for proper REG4 operation. REG4 BUCK STAGE SWITCHING NODE (SW4D) The inductor is connected between this pin and the SW4U pin. REG4 REGULATED OUTPUT VOLTAGE PIN (VOUT4) Connect this pin to the load and to the output filter as close to the pin as possible. REG4 BOOST STAGE SWITCHING NODE (SW4U) The inductor is connected between this pin and the SW4D pin. REG4 BOOST STAGE BOOTSTRAP CAPACITOR INPUT PIN (BT4U) Connect a 0.01μF capacitor between this pin and SW4U pin to enhance the gate of the Switch Power MOSFET. REG4 VOLTAGE FEEDBACK INPUT FOR VOLTAGE REGULATION/PROGRAMMING (FB4) Connect the feedback resistor divider to this pin. REG4 COMPENSATION NETWORK CONNECTION (COMP4) REG4 compensation network connection. REG3 BOOTSTRAP CAPACITOR INPUT PIN (BT3) Connect a 0.01μF capacitor between this pin and SW3 pin to enhance the gate of the Switch Power MOSFET. REG3 POWER SUPPLY INPUT VOLTAGE (PVIN3) This is the connection to the drain of the high side switch FET. Input decoupling /filtering is required for proper REG3 operation. REG3 SWITCHING NODE (SW3) The inductor is connected between this pin and the regulated REG3 output. REG3 OUTPUT VOLTAGE RETURN PIN (VOUT3) This is the discharge path of REG3 output voltage. REG3 VOLTAGE FEEDBACK INPUT FOR VOLTAGE REGULATION/PROGRAMMING (FB3) Connect the feedback resistor divider to this pin. SOFT START TIME (SS) The soft start time for all regulators can be adjusted by connecting this pin to an external resistor divider between VDDI and AGND pins. OSCILLATOR FREQUENCY (FREQ) The oscillator frequency can be adjusted by connecting this pin to an external resistor divider between VDDI and AGND pins. This pin sets F SW1 value. REG8 VOLTAGE FEEDBACK INPUT FOR VOLTAGE REGULATION/PROGRAMMING (FB8) Connect the feedback resistor divider to this pin, when voltage mode control is used. When current mode control is used, connect this pin between the LED string and an ISET resistor to GND to force the operating current. Refer to Figure 7 and Figure 8. Exclude the components not used. REG8 BOOTSTRAP CAPACITOR INPUT PIN (BT8) Connect a 0.01μF capacitor between this pin and SW8 pin to enhance the gate of the Synchronous Power MOSFET. REG8 REGULATED OUTPUT VOLTAGE PIN (VOUT8) Connect this pin directly to the load directly and to the output filter as close to the pin as possible. REG8 SWITCHING NODE (SW8) The inductor is connected between this pin and VIN pin. REG1 SWITCHING NODE (SW1) The inductor is connected between this pin and VIN pin. REG1 REGULATED OUTPUT VOLTAGE BEFORE THE CUT-OFF SWITCH (VG) REG1 regulated output voltage before the cutoff switch. This supplies the internal circuits and the gate drive.

Analog Integrated Circuit Device Data

18 Freescale Semiconductor

FUNCTIONAL PIN DESCRIPTION REG1 REGULATED OUTPUT VOLTAGE PIN (VOUT1) (34704A ONLY) Connect this pin directly to the load directly and to the output filter as close to the pin as possible. REG1 BOOTSTRAP CAPACITOR INPUT PIN (BT1) Connect a 1μF capacitor between this pin and SW1 pin to enhance the gate of the Switch Power MOSFET. I2C SERIAL INTERFACE CLOCK INPUT (SCL) I2C serial interface clock input. I2C SERIAL INTERFACE DATA INPUT (SDA) I2C serial interface data input POWER RESET OUTPUT SIGNAL (MICROPROCESSOR RESET) (RST) This is an open drain output and must be pulled up by an external resistor to a supply voltage like VIN. REG7 COMPENSATION NETWORK CONNECTION (COMP7) REG7 compensation network connection. REG7 RESISTOR FEEDBACK NETWORK REFERENCE VOLTAGE (VREF7) (34704A ONLY) Connect this pin to the bottom of the feedback resistor divider. REG7 VOLTAGE FEEDBACK INPUT FOR VOLTAGE REGULATION/PROGRAMMING (FB7) (34704A ONLY) Connect the feedback resistor divider to this pin. REG7 EXTERNAL POWER MOSFET GATE DRIVE (DRV7) (34704A ONLY) REG7 external Power MOSFET gate drive. REG7 OUTPUT VOLTAGE RETURN PIN (VOUT7) (34704A ONLY) This is the discharge path of REG7 output voltage. REG6 VOLTAGE FEEDBACK INPUT FOR VOLTAGE REGULATION/PROGRAMMING (FB6) (34704A ONLY) Connect the feedback resistor divider to this pin. REG6 BOOTSTRAP CAPACITOR INPUT PIN (BT6) (34704A ONLY) Connect a 0.01μF capacitor between this pin and SW6 pin to enhance the gate of the Synchronous Power MOSFET. REG6 SWITCHING NODE (SW6) (34704A ONLY) The inductor is connected between this pin and the VIN pin. REG6 REGULATED OUTPUT VOLTAGE PIN (VOUT6) (34704A ONLY) Connect this pin directly to the load directly and to the output filter as close to the pin as possible. ANALOG GROUND (AGND) Analog ground of the IC. BATTERY VOLTAGE CONNECTION (VIN) Input decoupling /filtering is required for the device to operate properly. INTERNAL SUPPLY VOLTAGE (VDDI) Connect a 1μF low ESR decoupling filter capacitor between this pin and GND. BATTERY DETECTION (LION) Pull this pin high to VIN to indicate a connection to a Li-Ion battery. DUAL FUNCTION IC TURN ON/OFF (ONOFF) This is a hardware enable/disable for the 34704. It can be connected to a mechanical switch to turn the power On or Off. REG2 BOOST STAGE BOOTSTRAP CAPACITOR INPUT PIN (BT2U) Connect a 1μF capacitor between this pin and SW2U pin to enhance the gate of the Switch Power MOSFET. REG2 COMPENSATION NETWORK CONNECTION (COMP2) REG2 compensation network connection. REG2 VOLTAGE FEEDBACK INPUT FOR VOLTAGE REGULATION/PROGRAMMING (FB2) Connect the feedback resistor divider to this pin. REG2 BUCK STAGE BOOTSTRAP CAPACITOR INPUT PIN (BT2D) Connect a 1μF capacitor between this pin and SW2D pin to enhance the gate of the Switch Power MOSFET. REG2 POWER SUPPLY INPUT VOLTAGE (PVIN2) This is the connection to the drain of the high side switch FET. Input decoupling /filtering is required for proper REG2 operation.

Analog Integrated Circuit Device Data Freescale Semiconductor 19 34704 FUNCTIONAL DESCRIPTION FUNCTIONAL PIN DESCRIPTION REG2 BUCK STAGE SWITCHING NODE (SW2D) The inductor is connected between this pin and the SW2U pin. REG2 REGULATED OUTPUT VOLTAGE PIN (VOUT2) Connect this pin to the load and to the output filter as close to the pin as possible. REG2 BOOST STAGE SWITCHING NODE (SW2U) The inductor is connected between this pin and the SW2D pin. REG5 BOOST STAGE SWITCHING NODE (SW5U) The inductor is connected between this pin and the SW5D pin. REG5 REGULATED OUTPUT VOLTAGE PIN (VOUT5) Connect this pin to the load and to the output filter as close to the pin as possible. REG5 BUCK STAGE SWITCHING NODE (SW5D) The inductor is connected between this pin and the SW5U pin. REG5 POWER SUPPLY INPUT VOLTAGE (PVIN5) This is the connection to the drain of the high side switch FET. Input decoupling /filtering is required for proper REG5 operation. REG5 BUCK STAGE BOOTSTRAP CAPACITOR INPUT PIN (BT5D) Connect a 1μF capacitor between this pin and SW5D pin to enhance the gate of the Switch Power MOSFET. REG5 VOLTAGE FEEDBACK INPUT FOR VOLTAGE REGULATION/PROGRAMMING (FB5) Connect the feedback resistor divider to this pin. REG5 COMPENSATION NETWORK CONNECTION (COMP5) REG5 compensation network connection. POWER GROUND CONNECTION FOR ALL OF THE REGULATORS EXCEPT REG7 (PGND) Power Ground Connection for all of the regulators except REG7.

20 Freescale Semiconductor

Figure 4. MC34704 Functional Internal Block Diagram rest of the regulators and itself. circuitry for the main control loop to take over. selected, the PWM control of REG1 can take over. voltage for setting the output voltage on each regulator. There is a thermal sensor for each regulator except REG7.

• A soft over-current limit (o ver-current limit): If the peak current reaches the typical over-current limit, the switcher will start a cycle-by-cycle operation to limit the current and a 10ms current limit timer starts. The switcher will stay in this mode of operation until the part regains normal MC34704 - Functional Block Diagram Internal Bias Circuit Fault Detection & Protection Output Groups Logic & Control Internal Bias Circuit Fault Detection & Protection Over-Voltage Thermal Limit Over-Current Short Circuit Under-Voltage Logic & Control Soft Start ControlStartup Sequencing Fault RegisterPhase Control I2C Communication & Registers VREF Generator Gate Driver Voltage VG VDDI Reference Output Groups Regulator 1*A C B D E Regulator 8 Regulator 5 Regulator 2 Regulator 3 Regulator 4 Regulator 5 Regulator 6* Regulator 7* * 34704A 8-CH only

Analog Integrated Circuit Device Data Freescale Semiconductor 21 34704 FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION operation, or shuts down after a failure to regain normal operation.

• A hard over-current limit (short -circuit limit) that is higher than the cycle by cycle limit at which the device reacts by shutting down the output immediately. This is necessary to prevent damage in case of a short-circuit. After that, only GrpB will attempt a one time retry after a time-out period of 10ms and will go through a new soft start cycle Output Over-voltage/Under-voltage Monitoring In the case of an output over-voltage/under-voltage, the user has two options that can be programmed through the I2C interface: Response A: The output will switch off automatically and the 34704 would alert the processor through I2C that such an event happened. Response B: The output will not switch off. Rather the 34704 communicates to the processor that an over-voltage/ under-voltage condition has occurred and waits for the processor decision to either shutoff or not; in the mean time the control loop will try to fix itself. LOGIC AND CONTROL Startup Sequencing At power up, the VG regulator starts ramping up in peak detect mode. Meanwhile, VDDI is tracking VG until it reaches regulation and releases a POR signal that enables the internal circuitry and reads the FREQ and SS configuration to ramp up REG2, REG3 and REG4, that serve as the MPU main power supplies. Once the MPU is up, I communication is available to enable or disable GrpA, GrpC, GrpD and GrpE. An extra sequence can be configured for REG5, REG6 and REG7, changing the order in which they ramp up when enabled. See Power-Up Sequence on page 27. Soft Start Control During power up the 34704 reads the SS terminal to configure a default soft start timing for all regulators when these are enabled. Soft start for REG5 to REG8 can be changed via I2C at any time after power up has successfully completed. Phase Control REG1 to REG5 use the main Switching frequency FSW1, which is configured through the FREQ terminal at power up. FSW1 uses 4 different phases of switching (clock is 80 degrees out of phase) to spread out the current draw by the individual converters from the input supply over time to reduce the peak input current demand. The remaining regulators use FSW2 which can be programmed at any time via I 2C after a successful power up sequence. Fault Register The 34704 has a dedicate fault register accessible via I2C which indicate which regulator is detecting a fault situation. In addition to this, each channel has its own fault register which indicates the type of fault detected in that regulator. I2C communication and Registers The 34704 can communicate using a standard I2C, communication protocol or an accurate I2C protocol. During the first one, the device processes the given command as soon as it has received it. During the accurate data communication, the device requires that each read/write command be sent twice to validate the data. The 34704 provides a user accessible register map that allows various general IC configurations as well as independent control of each regulator, including fault flag registers and all configurable features for each regulator. OUTPUT GROUPS - REGULATORS The 34704 is divided in 5 different groups which are arranged as follows:
• GrpA: Includes REG1 (1) (VOUT1)
• GrpB: Includes REG2, REG3, and REG4
• GrpC: Includes REG5, REG6 (1), and REG7(1)
• GrpD: Includes REG8
• GrpE: This is a special group. It includes REG5 when GrpC/E power sequencing option#1 is chosen Turning on/off each group would cause all contained regulators to turn on/off. Notes 1. Only on 34704A

Analog Integrated Circuit Device Data

22 Freescale Semiconductor

FUNCTIONAL INTERNAL BLOCK DESCRIPTION REGUALATOR OVERVIEW WITH EFFICIENCY ANALYSIS REG1 (34704A Only) REG1 is a synchronous boost PWM voltage-mode control DC/DC regulator available only in the 34704A. Even though REG1 is a synchronous regulator, it is recommended to have a diode connected externally across its synchronous MOSFET. When the battery voltage is above REG1’s output (>5.0V) as the case might be when connected to the USB supply or wall adaptor, the REG1 power MOSFETs will be tri- stated and the voltage on the output will be Battery minus the diode drop. This will help maintain REG1’s output to a maximum of 5.2V and not allow it to drift all the way to 5.5V. The switcher will operate in DCM at very light loads to allow pulse skipping. On the 34704A, when the appropriate command is received from the processor to turn on VOUT1, then the isolation FET of REG1 would turn on gradually to avoid any inrush current out of VG and to ramp the VOUT1 voltage in a controlled manner. REG1 VOUT1 will be discharged every time GrpA is shutting down and it will be held low by the discharge FET as long as possible. Characteristics

• It powers up directly from the battery
• Operates at a switching frequency equals to F SW1
• Drives integrated low R DS(ON) N-channel power MOSFETs (NHV_HC) as its output stage
• It offers load disconnect from the input battery when the output is off (True Cutoff)
• The output is ±4% accuracy
• Output voltage is set to 5.0V by means of an internal resistor divider
• The output can be adjusted up or down at 2.5% for a total of 10% on each direction allowing Dynamic Voltage Scaling
• Uses a bootstrap network with an internal diode to power its synchronous MOSFET
• All gate drive circuits are s upplied from REG1’s own VG output.
• Uses integrated compensation
• The output is monitored for under-voltage and over- voltage conditions
• The output is monitored for over-current and short-circuit conditions
• The regulator is monitored for over-temperature conditions Operation Modes The VG output is always active as long as:
• The IC is not in an under-voltage lockout AND
• No shutdown signal through the ONOFF pin is present AND
• There is no ALLOFF shutdown command through the I 2C interface AND
• No faults exist that would cause the 34704 to shutdown The VOUT1 output will be active when:
• VG output is available AND
• There is no GrpA shutdown command through the I 2C interface AND
• No faults exist that would cause the VOUT1 to shut down REG2 This is a 4-switch synchronous buck-boost PWM voltage- mode control DC/DC regulator. See Power-Up Sequence on page 27 for more details on when REG2 is powered up in the sequence. The switcher will operate in DCM at very light loads to allow pulse skipping. VOUT2 will be discharged every time the regulator is shutting down and it will be held low by the discharge FET as long as possible. Characteristics
• It powers up directly from the battery
• Operates at a switching frequency equals to F SW1
• Drives integrated low R DS(ON) N-channel power MOSFETs (NHV_HC) as its output stage
• The output is ±2% accuracy
• Output voltage is adjustable by means of an external resistor divider
• The output can be adjusted up or down at 2.5% steps for a total of +17.5% to -20.0% on each direction allowing Dynamic Voltage Scaling
• Uses bootstrap networks with an internal diode to power its high side MOSFETs
• All gate drive circuits are supplied from VG
• Uses external compensation
• The output is monitored for under-voltage and over- voltage conditions
• The output is monitored for over-current and short-circuit conditions
• The regulator is monitored for over-temperature conditions Operation Modes The switcher will be active when:
• VG is in regulation AND
• There is no GrpB shutdown command through the I 2C interface AND
• No faults exist that would cause GrpB to shut down REG3 This is a synchronous buck PWM voltage-mode control DC/DC regulator. See Power-Up Sequence on page 27 for more details on when REG3 is powered up in the sequence.

Analog Integrated Circuit Device Data Freescale Semiconductor 23 34704 FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION The switcher will operate in DCM at very light loads to allow pulse skipping. VOUT3 will be discharged every time the regulator is shutting down and it will be held low by the discharge FET as long as possible. Characteristics

• It powers up directly from the battery
• Operates at a switching frequency equals to F SW1
• Drives integrated low R DS(ON) N-channel power MOSFETs (NHV_HC) as its output stage
• The output is ±4% accuracy
• Output voltage is adjustable by means of an external resistor divider
• The output can be adjusted up or down at 2.5% steps to achieve from +17.5% to -20.0% on each direction allowing Dynamic Voltage Scaling using the I2C DVS register.
• An extra fine voltage scaling in 0.5% steps helps to adjust down the output voltage as low as -XX%.
• Uses a bootstrap network with an internal diode to power its switch MOSFET
• All gate drive circuits are supplied from VG.
• Uses integrated compensation.
• The output is monitored for under-voltage and over- voltage conditions
• The output is monitored for over-current and short-circuit conditions
• The regulator is monitored for over-temperature conditions Operation Modes The switcher will be active when:
• VG is in regulation AND
• There is no GrpB shutdown command through the I 2C interface AND
• No faults exist that woul d cause GrpB to shut down REG4 This is a 4-switch synchronous buck-boost PWM voltage- mode control DC/DC regulator. See Power-Up Sequence on page 27 for more details on when REG4 is powered up in the sequence. The switcher will operate in DCM at very light loads to allow pulse skipping. VOUT4 will be discharged every time the regulator is shutting down and it will be held low by the discharge FET as long as possible. Characteristics
• It powers up directly from the battery
• Operates at a switching frequency equals to F SW1
• Drives integrated low R DS(ON) N-channel power MOSFETs (NHV_HC) as its output stage
• The output is ±2% accuracy
• Output voltage is adjustable by means of an external resistor divider
• The output can be adjusted up or down at 2.5% steps for a total of +17.5% to -20.0% on each direction allowing Dynamic Voltage Scaling.
• Uses bootstrap networks with an internal diode to power its high side MOSFETs
• All gate drive circuits are supplied from VG.
• Uses external compensation
• The output is monitored for under-voltage and over- voltage conditions
• The output is monitored for over-current and short-circuit conditions
• The regulator is monitored for over-temperature conditions Operation Modes The switcher will be active when:
• VG is in regulation AND
• There is no GrpB shutdown command through the I 2C interface AND
• No faults exist that would cause GrpB to shut down REG5 This is a 4-switch synchronous buck-boost PWM voltage- mode control DC/DC regulator. See Power-Up Sequence on page 27 on for more details on when REG5 is powered up in the sequence. The switcher will operate in DCM at very light loads to allow pulse skipping. VOUT5 will be discharged every time the regulator is shutting down and it will be held low by the discharge FET as long as possible. Characteristics
• It powers up directly from the battery
• Operates at a switching frequency equals to F SW1
• Drives integrated low R DS(ON) N-channel power MOSFETs (NHV_HC) as its output stage
• The output is ±2% accuracy
• Output voltage is adjustable by means of an external resistor divider
• The output can be adjusted up or down at 2.5% steps for a total of +17.5% to -20.0% on each direction allowing Dynamic Voltage Scaling.
• Uses bootstrap networks with an internal diodes to power its high side MOSFETs
• All gate drive circuits are supplied from VG.
• Uses external compensation
• The output is monitored for under-voltage and over- voltage conditions
• The output is monitored for over-current and short-circuit conditions
• The regulator is monitored for over-temperature conditions

Analog Integrated Circuit Device Data

24 Freescale Semiconductor

FUNCTIONAL INTERNAL BLOCK DESCRIPTION Operation Modes The switcher will be active when:

• VG is in regulation AND
• There is no GrpC (OR GrpE) shutdown command through the I2C interface AND
• No faults exist that would cause GrpC (OR GrpE) to shut down REG6 (Only 34704A) This is a synchronous boost PWM voltage-mode control DC/DC regulator. See Power-Up Sequence on page 27 for more details on when REG6 is powered up in the sequence. The switcher will operate in DCM at very light loads to allow pulse skipping. VOUT6 will be discharged every time the regulator is shutting down and it will be held low by the discharge FET as long as possible. Characteristics
• It powers up directly from the battery
• Operates at a switching frequency equals to F SW2
• Drives integrated low R DS(ON) N-channel power MOSFETs (NVHV_LC) as its output stage
• It offers load disconnect from the input battery when the output is off (True Cut-Off)
• The output is ±4% accuracy
• Output voltage is adjustable by means of an internal resistor divider
• The output can be adjusted up or down at 2.5% steps for a total of 10% on each direction allowing Dynamic Voltage Scaling
• Uses a bootstrap network with an internal diode to power its synchronous MOSFET
• All gate drive circuits are supplied from VG.
• Uses integrated compensation.
• The output is monitored for under-voltage and over- voltage conditions
• The output is monitored for over-current and short-circuit conditions
• The regulator is monitored for over-temperature conditions Operation Modes The switcher will be active when:
• VG is in regulation AND
• There is no GrpC shutdown command through the I 2C interface AND
• No faults exist that would cause GrpC to shut down REG7 (Only 34704A) This is a none-synchronous buck-boost inverting PWM voltage-mode control DC/DC regulator. See Power-Up Sequence on page 27 for more details on when REG7 is powered up in the sequence. The switcher will operate in DCM at very light loads to allow pulse skipping. VOUT7 will be discharged every time the regulator is shutting down and it will be held high to ground by the discharge FET as long as possible. Characteristics
• It powers up directly from the battery
• Operates at a switching frequency equals to F SW2
• Drives an external P-channel power MOSFET
• The output is ±2% accuracy
• Output voltage is adjustable by means of an external resistor divider
• The output can be adjusted up or down at 2.5% steps for a total of 10% on each direction allowing Dynamic Voltage Scaling.
• All gate drive circuits are supplied from V G
• Uses external compensation, the type is up to the designer
• The output is monitored for under-voltage and over- voltage conditions Operation Modes The switcher will be active when:
• VG is in regulation AND
• There is no GrpC shutdown command through the I 2C interface AND
• No faults exist that woul d cause GrpC to shut down REG8 This is a synchronous boost PWM voltage-mode control DC/DC regulator. See Power-Up Sequence on page 27 for more details on when REG8 is powered up in the sequence. VOUT8 will be discharged every time the regulator is shutting down and it will be held to ground by the discharge FET as long as possible. This regulator offers either voltage regulation for organic LEDs or current regulation for LCD backlighting LEDs. It provides either voltage or current feedback for these purposes through the same feedback pin. The regulator cannot drive only 1LED with a forward voltage drop of less than the battery input voltage. The processor would set the REG8 register through I2C before enabling REG8 to indicate if voltage regulation or current regulation will be used. Characteristics
• It powers up directly from the battery
• Operates at a switching frequency equals to F SW2
• Drives integrated low R DS(ON) N-channel power MOSFETs (NVHV_LC) as its output stage
• It offers load disconnect from the input battery when the output is off (True Cut-Off)
• The output is ±4% accuracy

Analog Integrated Circuit Device Data Freescale Semiconductor 25 34704 FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION

• Output voltage is adjustable by means of an external resistor divider when in voltage regulation mode
• A 240mV current limit compar ator will be used to program/ sense the voltage drop across the current setting resistor at the bottom of the LED string connected to the REG8 output when the current regulation mode is selected. This will be used to program the maximum current flowing and will regulate it
• The output can be adjusted up or down at 2.5% steps for a total of 10% on each direction allowing Dynamic Voltage Scaling
• Maximum output current is adjustable by means of an external resistor connected to the FB8 pin and then the output current can be scaled down from the set maximum in 16 steps through I 2C interface
• Uses a bootstrap network with an internal diode to power its synchronous MOSFET
• All gate drive circuits are supplied from VG.
• Uses integrated compensation
• The output is monitored for over-current and short-circuit conditions
• The regulator is monitored for over-temperature conditions
• The output is monitored for under-voltage and over- voltage conditions Operation Modes The switchers will be active when:
• VG is in regulation AND
• There is no GrpD shutdown command through the I 2C interface AND
• No faults exist that would cause GrpD to shut down

26 Freescale Semiconductor

Figure 5. Overall Efficiency Analysis

• MOSFET Conduction Losses
• MOSFET Switching Losses (E xcept for REG7 due to external MOSFET and board layout dependence)
• MOSFET Gate Charging Losses
• MOSFET Deadtime Losses
• External Diode Losses (Only for REG7)
• Inductor Winding DC Losses
• Inductor Core Losses (Assumed to be 20% of DC Losses as a rule of thumb)
• Output AC Losses Li-Ion Efficiency Analysis In this configuration, all of the regulators are supplied or powered directly with 3.6V nominal, battery voltage. Efficiency was calculated using the maximum allowed frequency of 1.5MHz and 1.0MHz for FSW1 and FSW2, respectively, in this configuration. As a result, the following numbers are valid for worst case operation conditions. The following table shows the detailed analysis for each regulator with V2 at 3.3V, V3 at 1.2V, and V4 at 1.8V. This is taken at the specified typical loads on Page15: 34704A overall system efficiency 84% 34704B overall system efficiency 89% VBAT V1 (5.0V) REG1 VBAT V2 (2.8 / 3.3V)REG2 VBAT V3 (1.2V / 1.5V / 1.8V)REG3 VBAT V4 (1.8V / 2.5V)REG4 VBAT V5 (3.3V) REG5 VBAT V6 (15V) REG6 VBAT V7 (-7.0V) REG7 VBAT V8 (15V) REG8 REG1 REG2 REG3 REG4 REG5 REG6 REG7 REG8 DCR(mΩ) 230 230 230 310 230 230 230 230 Cout (μF) 22 22 22 22 22 22 22 22 Fsw (kHz) 1500 1500 1500 1500 1500 1000 1000 1000 Overall System Pout (W) 3.340 Ploss On Chip (W) 0.369 Ploss Total (W) 0.41 Pin (W) 3.75 n (%) 84.00% Overall System Pout (W) 1.74 Ploss On Chip (W) 0.192 Ploss Total (W) 0.202 Pin (W) 1.942 n (%) 89.6%

Analog Integrated Circuit Device Data Freescale Semiconductor 27 34704 FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES POWER-UP SEQUENCE Following is the power up sequence from a battery connection or a Power On signal through the ONOFF pin. 1. Battery initially connected to VIN. 2. LION pin is used to determine if a battery is being used (High for Li-Ion battery). 3. At initial power up from a cold start like the above with the battery first connected, the status of the ONOFF pin is ignored and 34704A moves forward to step (5). 4. After the cold start or battery insertion power up, activity on the ONOFF pin is used to determine if the device is enabled or disabled. If the device is disabled, then nothing happens. If the device is enabled then, 34704 moves forward to step (5). 5. The input battery UVLO signal de-asserts if the input voltage is above the UVLO rising threshold. 6. REG1 VG starts up in peak detect PFM and REG1 VG output starts rising. 7. V DDI output voltage will start tracking REG1 VG output. 8. When REG1 VG output rises high enough such that VDDI voltage is in regulation a POR signal is released and all internal circuitry can be enabled. I2C communication will remain disabled for normal power up sequence. The values of the FREQ and SS pins are read at this point. 9. REG1 PWM control loop can take over control of REG1 output once the VG voltage reaches a certain threshold set internally. 10. When REG1 is in regulation, it will be used to supply the Power MOSFET gate voltage for all of the other regulators except REG7. 11. REG3 is enabled, then when REG3 is in regulation. 12. REG2 is enabled, then when REG2 is in regulation. 13. REG4 is enabled, then when REG4 is in regulation. 14. I 2C communication is enabled now since the processor supplies are up. 15. 34704A will de-assert the RST signal to indicate a “Power Good” after 10ms of wait time. This output will be connected to the reset pin of the microprocessor. 16. The microprocessor then takes over and can enable REG1 VOUT1 and REG5 through REG8. The processor needs to send a command for REG8 mode of operation. The processor can also change REG5-8 soft start time before enabling them. The processor can also power down the system with an ALLOFF command. For power sequencing needs, the different regulators are grouped based on their function and how they relate to each other and the entire system. This makes power sequencing control a much easier task for the user where most of the group internal sequencing in now handled by the PMIC. All the processor has to do is to command the group and not each regulator. The regulators groups are as follows:

• GrpA: Includes REG1 (VOUT1)
• GrpB: Includes REG2, REG3, and REG4
• GrpC: Includes REG5, REG6, and REG7
• GrpD: Includes REG8
• GrpE: This is a special group. It includes REG5 when GrpC/E power sequencing option#1 is chosen SHUTDOWN SEQUENCES
• Processor can disable VOUT1 (GrpA) at any point it desires
• Processor can disable REG8 (Grp D) at any point it desires
• Processor can disable REG5 (GrpE) at any point it desires ONLY IF CCD sequencing option#1 is picked
• Processor can shutdown GrpC according to the CCD power sequencing options 1, 2, 3, or 4 (see section “I2C Programmability”)
• If any regulator in GrpC is shutting down due to a fault, the other regulators in GrpC will also shutdown by following the CCD power sequencing options 1, 2, 3, or 4 (see section “I 2C Programmability”)
• If any regulator in GrpB is shutting down due to a fault, the other regulators in GrpB will also shutdown by following the processor supplies shutdown sequence. Then, GrpA, GrpC, GrpD, and GrpE (if applicable) will simultaneously shutdown keeping any sequencing within each group as necessary. VG will stay alive to perform a power up retry for GrpB but only for one time. If the power up cycle is successful, then normal operation is back. If the fault returns, then the shutdown sequence is repeated and then VG shuts down
• Processor can shutdown the 34704 by sending an “ALLOFF” command, then GrpA, GrpC, GrpD, and GrpE (if applicable) will simultaneously shutdown keeping any sequencing within each group as necessary. Then, GrpB will shutdown according to the processor supply shutdown sequence. Then, VG will shut down.
• The previous shutdown event can also happen through the ONOFF pin by pressing and holding the pin for a time period (programmable through I2C with a default of 1sec)
• During battery depletion and when the input voltage passes the UVLO falling threshold, all of the outputs will be disabled without honouring the power down sequence This is to guarantee that the outputs are off and battery is not depleted further.

Analog Integrated Circuit Device Data

28 Freescale Semiconductor

FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES

• In any of the previous shutdown sequences, VG output will stay alive to maintain internal circuitry and logic until all other regulators are off, then it will shut off. POWER SUPPLY The battery voltage range is the following depending on the application:
• 1-cell Li-Ion/Polymer: 2.7V to 4.2V. Typ value is 3.6V
• USB supply or AC wall adapter: 4.5V to 5.5V. Typ value is 5.0V. This gives a total input voltage supply range of 2.7V to 5.5V For the regulators, each one will be supplied separately through its own power input. LION PIN LION pin is always tied to VIN level. FREQUENCY SETTING PIN (FREQ PIN) There are two switching frequencies on board the 34704, one for REG6, 7 & 8, and the other for the rest of the regulators. To avoid any jitter or interference problems by having two oscillators on board, the switching frequency will be derived from the main oscillator using a frequency divider. The switching frequency will be selectable for all of the regulators. REG6, 7 & 8 switching frequency (FSW2) will be selectable through I2C to be between 250 kHz and 1.0 MHz in 250 kHz steps. The rest of the regulators switching frequency (FSW1) will be selectable through the FREQ pin and can be selected between 750 kHz and 2.0 MHz, in 250 kHz steps. FSW1 default value is 2.0MHz. This value is obtained by tying the FREQ pin to VDDI. FSW2 default value is 500 kHz FSW1 will be selectable through programming the FREQ pin with an external resistor divider connected between VDDI and AGND pins. FSW2 will only be selectable through I2C. Please refer to the “I2C Programmability” section. The 34704 uses 4 different phases of switching (clock is 80 degrees out of phase) for FSW1 to spread out the current draw by the individual converters from the input supply over time to reduce the peak input current demand. This allows for better EMI performance and reduction in the input filter requirements. F SW1 has no phase relation with FSW2. The following distribution is shown for FSW1 of 2.0MHz. The regulators grouping is based on their maximum current draw and attempts to reduce the effect on the input current draw. SOFT START PIN (SS PIN) Initially at power up, the soft start time will be set for all of the regulators through programming the SS pin with an external resistor divider connected between VDDI and AGND pins (see the 34704A Typical Application Diagram). After power up, the soft start value for REG5 through REG8 can be changed and programmed through I2C. REG2 through REG4 soft start value is only set by the SS pin and cannot be programmed through I2C. See section “I2C Programmability” for more details. ONOFF PIN This is a hardware enable/disable feature OR pin for the 34704:
• It can be connected to a mechanical switch to turn the power On or Off
• The device is power off by a command via the I2C interface as well
• The power off by hardware can be masked by a command via the I2C interface
• If the device is off and a falling edge is detected at the ONOFF pin, the device starts up
• If and only if the device is on and the ONOFF pin is pulled down for a time period (1s as a default and selectable to 2.0sec, 1.5sec, 1.0sec or 0.5sec via the I2C interface), then the device powers off after a second time period elapses unless it is masked by a command via the I interface:
• The second period is the same amount of time as the first period so that the counter can be shared
• When the first period elapses a shutdown flag is set to alert the processor that a shutdown signal has been activated. The ONOFF pin can be released after this flag is set without affecting what will happen next
• A CPU can read out the shutdown flag to determine what to do
• Power off the device immediately by a command via I2C interface (ALLOFF command)
• Ignore the power off by sending a command via I 2C interface to clear the shutdown flag
• Do nothing until the second time period expires and let the device power off by itself The ONOFF pin is edge sensitive and activates on a falling edge. It is normally pulled high. 500ns 500ns 500ns 500ns REG1/VG REG1/VG REG1/VG REG1/VG REG2 REG2 REG2 REG2 REG5, REG3 REG5, REG3 REG5, REG3 REG4 REG4 REG4

Figure 6. Hardware Power Up/Down Timing There is a thermal sensor for each regulator except REG7.

• A soft over-current limit (ove r-current limit): If the peak current reaches the typical over-current limit, the switcher will start a cycle-by-cycle operation to limit the current and a 10ms current limit timer starts. The switcher will stay in this mode of operation until one of the following occurs:
• The current is reduced back to the normal level inside the 10ms timer and in this case normal operation is gained back
• The output reaches the thermal shutdown limit and turns off
• The current limit timer expires without gaining normal operation at which point the output turns off. Then only for GrpB, at the end of a timeout period of 10ms, the output will attempt to restart again but for one time only.
• The output current keeps increasing until it reaches the second over-current limit, see below for more details
• A hard over-current limit (short circuit limit) that is higher than the cycle by cycle limit at which the device reacts by shutting down the output immediately. This is necessary to prevent damage in case of a short-circuit. After that, only GrpB will attempt a one time retry after a timeout period of 10ms and will go through a new soft start cycle OUTPUT OVER-VOLTAGE/UNDER-VOLTAGE MONITORING In the case of an output over-voltage/under-voltage, the user has two options that can be programmed through the I2C interface: Response A: The output will switch off automatically and the 34704 would alert the processor through I2C that such an event happened. Response B: The output will not switch off. Rather the 34704 communicates to the processor that an over-voltage/ under-voltage condition has occurred and wait for the processor decision to either shutoff or not, in the mean time the control loop will try to fix itself. To avoid erroneous conditions, a 20μs filter will be implemented. The OV/UV fault flag is masked during DVS until DVSSTAT flag is asserted “Done”. To keep the RST output low during ramp up and until the soft start is done, the OV/UV protection is masked from reporting that the output is in regulation. During this time, the processor can abort the shutdown process or shutdown immediately before the 2nd period elapses with an I2C command 1st Period 2 nd Period Programmable Shutdown Delay 1st Period Programmable Shutdown Delay 2st Period Shutdown Flag Asserted Shutdown if No Processor Communication Turn On ON/OFF Pin can be released during this period without affecting the device response process

Analog Integrated Circuit Device Data

30 Freescale Semiconductor

FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS LOGIC COMMANDS AND REGISTERS I2C USER INTERFACE The 34704 communicates via I2C using a default device address $54 to access all user registers and program all regulators features independently. USER PROGRAMMABLE REGISTERS GrpC/E power sequencing setting (34704A Only) The microprocessor can choose one of several voltage sequence options for the GrpC/E supply (REG5), high voltage supply (REG6), and negative voltage supply (REG7). For 3 of the sequencing options, REG5 supply is controlled and tied with REG6 and REG7 in a preset power sequence. For one sequencing option, only REG6 and REG7 are involved in the power sequence and REG5 is independent. 34704A assigns a 2-bit register to program the GrpC/E power sequencing options (CCDSEQ Register). This register value is latched in at GrpC power up and will not be allowed to change unless a power recycle happens. Switching frequency for REG6, 7 & 8 FSW2 can be selected to be between 250kHz and 1.0MHz in 250kHz steps. On the 34704B, FSW2 is just for REG8 since REG6 and 7 do not exist in this device. 34704 assigns a 2-bit register to program FSW2 (FSW2 Register) Shutdown Hold (Delay) Time The 34704 assigns a 2-bit register (SDDELAY Register) for the processor to program the shutdown delay time period Please refer to the /ONOFF pin description for more details Programming 34704 response to under-voltage/over- voltage conditions on each regulator There are two responses that can be programmed for an over-voltage/under-voltage condition: Response A: When an over-voltage (under-voltage) event is detected, the concerned output shuts down and a register is flagged to alert the processor. Response B: When an over-voltage/under-voltage event is detected, the concerned output will not shutdown, but the register is flagged to alert the processor. Then, the processor can decide whether to shutdown the output or not. In the mean time, the concerned output control loop will be attempting to correct the error. See Output Over-voltage/Under-voltage Monitoring on page 29 for more details. Response A and Response B share the same flag register 34704 assigns a 1-bit register for this function (OVUVSETx Register) where x corresponds to each regulator OPTION MSB LSB GRPC/E ENABLED GRPC/E DISABLED (Default) 0 0 REG5 is independently controlled REG6 and REG7 ramp up together. REG5 is independently controlled REG6 and REG7 ramp down together 2 0 1 REG5 ramps up first Then REG6 and REG7 ramp up together REG5, REG6 and REG7 ramp down together 3 1 0 REG5, REG6, and REG7 ramp up together REG5, REG6, and REG7 ramp down together 4 1 1 REG5 and REG6 ramp up together first. Then ramp up REG7 REG7 ramps down first. Then REG5 and REG6 ramp down together FSW2 MSB LSB 500kHz (Default) 0 0 250kHz 0 1 750kHz 1 0 1000kHz 1 1 Shutdown Delay MSB LSB 1.0sec (Default) 0 0 0.5sec 0 1 1.5sec 1 0 2.0sec 1 1

Analog Integrated Circuit Device Data Freescale Semiconductor 31 34704 FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Dynamic Voltage Scaling for each regulator The customer can adjust each regulator’s output dynamically with 2.5% step size. The total range of adjustability will vary depending on each regulator to accommodate different operating environments. Some regulators will utilize the full range of -20.00% to +17.50% and some regulators will only use the range of ±10.00%. For details, see each regulator’s section. Each 2.5% step takes 50μs before moving to the next step. REG8 only performs DVS when in voltage regulation mode. During DVS, the Over-voltage and Under-voltage monitoring will not be active. In addition to that, these faults will be masked and not active for a DVS settling time period equal to 1ms. This DVS settling time will start after the DVSSTAT register is flagged indicating that the DVS cycle is done. This is to ensure that during DVS and soft start alike the output will not be tripped due to a momentary over- voltage or under-voltage fault. This is the same for Response A and Response B of the over-voltage/under-voltage fault monitoring. 34704 assigns a 4-bit register to program the Dynamic Voltage Scaling for each regulator (DVSSETx Register) where x corresponds to each regulator. On/Off Control for each group of regulators as defined previously and for the whole IC 34704 assigns a 1-bit register for each group to turn each group on/off (ONOFFA, C, D, or E register). Please note that GrpB does not have a dedicated enable register which is enabled by default. Also, 34704 assigns a 1-bit register for disabling the whole IC through the I2C. (ALLOFF register) Soft Start Time There are two registers for setting the soft start value for all of the regulators except REG1. The SSTIME register reads the soft start value set by the SS pin and is used to initially set the soft start value for all of the regulators except REG1. Then, the SSSET registers for REG5 through REG8 can be used to change the soft start value for these regulators from the value set by the SSTIME register. Here is how the SSTIME register interacts with the SSSETx register: 1. SSTIME register is set by a value read through the SS pin. 2. SSTIME register is copied into the registers SSSET5, SSSET6, SSSET7, and SSSET8. 3. The soft start time of REG2, REG3, and REG4 are only affected by the value of SSTIME register. 4. The soft start time of REG5, REG6, REG7, and REG8 are affected by the value of registers SSSET5, SSSET6, SSSET7, and SSSET8 respectively. 34704 assigns a 2-bit register to store the value programmed by the SS pin. The register is called SSTIME And can only be read by the user. 34704 assigns a 2-bit register for REG5 through REG8 to program the soft start times for these regulators (SSSETx register) where x corresponds to each regulator from REG5 through REG8. OV/UV Response bit A (Default) 0 B 1 Percentage Change MSB LSB 0.00% (Default) 0 0 0 0 +2.50% 0 0 0 1 +5.00% 0 0 1 0 +7.50% 0 0 1 1 +10.00% 0 1 0 0 +12.50% 0 1 0 1 +15.00% 0 1 1 0 +17.50% 0 1 1 1 -20.00% 1 0 0 0 -17.50% 1 0 0 1 -15.00% 1 0 1 0 -12.50% 1 0 1 1 -10.00% 1 1 0 0 -7.50% 1 1 0 1 -5.00% 1 1 1 0 -2.50% 1 1 1 1 GrpA, C, D, or E ONOFF bit OFF (Default) 0 ON 1 ALL OFF bit False (Default) 0 True 1 Soft Start MSB LSB 0.5ms 0 0 2ms 0 1 8ms 1 0 32ms 1 1

Analog Integrated Circuit Device Data

32 Freescale Semiconductor

FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS REG8 Regulation Mode The 34704 assigns a 1-bit register to indicate REG8’s regulation mode (REG8MODE Register). The processor assigns this register to either regulation mode before enabling the REG8 output. When REG8 is current regulated, LED backlight current can be reduced from the maximum in 16 steps through the I2C interface The maximum LED current can be set using the external resistor at the bottom of the LED string, then through I2C programming, this current value can be reduced in 16 steps. 34704 assigns a 4-bit register for this function (ILED register) The ILED setting is not a guaranteed characteristic from IMAX* (1/16) to IMAX* (9/16), due to an error amp common mode limitation. USER ACCESSIBLE FLAG REGISTERS Cold Start Flag The 34704 assigns a 1-bit register (COLDF Register) to flag the processor that the power up was a result of battery insertion and not through ONOFF pin. This flag should be cleared after power up by the processor. Shutdown Flag The 34704 assigns a 1-bit register (SHUTDOWN Register) to flag the processor if a shutdown signal is received through the ONOFF pin and a programmable time period with a default of 1sec has elapsed. Dynamic Voltage Scaling Status Flag In addition and for each regulator, 34704 assigns a 1-bit register (DVSSTATx register) to flag to the processor that the desired output voltage level set with the (DVSSETx register) has been reached. USER ACCESSIBLE FAULT REGISTERS Over-current Fault Register The 34704 assigns a 1-bit register for each regulator (ILIMFx Register) to indicate a fault due to over-current limit, where x corresponds to each regulator from REG1 to REG8, except REG7 Short-circuit Fault Register The 34704 assigns a 1-bit register for each regulator (SCFx Register) to indicate a fault due to short-circuit current limit, where x corresponds to each regulator from REG1 to REG8, except REG7 Soft Start MSB LSB 0.5ms 0 0 2ms 0 1 8ms 1 0 32ms 1 1 REG8 Regulation bit Current (Default) 0 Voltage 1 LED Current MSB LSB IMAX * (1/16) 0 0 0 0 IMAX * (2/16) 0 0 0 1 IMAX * (3/16) 0 0 1 0 IMAX * (4/16) 0 0 1 1 IMAX * (5/16) 0 1 0 0 IMAX * (6/16) 0 1 0 1 IMAX * (7/16) 0 1 1 0 IMAX * (8/16) 0 1 1 1 IMAX * (9/16) 1 0 0 0 IMAX * (10/16) 1 0 0 1 IMAX * (11/16) 1 0 1 0 IMAX * (12/16) 1 0 1 1 IMAX * (13/16) 1 1 0 0 IMAX * (14/16) 1 1 0 1 IMAX * (15/16) 1 1 1 0 IMAX (Default) 1 1 1 1 Cold Start Flag bit /ONOFF (Default) 0 Battery Insertion 1 /ONOFF Status bit Normal (Default) 0 Shutdown 1 DVS STATUS bit DVS Not Done 0 DVS Done 1 ILIMF bit False 0 True 1

Analog Integrated Circuit Device Data Freescale Semiconductor 33 34704 FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Over-voltage Fault Register The 34704 assigns a 1-bit register for each regulator (OVFx Register) to indicate a fault due to over-voltage limit, where x corresponds to each regulator from REG1 to REG8 Under-voltage Fault Register The 34704 assigns a 1-bit register for each regulator (UVFx Register) to indicate a fault due to under-voltage limit, where x corresponds to each regulator from REG1 to REG8. Thermal Shutdown Fault Register The 34704 assigns a 1-bit register for each regulator (TSDFx Register) to indicate a fault due to thermal limit, where x corresponds to each regulator from REG1 to REG8, except REG7 Regulator Fault Register The 34704 assigns a 1-bit register for each regulator (FAULTx Register) to indicate that a fault had occurred on each regulator. The processor can just access this register periodically to determine system status. This reduces the access cycles. If a regulator fault register asserted, then the processor can access that regulator’s registers to see what kind of fault had occurred. SPECIAL REGISTERS REG3 Fine Voltage Scaling Register Regulator 3 has an additional fine output voltage scaling that enables to lower the output voltage in 0.5% steps. The 34704 assigns an 8-bit register (REG3DAC) to the REG3 Digital to analog converter for the FB3 voltage generation. Output votlage must be reduced gradually to avoid a OV/UV fault to occur. REG7 Independent ON/OFF Control (Only on 34704A) The 34704B provide two register to independently turn on REG7 when REG6 is not needed. Care must be taken when turning on REG7 to avoid inrush currents during regulator ramp-up. Following Process must be followed to assure successful turn on of REG7. 1. Set EN0 and clear DISCHR_B on REG7CR0 register 2. After 1ms or more, set EN1 on REG7CR0 register 3. Set REG7DAC register to $00 4. Gradually shift up REG7DAC register from $00 to $D9 to ramp-up the output voltage in a soft-start like wave. Soft start timing is dependant of I2C communication speed and number of bit you change per writing, for instance use 4,8 or 16 bits increase to ramp up the output voltage. SCF bit False 0 True 1 OVF bit False 0 True 1 UVF bit False 0 True 1 TSDF bit False 0 True 1 FAULT bit False 0 True 1 Register Address Code 1 $58 $50 2 $58 $D0 3 $59 $00 4 $59 $04 5 $59 $08 6 $59 $0C 55 $59 $D9 REG7 independent start up example

Analog Integrated Circuit Device Data

34 Freescale Semiconductor

FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS I2C REGISTER DISTRIBUTION Each regulator has a fault register that records any fault that occurs in that regulator. Then there is a regulator fault reporting register that the processor can access at all times to see if any fault had occurred. There are also the IC general use registers. Those registers are also split between status reporting registers and processor programmable registers. This distribution keeps each regulator’s registers bundled together which makes it easier for the user to access one regulator at a time. Addr Name D7 D6 D5 D4 D3 D2 D1 D0 $00 Reserved - $01 GENERAL1 - SDDELAY[1:0] CCDSEQ[1:0] $02 GENERAL2 - ALLOFF ONOFFA ONOFFC ONOFFD ONOFFE $03 GENERAL3 - SHTD COLDF BATTYPE SSTIME[1:0] $04 VGSET1 - DVSSET1[3:0] OVUVSET1 $05 VGSET2 - TSDF1 SCF1 ILIMF1 UV F1 OVF1 DVSSTAT1 $06 REG2SET1 - DVSSET2[3:0] OVUVSET2 $07 REG2SET2 - TSDF2 SCF2 ILIMF2 UV F2 OVF2 DVSSTAT2 $08 REG3SET1 - DVSSET3[3:0] OVUVSET3 $09 REG3SET2 - TSDF3 SCF3 ILIMF3 UV F3 OVF3 DVSSTAT3 $0A REG4SET1 - DVSSET4[3:0] OVUVSET4 $0B REG4SET2 - TSDF4 SCF4 ILIMF4 UV F4 OVF4 DVSSTAT4 $0C REG5SET1 - DVSSET5[3:0] OVUVSET5 $0D REG5SET2 - SSSET5[1:0] $0E REG5SET3 - TSDF5 SCF5 ILIMF5 UV F5 OVF5 DVSSTAT5 $0F REG6SET1 - DVSSET6[3:0] OVUVSET6 $10 REG6SET2 - SSSET6[1:0] $11 REG6SET3 - TSDF6 SCF6 ILIMF6 UV F6 OVF6 DVSSTAT6 $12 REG7SET1 - DVSSET7[3:0] OVUVSET7 $13 REG7SET2 - FSW2[1:0] SSSET7[1:0] $14 REG7SET3 - UVF7 OVF7 DVSSTAT7 $15 REG8SET1 - DVSSET8[3:0] OVUVSET8 $16 REG8SET2 - ILED[3:0] REG8MODE SSSET8[1:0] $17 REG8SET3 - TSDF8 SCF8 ILIMF8 UV F8 OVF8 DVSSTAT8 $18 FAULTS FLT8 FLT7 FLT6 FLT5 FLT4 FLT3 FLT2 FLT1 $19 I2CSET1 - ACCURATE $49 REG3DAC 3DAC7 3DAC6 3DAC5 3DAC4 3DAC3 3DAC2 3DAC1 3DAC0 $58 REG7CR0 EN[1:0] - DISCHG_B - $59 REG7DAC 7DAC7 7DAC6 7DAC5 7DAC4 7DAC3 7DAC2 7DAC1 7DAC0 34704A Register Distribution Map

Analog Integrated Circuit Device Data Freescale Semiconductor 35 34704 FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Addr Name D7 D6 D5 D4 D3 D2 D1 D0 $00 Reserved - $01 GENERAL1 - SDDELAY[1:0] - $02 GENERAL2 - ALLOFF - - ONOFFD ONOFFE $03 GENERAL3 - SHTD COLDF BATTYPE SSTIME[1:0] $04 Reserved - $05 VGSET2 - - - - UVF1 OVF1 - $06 REG2SET1 - DVSSET2[3:0] OVUVSET2 $07 REG2SET2 - TSDF2 SCF2 ILIMF2 UV F2 OVF2 DVSSTAT2 $08 REG3SET1 - DVSSET3[3:0] OVUVSET3 $09 REG3SET2 - TSDF3 SCF3 ILIMF3 UV F3 OVF3 DVSSTAT3 $0A REG4SET1 - DVSSET4[3:0] OVUVSET4 $0B REG4SET2 - TSDF4 SCF4 ILIMF4 UV F4 OVF4 DVSSTAT4 $0C REG5SET1 - DVSSET5[3:0] OVUVSET5 $0D REG5SET2 - SSSET5[1:0] $0E REG5SET3 - TSDF5 SCF5 ILIMF5 UV F5 OVF5 DVSSTAT5 $0F- $12 Reserved - $13 FSW2SET - FSW2[1:2] - $14 Reserved - $15 REG8SET1 - DVSSET8[3:0] OVUVSET8 $16 REG8SET2 - ILED[3:0] REG8MODE SSSET8[1:0] $17 REG8SET3 - TSDF8 SCF8 ILIMF8 UV F8 OVF8 DVSSTAT8 $18 FAULTS FLT8 - - FLT5 FLT4 FL T3 FLT2 FLT1 $19 I2CSET1 - ACCURATE $49 REG3DAC DAC7 DAC6 DAC5 DAC4 DAC3 DAC2 DAC1 DAC0 $58 REG7CR0 EN[1:0] - DISCHG_B - $59 REG7DAC 7DAC7 7DAC6 7DAC5 7DAC4 7DAC3 7DAC2 7DAC1 7DAC0 34704B Register Distribution Map

Analog Integrated Circuit Device Data

36 Freescale Semiconductor

FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION COMPONENT CALCULATION FSW1 AND GENERAL SOFT START CONFIGURATION The 34704 uses FSW1 as the switching frequency for REG1(VG) thru REG5, and this can be changed by applying a voltage between 0 to 2.5V to the FREQ pin. If the FREQ pin is left unconnected, the 34704 starts up with a default frequency of 750KHz. To configure the FSW1, use a 2 resistors voltage divider from VDDI to ground to set the voltage on the FREQ pin as indicated bellow: 1. If an external voltage is used, F SW1 can only be set during device startup. Initially at power up, the soft start time will be set for all of the regulators through programming the SS pin with an external resistor divider connected between VDDI and AGND as follows: REGULATORS POWER STAGE AND COMPENSATION CALCULATION Regulator 1 and 6 (Synchronous Boost - internally compensated - REG1 is VG supply). REG1 is a Synchronous Boost converter set to 5V and Maximum current of 500mA while REG6 is set to 15V at 60ma(on the 34704B, REG1 does not exist but similar circuitry is used to provide the internal VG voltage). They do not need an external compensation network, thus, the only components that need to be calculated are:

• L: A boost power stage can be designed to operate in CCM for load currents above a certain level usually 5 to 15% of full load. The minimum value of inductor to maintain CCM can be determined by using the following procedure: 1. Define I OB as the minimum current to maintain CCM as 15% of full load. 2. However the worst case condition for the boost power stage is when the input voltage is equal to one half of the output voltage, which results in the Maximum ΔIL, then: Note: On the 34704B Use the recommended 3.0uH inductor rated between 50 to 100mA in order to have this regulator working in DCM. Rising the inductor value will make the regulator to begin working in CCM.
• COUT: The three elements of output capacitor that contribute to its impedance and output voltage ripple are the ESR, the ESL and the capacitance C. The minimum capacitor value is approximately:
• W h e r e ΔVOr is the desired output voltage ripple. Ratio FSW1 [KHz] 0 750 9/32 1000 13/32 1250 17/32 1500 21/32 1750 VDDI 2000 Ratio Soft Start timing [ms] 0 0.5 11/32 2.0 19/32 8.0 VDDI 32.0 IDD max = 100μΑ VDDI GND FREQ RF1 RF2 VFREQ VDDI RF2 ⎛⎞= VFREQ RF1, RF2 tolerance ±1.0% VDDI GND SS RSS1 RSS2 VSS VDDI RSS2 ⎛⎞= VSS RSS1, RSS2 tolerance ±1.0% Lmin Vo D() 1D–() 2T 2IOB Lmin Vo T() 16IOB COUT Iomax Dmax Fsw ΔVor

Analog Integrated Circuit Device Data Freescale Semiconductor 37 34704 FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION

• Now calculate the maximum allowed ESR to reach the desired ΔVOr.
• 1CVG: Use a 47uF capacitor from Ground to VG.
• D1: Use a fast recovery schottky diode rated to 10V at 1A. Regulator 2, 4 and 5 (Synchronous Buck-Boost regulator with external compensation) These three regulators are 4-Switch synchronous buck-boost voltage mode control DC-DC regulator that can operate at various output voltage levels. Since each of the regulators may work as a buck or a boost depending on the operating voltages, they need to be compensated in different ways for each situation. Since the 34704 is meant to work using a LiIon battery, the operating input voltage range is set from 2.7 - 4.2 V, then the following scenarios are possible:
• NOTE: Since these 3 regulators can work as a buck or a boost in a single application, a good practice to configure these regulators is to compensate for a boost scenario and then verify that the regulator is working in buck mode using that same compensation. Compensating for Buck operation:
• L: A buck power stage can be designed to operate in CCM for load currents above a certain level usually 5 to 15% of full load. The minimum value of inductor to maintain CCM can be determined by using the following procedure: 1. Define I OB as the minimum current to maintain CCM as 15% of full load.
• COUT: The three elements of output capacitor that contribute to its impedance and output voltage ripple are the ESR, the ESL and the capacitance C. A good approach to calculate the minimum real capacitance needed is to include the transient response analysis to control the maximum overshoot as desired. 1. First calculate the dt_I (inductor current rising time) given by: Where the parameter ΔIo_step is the maximum current step during the current rising time and is define as: 2. Then the output capacitor can be chosen as follow:
• W h e r e ΔVOmax is the maximum allowed transient overshoot expressed as a percentage of the output voltage, typically from 3 to 5% of Vo. 3. Finally find the maximum allowed ESR to allow the desired transient response: NOTE: Do not use the parameters ΔVOr and ΔVOmax indistinctly, the first one indicates the output voltage ripple, while the second one is the maximum output voltage overshoot (transient response).
• R1 and RB: These two resistors help to set the output voltage to the desire value using a Vref=0.6V, select R1 between 10k and 100K and then calculate RB as follows:
• Compensation network. (C1,C2,C3, R2, R3): For compensating a buck converter, 3 important frequencies referring to the plant are: Regulator Vo Input voltage range Operation 2 2.8 V 3.0 - 4.2 Buck 3.3 V 2.7 - 3.0 Boost 3.3 V 3.5 - 4.2 Buck 4 1.8 V 2.7 - 4.2 Buck 2.5 V 2.7 - 4.2 Buck 5 3.3 V 2.7 - 3.0 Boost 3.3 V 3.5 - 4.2 Buck ESR ΔVor Iomax Lmin Vo( Iomax+R DSONLSFET RL+() D′min )T 2IOB 2IOB [H] dtI Iomax T ΔIostep Dmax ⎛⎞ Vin min Vo– ⎛⎞= [A] COUT Iomax dtI ΔVomax ESR max ΔVor Fsw() L() RB R1 Vo

Analog Integrated Circuit Device Data

38 Freescale Semiconductor

FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION 1. Output LC filter cutoff frequency (F LC): 2. Cutoff frequency due to capacitor ESR: 3. Crossover frequency (or bandwidth): The Type 3 external compensation network will be in charge of canceling some of these poles and zeros to achieve stability in the system. The following poles and zeroes frequencies are provided by the type 3 compensation. The passive components associated to these frequencies are calculated with the following formulas. On the 34704 VRAMP is half of 1.2V since each operation mode spends only half the ramp. FLC LCOUT2π FESR FBW FSW [Hz] FPO FBW=F Z1 0.9FLC=F 22 1.1FLC= FP1 FESR=F 2P FSW Vin min VRAMP D′min ⎛⎞ 1 ⎛⎞= C2 1 ⎛⎞= R2 1 ⎛⎞= R3 1 ⎛⎞= C3 1 ⎛⎞=

Analog Integrated Circuit Device Data Freescale Semiconductor 39 34704 FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION Compensating for boost operation:

• L: A boost power stage can be designed to operate in CCM for load currents above a certain level usually 5 to 15% of full load. The minimum value of inductor to maintain CCM can be determined by using the following procedure: 1. Define I OB as the minimum current to maintain CCM as 15% of full load: However the worst case condition for the boost power stage is when the input voltage is equal to one half of the output voltage, which results in the Maximum ΔIL, then:
• COUT: The three elements of output capacitor that contribute to its impedance and output voltage ripple are the ESR, the ESL and the capacitance C. The minimum capacitor value is approximately:
• W h e r e ΔVOr is the desired output voltage ripple.
• Now calculate the maximum allowed ESR to reach the desired ΔVOr:
• R1 and RB: These two resistors help to set the output voltage to the desire value using a Vref=0.6V, select R1 between 10k and 100K and then calculate RB as follows:
• Compensation network. (C1,C2,C3, R2, R3) For compensating a buck converter, 4 important frequencies referring to the plant are: 1. Output LC filter cutoff frequency (F LC):
• W h e r e D ’min is the minimum off time percentage given by: 2. Cutoff frequency due to capacitor ESR: 3. The right plane zero frequency: 4. Crossover frequency (or ba ndwidth): select this frequency as far away form the RHPZ as much as possible: The Type 3 external compensation network will be in charge of canceling some of these poles and zeros to achieve stability in the system. The following poles and zeroes frequencies are provided by the type 3 compensation: Lmin Vo D() 1D–() 2T 2IOB [H] Lmin Vo T() 16IOB COUT Iomax Dmax Fsw ΔVor ESR ΔVor Iomax [Ω] RB R1 Vo VREF FLC D′min LCOUT2π D′min Vin min Vout max FESR RHP Z D′min() 2RLOAD [Hz] FBW RHP Z FPO FBW=F Z1 0.9FLC=F 22 1.1FLC= FP1 FESR=F 2P FSW

Analog Integrated Circuit Device Data

40 Freescale Semiconductor

FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION The passive components associated to these frequencies are calculated with the following formulas On the 34704 VRAMP is half of 1.2V since each operation mode spends only half the ramp. Regulator 3 (Synchronous Buck - internally compensated)

• L: A buck power stage can be designed to operate in CCM for load currents above a certain level usually 5 to 15% of full load. The minimum value of inductor to maintain CCM can be determined by using the following procedure: 1. Define I OB as the minimum current to maintain CCM as 15% of full load.
• COUT: The three elements of output capacitor that contribute to its impedance and output voltage ripple are the ESR, the ESL and the capacitance C. A good approach to calculate the minimum real capacitance needed is to include the transient response analysis to control the maximum overshoot as desired.
• First calculate the dt_I (inductor current rising time) given by: Where the parameter ΔIO_step is the maximum current step during the current rising time and is define as:
• Then the output capacitor can be chosen as follow: Where ΔVOmax is the maximum allowed transient overshoot expressed as a percentage of the output voltage, typically from 3 to 5% of Vo.
• Finally find the maximum allowed ESR to allow the desired transient response: NOTE: do not use the parameters ΔVOR and ΔVOmax indistinctly, the first one indicates the output voltage rip- ple, while the second one is the maximum output volt - age overshoot (transient response).
• R1 and RB: These two resistors help to set the output voltage to the desire value using a VREF=0.6V, select R1 between 10k and 100K and then calculate RB as follows: Regulator 8 (Synchronous Boost - internally compensated -Voltage or current feedback) REG8 is a Synchronous Boost converter set to 15V with a maximum current of 30mA and can be used with voltage feedback using the standard voltage divider configuration, or can be programmed to work with a current feedback configuration to control the current flowing through a LED Vin min VRAMP D′min ⎛⎞ 1 2π F ⎛⎞= C2 1 ⎛⎞= R2 1 ⎛⎞= R3 1 ⎛⎞= C3 1 ⎛⎞= Lmin Vo Io max+( RDSONLSFET RL+() D′min() T 2IOB Lmin D′T Vo 2IOB dtI Iomax T IostepΔ Dmax ⎛⎞ Vin min Vo– ⎛⎞= [A] COUT Iomax dtI [F] ESR max VoΔ r Fsw() L() RB R1 Vo

Analog Integrated Circuit Device Data Freescale Semiconductor 41 34704 FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION string. It does not need external compensation network, thus the only components that need to be calculated are:

• L: A boost power stage can be designed to operate in CCM for load currents above a certain level usually 5 to 15% of full load. The minimum value of inductor to maintain CCM can be determined by using the following procedure:
• D e f i n e IOB as the minimum current to maintain CCM as 15% of full load: However the worst case condition for the boost power stage is when the input voltage is equal to one half of the output voltage, which results in the Maximum ÄIL, then:
• COUT: The three elements of output capacitor that contribute to its impedance and output voltage ripple are the ESR, the ESL and the capacitance C. The minimum capacitor value is approximately:
• W h e r e ΔVOr is the desired output voltage ripple.
• Now calculate ΔVOr the maximum allowed ESR to reach the desired.
• R1 and RB (for Voltage feedback control): These two resistors help to set the output voltage to the desire value using a V REF=0.6V, select R1 between 10k and 100K and then calculate RB as follows:
• RS (For current feedback control with LED string): This resistor is attached at the end of the LED string and it controls the amount of current flowing through it. To calculate this resistor, set the maximum current you want to flow though the string and use the following formula: Where Vref=230mV is the maximum internal reference voltage in current mode control that is reflected on the FB8 pin. Regulator 7 (Inverter controller - external compensation needed) REG7 is a non-synchronous buck/boost inverting PWM voltage-mode control DC-DC regulator that drive an external P-MOSFET to supply a typical voltage of -7V at a maximum current of 60 mA.
• P-MOSFET: The peak current of the MOSFET is assumed to be ID, which is obtained by the following formula, define IOB from 5 to 15% of maximum current rating. And the voltage rating is given by:
• Diode D7: The peak value of the diode current is IFSM which should also be higher than ILpeak. The average current rating should be higher than the output current low and the repetition reverse voltage VRRM is given by:
• L: The minimum value of inductor to maintain CCM can be determined by using the following procedure:
• COUT: The three elements of output capacitor that contribute to its impedance and output voltage ripple are the ESR, the ESL and the capacitance C. The minimum capacitor value is approximately:
• W h e r e ΔVOr is the desired output voltage ripple.
• Now calculate the maximum allowed ESR to reach the desired.
• R1 and RB: These two resistors help to set the output voltage to the desire value using a VFB7=0.6V, select R1 between 10k and 150K and then calculate RB as follows: Lmin Vo D() 1D–() 2T 2IOB Lmin Vo T() 16IOB COUT Iomax Dmax ESR VorΔ Iomax RB R1 Vo RS Vref IQ ILpeak≥ Io I OB+()– VQ Vin Vo–= VRRM Vin Vo–≥ Lmin VoT– 2Io max ≥ [H] COUT Iomax Dmax [Ω]ESR VorΔ Iomax

Analog Integrated Circuit Device Data

42 Freescale Semiconductor

FUNCTIONAL DEVICE OPERATION COMPONENT CALCULATION NOTE: RB is not grounded, instead is connected to VREF7 pin (VREF7=1.5V) which provide a positive voltage to assure a positive voltage at the FB7 pin.

• Compensation network. (C1,C2,C3, R2, R3) For compensating a buck converter, 4 important frequencies referring to the plant are:
• Output LC filter cutoff frequency (F LC): Where D’min is the minimum off time percentage given by:
• Cutoff frequency due to capacitor ESR:
• The right plane zero frequency:
• Crossover frequency (or ba ndwidth): select this frequency as far away form the RHPZ as much as possible: The Type 3 external compensation network will be in charge of canceling some of these poles and zeros to achieve stability in the system. The following poles and zeroes frequencies are provided by the type 3 compensation: The passive components associated to these frequencies are calculated with the following formulas. On the 34704 VRAMP is half of 1.2V since each operation mode spends only half the ramp. [Ω]RB 0.9 [Hz]FLC D′min LCOUT2π D′min Vin min Vout max FESR [Hz]RHP Z D′min() 2RLOAD [Hz]FBW RHP Z FPO FBW=F Z1 0.9FLC=F 22 1.1FLC= FP1 FESR=F 2P FSW Vin min VRAMP D′min ⎛⎞ 1 ⎛⎞= C2 1 ⎛⎞= R2 1 ⎛⎞= R3 1 ⎛⎞= C3 1 ⎛⎞=

Figure 7. 34704A Typical Application Diagram

1. AGND(S) & PGND(S) SHOULD BE CONNECTED TOGETHER AS CLOSE TO THE IC AS POSSIBLE
2. REFER TO THE FB8 FUNCTIONAL PIN DESCRIPTION ON PAGE 17.

44 Freescale Semiconductor

Figure 8. 34704B Typical Application Diagram

1. AGND(S) & PGND(S) SHOULD BE CONNECTED TO GETHER AS CLOSE TO THE IC AS POSSIBLE
2. REFER TO THE FB8 FUNCTIONAL PIN DESCRIPTION ON PAGE 17.

Analog Integrated Circuit Device Data Freescale Semiconductor 45 34704 PACKAGING PACKAGE DIMENSIONS PACKAGING PACKAGE DIMENSIONS For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below. EP SUFFIX 56-PIN 98ASA10751D REVISION A

Analog Integrated Circuit Device Data

46 Freescale Semiconductor

PACKAGE DIMENSIONS (CONTINUED) PACKAGE DIMENSIONS (CONTINUED) EP SUFFIX 56-PIN 98ASA10751D REVISION A

Analog Integrated Circuit Device Data Freescale Semiconductor 47 34704 PACKAGING PACKAGE DIMENSIONS (CONTINUED) PACKAGE DIMENSIONS (CONTINUED) EP SUFFIX 56-PIN 98ASA10751D REVISION A

Analog Integrated Circuit Device Data

48 Freescale Semiconductor

REVISION HISTORY

REVISION DATE DESCRIPTION OF CHANGES 2.0 4/2008 • Initial Release 3.0 6/2008 •R e v i s e d 34704 Simplified Application Diagram on page 1

• R e v i s e d 34704 Internal Block Diagram on page 3
• R e v i s e d 34704 Pin Definitions on page 4
• R e v i s e d 34704A Typical Application Diagram on page 43 and 34704B Typical Application Diagram on page 44 4.0 6/2009 • Updated category from Advance Information to Technical Data.

How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. Technical Information Center, EL516

2100 East Elliot Road

Tempe, Arizona 85284 1-800-521-6274 or +1-480-768-2130 www.freescale.com/support Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7

81829 Muenchen, Germany

+44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) www.freescale.com/support Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor China Ltd. Exchange Building 23F No. 118 Jianguo Road Chaoyang District Beijing 100022 China +86 10 5879 8000 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or +1-303-675-2140 Fax: +1-303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2008 - 2009. All rights reserved. MC34704 Rev. 4.0 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”, must be validated for each customer application by customer’s technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part.