33990_06 FREESCALE | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 16
Technical content
Features
- Designed for SAE J-1850 Class B Data Rates
- Full Operational Bus Dynamics Over a Supply Voltage of 9.0 V to 16 V
- Ambient Operating Temperature of -40°C to 125°C
- Interfaces Directly to Standard 5.0 V CMOS Microcontroller
- BUS Pin Protected Against Shorts to Battery and Ground
- Thermal Shutdown with Hysteresis
- Voltage Waveshaping of Bus Output Driver
- Internally Reverse Battery Protected
- 4 0 V Max VBAT Capability
- Pb-Free Packaging Designated by Suffix Code EF
Figure 1. 33990 Simplified Application Diagram
ORDERING INFORMATION
Range (TA) Package MC33990D/DR2 -40°C to 125°C 8 SOICNN MCZ33990EF/R2 BUS +VBAT SLEEP TX RX 4X/LOOP GND LOAD Primary Node MCU VBAT Secondary Nodes 33990
2 Freescale Semiconductor
Figure 2. 33990 Simplified Internal Block Diagram Note This device contains approximately 400 active transistors and 250 gates.
Figure 3. 33990 Pin Connections Table 1. 33990 Pin Definitions 1 SLEEP Enables the transceiver when Logic 1 and disables the transceiver when Logic 0. 3 LOAD Accommodates an external pull-down resistor to ground to provide loss of ground protection. 4 BUS Waveshaped SAE Standard J-1850 Class B transmitter output and receiver input. 5 VBAT Provides device operating input power. transmitting, high impedance = loopback mode. 7 TX Serial data input (DI) from the microcontroller to be transmitted onto Bus. 8 RX Bus received serial data output (DO) sent to the microcontroller.
Analog Integrated Circuit Device Data
4 Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted.
- An external series diode must be used to provide reverse battery protection of the device.
- SLEEP, TX, RX, and 4X / LOOP are normally connected to a microcontroller.
- ESD1 testing is performed in accordance with the Human Body Model (C ZAP = 100 pF, RZAP = 1500 Ω).
- ESD2 testing is performed in accordance with the Machine Model (C ZAP = 200 pF, RZAP = 0 Ω).
- Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these lim its may
cause malfunction or permanent damage to the device.
- Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
MC33xxxD enter 33xxx), and review parametrics.
Analog Integrated Circuit Device Data Freescale Semiconductor 5 33990 STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics Characteristics noted under conditions of 7.0 V ≤ VBAT ≤ 16 V, -40°C ≤ TA ≤ 125°C, SLEEP = 5.0 V unless otherwise noted. are into the pin. All negative currents are out of the pin.
8.2 V ≤ VBAT ≤ 16 V
0 V ≤ VBUS ≤ VBAT
- Typical threshold value is the approximate actual occurring switch point value with V BAT = 13 V, TA = 25°C.
- Device characterized but not production tested for thermal shutdown.
- Device characterized but not production tested for thermal shutdown hysteresis.
Analog Integrated Circuit Device Data
6 Freescale Semiconductor
STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics (continued) Characteristics noted under conditions of 7.0 V ≤ VBAT ≤ 16 V, -40°C ≤ TA ≤ 125°C, SLEEP = 5.0 V unless otherwise noted. are into the pin. All negative currents are out of the pin.
Analog Integrated Circuit Device Data Freescale Semiconductor 7 33990 DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 5. Dynamic Electrical Characteristics Characteristics noted under conditions of 7.0 V ≤ VBAT ≤ 16 V, -40°C ≤ TA ≤ 125°C, SLEEP = 5.0 V unless otherwise noted. are into the pin. All negative currents are out of the pin.
- Typical is the parameter's approximate average value with V BAT = 13 V, TA = 25°C.
- RX Output Transition Time from a sleep state.
Analog Integrated Circuit Device Data
8 Freescale Semiconductor
ELECTRICAL PERFORMANCE CURVES ELECTRICAL PERFORMANCE CURVES TEST FIGURES Figure 4. Loss of Ground Test Circuit Figure 5. Loss of VBAT Test Circuit Figure 6. BUS Rise and Fall Times Figure 7. Pulse Width Distortion Figure 8. SLEEP to Tx Delay Times Figure 9. BUS-to-Rx Delay Time
1.5 V tpwd(max)
3.875 VtTxDelay
Analog Integrated Circuit Device Data Freescale Semiconductor 9 33990 Figure 10. Rx Rise and Fall Time
10 Freescale Semiconductor
plastic package makes the device a cost-effective solution. voltages from -16 V to 40 V. used to establish the Rx output level and slew rate times.
2.0 V ground
given by the expressions shown in Table 6. Figure 11. Minimum Bus Load Figure 12. Maximum Number of Nodes
24 Secondary Nodes
Figure 13. Maximum Bus Load
31 Secondary Nodes
Table 6. Class B Bus Capacitance and Resistance Expressions
Analog Integrated Circuit Device Data
12 Freescale Semiconductor
FUNCTIONAL PIN DESCRIPTION TYPICAL APPLICATIONS CLASS B MODULE INPUTS Transmitter Data from the MCU (TX) The Tx input is a push-pull (N-channel / P-channel FETs) buffer with hysteresis for noise immunity purposes. This pin is a
5.0 V CMOS logic level input from the MCU following a true
logic protocol. A logic [0] input drives the BUS output to 0 V (via the external pull-down resistor to ground on each node), while a logic [1] input produces a high voltage at the BUS output. A logic [0] input level is guaranteed when the Tx input pin is an open-circuit by virtue of an internal 40 kΩ pull-down resistor. No external resistor is required for its operation. Waveshaping and 4X / Loop This input is a tristateable input: 0 V = normal waveshaping,
5.0 V = waveshaping is disabled for 4X transmitting, and high
impedance = loopback mode of operation. This is a logic level input used to select whether waveshaping for the Class B output is enabled or disabled. A logic [0] enables waveshaping, while a logic [1] disables waveshaping. In the 4X mode, the BUS output rise time is less than 2.0 µs and the fall time is less than 5.0 µs (owing to the external RC pull-down to ground). In the loopback condition, the Tx signal is fed back to the Rx output after waveshaping without being transmitted onto the BUS. This mode of operation is useful for system diagnostic purposes. CLASS B MODULE OUTPUTS Transceiver Output (BUS) This is the output driver stage that sources current to the bus. Its output follows the waveshaped waveform input. Its output voltage is limited to 6.25 V to 8.0 V under normal battery level conditions. The limited level is controlled by an internal regulator/clamp circuit. Once the battery voltage drops below
9.0 V, the regulator / clamp circuit saturates, causing the bus
voltage to track the battery voltage. A 1.5 kΩ ± 5% external resistor (as well as any 10.6 kΩ pull-down resistors of any secondary nodes) sinks the current to discharge the capacitors during high-to-low transitions. This sourcing output is short circuit-protected (60 mA to 170 mA) against a short to -2.0 V and sinks less than 1.0 mA when shorted to VBAT. If a short occurs, the overtemperature shutdown circuit protects the source driver of the device. In the event battery power is lost to the assembly, the bus transmitter's output stage will be disabled and the leakage current from the BUS output will not source or sink more than 100 mA of current. The transceiver will operate with a remote ground offset of ± 2.0 V, but the lower corners of transmission will not be rounded during this condition. Receiver Output to the Microcontroller (RX) This is a 5.0 V CMOS compatible push-pull output used to send received data to the microcontroller. It does not require an external pull-up resistor to be used. The receiver is always enabled and draws less than 65 µA of current from VBAT. The receive threshold is dependent on the state of the SLEEP pin. The initial state of this output is always a logic [0] after supply voltage is applied, but before the SLEEP pin goes to a logic [1] state. The receiver circuitry is able to operate with VBAT voltages as low as 4.25 V and still remains capable of “waking up” the 33990 when remote Class B activity is detected. When the SLEEP pin is low and message activity occurs on the bus, the receiver passes the bus message through to the microcontroller. The 33990 does not automatically “wake up” from a sleep state when bus activity occurs: the microcontroller must tell it to do so. In the Static Electrical Characteristics table, the maximum voltage for Rx is specified as 4.75 V over an operating range of -40°C to 125°C temperature and 7.0 V to 16 V VBAT. This maximum Rx voltage is compatible with the minimum VDD voltage of microcontrollers to prevent the 33990 from sourcing current to the microcontroller's output. Switched Ground Output (LOAD) Normally this output is a saturated switch to ground, which pulls down the external resistor between the BUS and LOAD outputs. In the event ground is lost to the assembly, the LOAD output will bias itself “off” and will not leak more than 100 µA of current out of this pin. Overtemperature Shutdown If the BUS output becomes shorted to ground for any duration, an overtemperature shutdown circuit “latches off” the output source transistor whenever the die temperature exceeds 150°C to 190°C. The output transistor remains latched off until the Tx input is toggled from a logic [0] to a logic [1]. The rising edge provides the clearing function, provided the locally sensed temperature is 10°C to 15°C below the latch-off temperature trip temperature. Waveshaping Waveshaping is incorporated into the 33990 to minimize radiated EMI emissions. Receiver Protocol The Class B communication scheme uses a variable pulse width (VPW) protocol. The microcontroller provides the VPW decoding function. Once the receiver detects a transition on Rx, it starts an internal counter. The initial “start of frame” bit is a logic [1] and lasts 200 µs. For subsequent bits, if there is a bus
transmission access to the bus for that message. BUS and LOAD, see a very low impedance to VBAT. switch connected to it that is normally saturated to ground. ground as shown in Table 6, page 11. between these pins and ground. Figure 14. Typical Application
Analog Integrated Circuit Device Data
14 Freescale Semiconductor
For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below. D SUFFIX EF SUFFIX (PB-FREE) 8-PIN PLASTIC PACKAGE 98ASB42564B
Analog Integrated Circuit Device Data Freescale Semiconductor 15 33990
REVISION HISTORY
REVISION DATE DESCRIPTION OF CHANGES 2.0 10/2006 • Implemented Revision History page
- Converted to Freescale format 3.0 11/2006 • Removed Peak Package Reflow Temperature Du ring Reflow (solder reflow) parameter from Maximum Ratings on page 4. Added note with instructions to obtain this information from www.freescale.com.
Rev 3.0 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”, must be validated for each customer application by customer’s technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc., 2006. All rights reserved. RoHS-compliant and/or Pb-free versions of Freescale products have the functionality and electrical characteristics of their non-RoHS-compliant and/or non-Pb-free counterparts. For further information, see http://www.freescale.com or contact your Freescale sales representative. For information on Freescale’s Environmental Products program, go to http:// www.freescale.com/epp. How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. Technical Information Center, EL516
2100 East Elliot Road
Tempe, Arizona 85284 +1-800-521-6274 or +1-480-768-2130 www.freescale.com/support Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7
81829 Muenchen, Germany
+44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) www.freescale.com/support Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. Technical Information Center
2 Dai King Street
Tai Po, N.T., Hong Kong +800 2666 8080 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P .O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com