33793

MC33793 MOTOROLA | Alldatasheet

Document overview

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Technical content

Features

• 4-Channel, 8-Bit Analog-to-Digital Converter (ADC)
• 4 Pins Configurable as Analog or Logic Inputs or as Logic Outputs
• Provides Regulated +5.0 V Output for Sensor Power from Bus
• Additional High-Drive Logic Output
• Undervoltage Fault Detection and Signaling
• On-Board Clock (No External Elements Required)
• Field-Programmable Address
• Default and Field-Programmable as a DSI Daisy Chain Device
• Recognizes Reverse Initialization for Open Bus Fault Tolerance
• Detects Short to Battery on Bu s Switch and Prevents Its Closure DISTRIBUTED SYSTEM INTERFACE (DSI) SENSOR INTERFACE BUSOUT AGND NC BUSIN NC H_CAP REGOUT NC LOGOUT I/O1 AGND I/O3 NC I/O2 I/O0 BUSRTN XY ACCELEROMETER TEST ERROR GND VCCXY 1.0µF 4.7µF DSIO 33793 To Other DSI Slaves BUSIN BUSOUT BUSRTN 33793 LED 1.0 K 33790

ORDERING INFORMATION

Range (TJ) Package MC33793D/R2 -40°C to 150°C 16 SOICN D SUFFIX 16-LEAD SOICN CASE 751B Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

33793 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA

Figure 1. 33793 Simplified Internal Block Diagram

4.0 MHz

4 Bits NVM

5.0 V Regulator

8 Bits

Freescale Semiconductor, Inc.

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33793 PIN FUNCTION DESCRIPTION Pin Pin Name Description 1 BUSRTN This pin provides the common return for power and signalling. 2 I/O0 This pin can be used to provide a logic level out put, a logic input, or an analog-to-digital (A/D) input. 3, 5 AGND This pin is the low reference level and power return for the analog-to-digital converter (ADC). 4 I/O1 This pin can be used to provide a logi c level output, a logic input, or an A/D input. 6 I/O3 This pin can be used to provide a logi c level output, a logic input, or an A/D input. 7, 10, 13, 15 NC These pins have no internal connections. 8 I/O2 This pin can be used to provide a logi c level output, a logic input, or an A/D input. 9 LOGOUT This is a logic output with higher pul l-up drive capability than the standard logic I/O. 11 REGOUT This pin provides a regulated 5.0 V output. The power is derived from the bus. 12 H_CAP A capacitor attached to this pin is charged by t he bus during bus idle and supplies current to run the device and for external devices via the REGOUT pin during non-idle periods. 14 BUSIN This pin attaches to the bus and responds to initialization commands. 16 BUSOUT This pin attaches to the bus and responds to reverse initialization commands. LOGOUT BUSOUT NC BUSIN NC H_CAP NC REGOUT I/O2 BUSRTN I/O0 AGND I/O1 AGND NC I/O3 Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

All voltages are with respect to ground unless otherwise noted. Parameter Symbol Value Unit I/O Pin Voltage VIO -0.3 to VREGOUT + 0.5 V I/O Pin Current IIO 5.0 mA BUSIN, BUSOUT, BUSRTN, and H_CAP Voltage VIN -0.3 to 40 V BUSIN, BUSOUT, BUSRTN, and H_CAP Current (Continuous) IIN 250 mA Storage Temperature TSTG -55 to 150 °C Operating Junction Temperature TJ -40 to 150 °C Lead Soldering Temperature (Note 1) TSOLDER 260 °C Thermal Resistance Junction to Case RθJC 150 °C/W ESD Protection Human Body Model (Note 2) Machine Model (Note 3) VESD1 VESD2 ±2000 ±200 V Notes 1. Lead soldering temperature limit is for 10 second maximum dura tion. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. 2. ESD1 performed in accordance with the Human Body Model (C ZAP = 100 pF, RZAP = 1500 Ω). 3. ESD2 performed in accordance with the Machine Model (C ZAP = 200 pF, RZAP = 0 Ω). Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33793 STATIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions -0.3 V ≤ VBUSIN or VBUSOUT ≤ 30 V, 5.5 V < VH_CAP < 30 V, -40°C< TJ < 150°C. Parameter Symbol Min Nom Max Units Internal Quiescent Current Drain VH_CAP = 25 V, Logout = 0, I/O = Input IQ – – 3.0 mA BUSIN or BUSOUT to H_CAP Rectifier Voltage Drop IBUSIN or IBUSOUT = 15 mA IBUSIN or IBUSOUT = 100 mA VRECT 0.75 0.9 1.00 1.2 V BUSIN + BUSOUT Bias Current VBUSIN or VBUSOUT = 8.0 V, VH_CAP = 9.0 V VBUSIN or VBUSOUT = 0.5 V, VH_CAP = 25 V IBIAS -100 100 µA Rectifier Leakage Current VBUSIN or VBUSOUT = 5.0 V, VH_CAP = 25 V IRLKG -20 – 100 µA Reg0ut

5.5 V > VH_CAP > 25 V, IRO = 12 mA

4.75 5.0 5.25 V RegOut Line Regulation IRO = 12 mA, 5.5 V > VH_CAP > 25 V VRLINE – 71 180 mV RegOut Load Regulation IRO = 0 to 12 mA, 5.5 V > VH_CAP > 25 V VRLD – 2.3 100 mV Undervoltage Lockout Proportional to unloaded VREGOUT VUVL 0.93 0.95 0.97 VRO Bus Switch Resistance VBI = 8.0 V, IBO = -80 mA (Bus Switch Active) RSW – 4.0 8.0 Ω I/O0 and I/O3 Pull-Down Current 0 < VBUSIN or VBUSOUT < 1.0 V IPD 7.0 11 13 µA I/O1 and I/O2 Pull-Up Current VRO < VBUSIN or VBUSOUT < VRO -1 . 0V IPU -7.0 -11 -13 µA BUSIN and BUSOUT Logic Thresholds Low High VTHL VTHH 2.8 5.5 3.0 6.0 3.2 6.5 V Logic Duty Cycle (assured by design) Logic 0 Logic 1 DCL DCH BUSIN + BUSOUT Response Current VBUSIN and/or VBUSOUT = 4.0 V IRSP 9.9 11 12.1 mA ADC Code Conversion Error (INL) ADCINL – – < 1.0 LSB ADC Full-scale Error ADCFS – – 3 counts I/O Logic Input Thresholds Logic High Logic Low VIH VIL 0.7 0.54 0.51 0.3 VRO Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

Output Low (IL = 1.0 mA) Output High (IL = -500 µA) VOL VOH 0.8 0.08 0.985 0.5 1.0 V VRO LOGOUT Output Levels Output Low (IL = 500 µA) Output High (IL = -10 mA, 6.2 V < VH_CAP < 25 V) Output High (IL = -100 µA, 6.2 V < VH_CAP < 25 V) VLOL VLOH1 VLOH2 4.7 0.2 5.0 0.5 5.3 VRO+0.5 V Programming Time From Positive Edge of BUSIN or BUSOUT > VTHH on Program Command to Following Command Negative Transition < VTHH TPROG 100 200 1000 ms NVM BUSIN or BUSOUT Programming Voltage NVMVP 22.25 – 30 V STATIC ELECTRICAL CHARACTERISTICS (continued) Characteristics noted under conditions -0.3 V ≤ VBUSIN or VBUSOUT ≤ 30 V, 5.5 V < VH_CAP < 30 V, -40°C< TJ < 150°C. Parameter Symbol Min Nom Max Units Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33793 DYNAMIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions -0.3 V ≤ VBUSIN or VBUSOUT ≤ 30 V, 5.5 V ≤ VH_CAP ≤ 30 V, -40°C ≤ TJ ≤ 150°C. Characteristic Symbol Min Typ Max Unit Initialization to Bus Switch Closing tBS 100 150 200 µs Loss of Signal Reset Time Maximum Time Below Frame Threshold tTO –– 1 0 0 ms ADC Code Conversion Time (Go, No-Go Test) tADC –– 2 7 µs BUSIN and BUSOUT Response Current Transition Time 1.0 mA to 9.0 mA Transition, 9.0 mA to 1.0 mA tITR –7 . 0 1 0 mA/µs BUSIN or BUSIN Timing to Response Current BUSIN or BUSOUT Negative Voltage Transition = 3.0 V to IRSPH = 7.0 mA BUSIN or BUSOUT Negative Voltage Transition = 3.0 V to IRSPL = 5.0 mA tRSPH tRSPL 3.3 3.3 µs Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

Figure 2. Bus Switch and Reset Timing Figure 3. Response Current Timing Freescale Semiconductor, Inc.

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33793 SYSTEM/APPLICATION INFORMATION INTRODUCTION The 33793 is designed to be used with a sensor at a location that is remote from a centralized MCU. This device provides power, measurement, and communications between the remote sensor and the centralized MCU over a DSI bus. Sensors such as accelerometers can be powered from the regulated output of the device, and the resulting analog value from the sensor can be converted from an analog level to a digital value for transmission over the DSI bus in response to a query from the MCU. Four I/O lines can be configured by the central MCU over the DSI bus as analog inputs, digital inputs, or digital outputs. This allows more than one sensor to be remotely controlled and measured by a single 33793. Additionally, a high drive logic output is provided that can be used to power other low-power sensors. Power is passed from BUSIN or BUSOUT through on-board rectifiers to a storage capacitor (referred to as the H_CAP). The H_CAP stores energy during the highest voltage excursions of the BUSIN or BUSOUT pin (idle) and supplies energy to power the device during low excursions of BUSIN and BUSOUT. The Regulator supplies an on-board regulated voltage for internal use, and the Power on Reset (POR) circuit provides a reset signal during low-voltage conditions and during power up/ down. Some current is available for low-power sensors. Data from the Central Control Unit (CCU) is applied to the BUSIN and/or BUSOUT pins as voltage levels that are sensed by the Level Detection circuitry. The Serial Decoder detects these transitions and decodes the incoming data. The Control Logic provides overall control of the 33793. It controls diagnostic testing and formats responses to commands with the message encoder. Responses are formed via a switched current source that is slew-rate controlled. The one-time programmable (OTP) memory array provides the nonvolatile storage for the pre-programmed address. It is accessed via the Read/Write NVM command. It has a built-in hardware lock that only allows one write. FUNCTIONAL DESCRIPTION Refer to Figure 1, 33793 Internal Block Diagram, page 2, for a simplified representation of the 33793’s components. Rectifier This rectifier or switch peak detects the bus signal into an external capacitor attached to H_CAP. The capacitor supplies power during signaling while the input voltage is at a lower level. The voltage waveform at BUSIN and/or BUSOUT and the size of the filter capacitor at H_CAP must be such that the voltage at H_CAP will not drop below the frame threshold during signaling. POR The 33793 leaves the reset state when the voltage on H_CAP rises above the Power-ON Reset threshold. Timeout A timeout timer keeps track of the length of the time when the input is not in idle mode. If this time exceeds a limit, the part is reset. The purpose of this is to allow the part to reset itself if the connection to the master is lost or if power is removed from the system. The 5.0 V regulator supplies internal power for the device and also provides approximately 6.0 mA through the REGOUT pin to power an external sensor. Undervoltage Detector The undervoltage detector monitors the output voltage of the 5.0 V regulator. If the REGOUT voltage drops too low for accurate A/D operation, a signal is sent to the control logic. The control logic will interpret this signal and, in response to a command, report a status indicating an undervoltage condition to have existed. When received, the command will clear the signal after having read the status. If the voltage is too low when the A/D conversion was completed, the returned value will be zero (binary 00000000). IO Pins 0 to 3 The IO pins can serve as logic inputs, logic outputs, or analog inputs. At power-up or after a clear, the pins are all logic inputs and can be used to measure an analog level value for an analog value request command. The pins can be individually configured as logic inputs or outputs by the IO Control command. If the pin is configured as a logic output, reading the analog value will return the analog level the output is being driven to. Analog-to-Digital Converter The ADC is an 8-bit successive approximation type using on- board capacitive division. It uses the Clk signal from the on- board oscillator for sequencing. The ADC uses REGOUT as a full-scale reference voltage and ground AGND for a zero-level reference. The ADC signals when it has made a valid conversion by asserting a signal to the controller. If this signal is not asserted Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

when a value is being captured by the controller, the controller will signal that an invalid A/D value was obtained. The value of “0" (binary 00000000) is reserved by the control logic to signal an error. A value of "0" from the ADC will be reported as "1" (binary 00000001) by the control logic. Serial Encoder The Serial Encoder accepts the digitized value from the ADC and formatting/data from the Control Logic. A logic transition from Idle to Signal High and then to Signal Low at BUSIN will cause the first bit to be presented to the current switch (Response Loading). A transition to Signal High and back to Signal Low will cause the next bit to be presented to the current switch. This will continue until a transition back to Idle turns off the current switch. Slew The slew circuit serves to reduce EMI produced as a result of switching the bus loading current sink element. The slew circuit limits the rise and fall time of current loading the bus by controlling the current sinking element. Switched Current Source A "1" data return bit will be signaled by turning on a fixed current source. During signaling time, the 33793 will be using power from H_CAP and not loading the bus for power. The current will be drawn from either BUSIN or BUSOUT or split between them. The split can be in any proportion as long as the total is correct. The current source is turned off whenever the bus is at Idle level. Level Detector The level detector contains comparators to determine if the BUSIN or BUSOUT is at idle, logic high, or logic low. The inputs from BUSIN and BUSOUT are sensed by the device so that if either side is driven by the signaling waveform while the other is not, the signaling will be detected. This circuit also provides a signal to indicate if the signal is being received on the BUSOUT pin. If a "reverse initialization" command is received, it can only be acted upon if the device is not already initialized and if the signal is present on BUSOUT. Serial Decoder The Serial Decoder monitors transitions on the BUSIN or BUSOUT. When the 33793 is Idle and supplying power to itself and the external device(s) (via REGOUT), the input to BUSIN will be in the Idle state. A transition from this level to Signal Low (through Signal High) will start the process of decoding a word of data. BUSIN is driven from Signal Low to Signal High for each bit and back to Signal Low to start the next bit. The determination of whether the bit was a one or a zero is made by determining whether it spent more time low (a zero) or high (a one). The end of the word is signaled by a transition at the end of the last bit from Signal High to Idle. The advantage of this method is that it will accept data over a wide range of rates and is not dependent on an accurate clock. The controller will typically indicate a logic zero by spending 2/3 of the bit period at Signal Low and 1/3 at Signal High. A logic one would be 1/3 of the bit period at Signal Low and 2/3 at Signal High. Control Logic The control logic performs the digital operations carried out by this device. Its principle functions include:

• Decoding input instructions.
• Control the general purpose I/O and LOGICOUT in response to BUSIN or BUSOUT commands.
• Control A/D conversions.
• Form response word.
• Capture and store address.
• Control BUSSW.
• Reset device on power-up.
• Control the general purpose I/O logic configuration.
• Read the general purpose I/O logic values and respond to request for these values.
• Generating a cycle redundancy check (CRC) for the received data and transmitted data in conformance with the DSI Bus Standard. Additionally, the control logic performs error checking on the received data. If errors are found, no action is taken and no response is made. Errors include:
• CRC received doesn’t match CRC of received data.
• Number of received bits is not 12 or 20. Clock The clock is a low-stability type with the capacitor integrated onto the die. The signaling system and all internal operations are such that no external precision timing device is needed in the normal operation of this device. Bus Switch (BUSSW) The bus switch passes signaling and power to all subsequent devices on the bus. It can block a voltage of either polarity up to the highest idle state level between BUSIN and BUSOUT. LOGICOUT LOGICOUT is a logic level output with enhanced high-side drive capability. Addressing The 33793 IC supports both runtime programmable and pre- programmed addressing as defined in the DSI Specification. Runtime programmable addressing uses the daisy chain bus connection. Pre-programmed devices may either be connected in daisy chain or in parallel on the bus wires. Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33793 Programmable address devices all power up with a device address of $0 in their address register and their bus switches open. In the daisy chain, if the first device receives the initialization command device on BUSIN, it will accept the address in the command and close its switch at the end of the command. The next device in the chain will now be able to receive the initialization command on its BUSIN and will accept the next address. This proceeds down the chain until the last device is addressed. The devices can also be initialized by the reverse initialization command if the signal is applied to BUSOUT. Pre-programmed devices power up with their pre- programmed address in its address register. It will ignore all Initialization commands unless the address in the command matches its pre-programmed address. In this event the device stores the other information contained in the Initialization command. Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

permanently store this address into an internal NVM area. Systems Interface Specification rev 1.0 unless otherwise noted. short-word commands and LW indicates long-word commands. reserved should not be sent to 33793 slaves. Table 1. DSI Bus Commands BS = Controls closing of the Bus Switch (1 = close). DR[3:0] = Direction of I/O. 1 = Output. G[1:0] = Group assignment (the 33793 does not use these bits). L[3:0] = Level to output on I/O if configured as outputs. PA[3:0] = Bus Address to set the device to. NV = Allows nonvolatile address programming if set to "1". Freescale Semiconductor, Inc.

Table 2. Long-Word Response Summary

0 Initialization A3 A2 A1 A0 0 0 0 BF NV BS G1 G0 PA3 PA2 PA1 PA0

1 Request Status A 3 A 2 A 1 A 0 0000 N V U L O B S I O 3 I O 2 I O 1 I O 0

2 Request Value 0 A 3 A 2 A 1 A 0 0000 B 7 B 6 B 5 B 4 B 3 B 2 B 1 B 0

3 I/O Control A 3 A 2 A 1 A 0 0000 L 3 L 2 L 1 L 0 D R 3 D R 2 D R 1 D R 0

4 Request ID A 3 A 2 A 1 A 0 0000 V 2 V 1 V 0 0 0 0 1 1

5 Request Value 1 A 3 A 2 A 1 A 0 0000 B 7 B 6 B 5 B 4 B 3 B 2 B 1 B 0

6 Request Value 2 A 3 A 2 A 1 A 0 0000 B 7 B 6 B 5 B 4 B 3 B 2 B 1 B 0

7 Clear No Response

8 Request Value 3 A 3 A 2 A 1 A 0 0000 B 7 B 6 B 5 B 4 B 3 B 2 B 1 B 0

9 Read/Write NVM A 3 A 2 A 1 A 0 00001111 P A 3 P A 2 P A 1 P A 0

A[3:0] = Address bits. The slave address. BS = Status of the Bus Switch (1 = close). DR[3:0] = I/O direction bits (1 = Output). G[1:0] = Group assignment (the 33793 does not use these bits). IO[3:0] = Logic level of I/O. L[3:0] = Level to output on I/O if configured as outputs. LO = Logic Out level at the Logic Out pin. NV = Allows nonvolatile address programming if set to “1”. PA[3:0] = Bus Address to set the device to. Freescale Semiconductor, Inc.

Table 3. Short-Word Response Summary

0000 Initialization Not Valid

0001 Request Status NV U LO BS IO3 IO2 IO1 IO0

0010 Request Value 0 B7 B6 B5 B4 B3 B2 B1 B0

0011 I/O Control Not Valid

0100 Request ID Information V2 V1 V0 0 0 0 1 1

0101 Request Value 1 B7 B6 B5 B4 B3 B2 B1 B0

0110 Request Value 2 B7 B6 B5 B4 B3 B2 B1 B0

0111 Clear No Response

1000 Request Value 3 B7 B6 B5 B4 B3 B2 B1 B0

1001 Read/Write NVM Not Valid

1010 Reserved

1011 Reserved

1100 Clear Logic Out NV U LO BS IO3 IO2 IO1 IO0

1101 Set Logic Out NV U LO BS IO3 IO2 IO1 IO0

1110 Reserved

1111 Reverse Initialization Not Valid

BS = Status of the Bus Switch (1 = close). LO = Logic Out level at the Logic Out pin. IO[3:0] = Logic level of I/O. NV = Allows nonvolatile address programming if set to “1”. PA[3:0] = Bus Address to set the device to. Freescale Semiconductor, Inc.

command will assign the device address and group number. complete the setting of a pre-programmed address. address in both PA3:PA0 and A3:A0 fields. Clear command or undergone a power-up reset. The command format is found in Table 4. long-word only command, the short-word response is invalid. and LOGICOUT. The command format is found in Table 6. Table 4. Initialization Command Format A[3:0] = Address bits. The slave address. BS = Bus Switch Position (1 = closed). G[1:0] = Group bits (unused). NV = Nonvolatile Memory Write. The value of the NV bit in the slave. PA[3:0] = Bus Address to set the device to. Table 5. Initialization Response Format A[3:0] = Address bits. The slave address. BF = Bus Fault. Bus out short to battery detected. BS = Bus Switch Position (1 = closed). G[1:0] = Group bits (unused). NV = Nonvolatile Memory Write. The value of the NV bit in the slave. PA[3:0] = Bus Address to set the device to. Table 6. Request Status Command Format address value of "0000" is ignored by all devices. Freescale Semiconductor, Inc.

generated if the command address field was $0. analog input measured is defined in Table 9. command. This is shown in Table 10. command address field was $0. Table 7. Request Status Response Format A[3:0] = Address bits. The slave address. BS = Bus Switch Position (1 = closed). LO = Logic out driven level. IO[3:0] = Values at logic I/Os. NV = Nonvolatile Memory Write. The value of the NV bit in the slave. U = Undervoltage indicated true by a “1”. Table 8. Request Value n Command Format A[3:0] = Address bits. The address of the selected device. An address value of "0000" is ignored by all devices. Table 9. Analog Input Selection

0010 I/O0

0101 I/O1

0110 I/O2

1000 I/O3

Table 10. Request Values Response Format A[3:0] = Address bits. The address of the selected device. An address value of "0000" is ignored by all devices. D[7:0] = Measured value (MSB = D7). X[3:0] = Cyclic Redundancy Check (CRC). Freescale Semiconductor, Inc.

as an output. The format of this command is shown in Table 11. outputs and their current values. command address field was $0. Table 11. I/O Control Command Format Table 12. I/O Control Response Format DR[3:0] = I/O enabled as outputs (1 = enabled as output). Table 13. Request ID Command Format A[3:0] = Address bits. The address of the selected device. An address value of “0000” is ignored by all devices. Freescale Semiconductor, Inc.

addressed device. The response format is found in Table 14. response is generated if the command address field was $0. Table 15. No response is generated for the Clear command. future NVM programming sequences. command format is found in Table 16. Table 14. Request ID Response Format A[3:0] = Address bits. The slave address. Table 15. Clear Command Format A[3:0] = Address bits. The address of the selected device. An address value of “0000” clears all devices. Table 16. Read/Write NVM Command Format

1111 P A 3 P A 2 P A 1 P A 0 A 3 A 2 A 1 A 0 1001 X 3 X 2 X 1 X 0

stored in the device address register. to be programmed into the slave. Freescale Semiconductor, Inc.

generated if the command address field was $0. logic low. The compliment to this command is the Set Logic Out. generated if the command address field was $0. high. The compliment to this command is the Clear Logic Out. Table 17. Read/Write NVM Response Format A[3:0] = Address bits. The slave address. programmed into the NVM address bits of the slave. Table 18. Clear Logic Out Command Format Table 19. Clear Logic Out Response Format A[3:0] = Address bits. The slave address. BS = Bus Switch Position (1=closed). LO = Logic out driven level. IO[3:0] = Values at logic I/Os. NV = Nonvolatile Memory Write. The value of the NV bit in the slave. U = Undervoltage indicated true by a “1”. Table 20. Set Logic Out Command Format Freescale Semiconductor, Inc.

generated if the command address field was $0. ways. The first is to initialize a programmable address device. address. The third is to initialize a pre-programmed device. command will assign the device address and the group number. close if BS = 1 and no fault is detected. complete the setting of a pre-programmed address. address in both PA3:PA0 and A3:A0 fields. command or undergone a power-up reset. The command format is found in Table 22. Table 21. Set Logic Out Response Format A[3:0] - Address bits. The slave address. IO[3:0] = Values at logic I/Os. LO = Logic out driven level. NV = Nonvolatile Memory Write. The value of the NV bit in the slave. U = Undervoltage indicated true by a “1”. Table 22. Reverse Initialization Command Format address and must match the PA[3:0] bits. that is to be stored into the slave’s address register. Freescale Semiconductor, Inc.

Table 23. Reverse Initialization Response Format A[3:0] = Address bits.The slave address. BF = Bus Fault. BUSIN short to battery detected. BS = Controls closing of the Bus Switch (1=close). G[1:0] = Group bits. Not used on this part, will be set to “0”. The group number programmed into the slave. NV = Nonvolatile Memory Write. The value of the NV bit in the slave. PA[3:0] = Bus Address to set the device to. Freescale Semiconductor, Inc.

NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 3. DATUMS A AND B TO BE DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY . 4. THIS DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURRS. MOLD FLASH, PROTRUSION OR GATE BURRS SHALL NOT EXCEED 0.15 MM PER SIDE. THIS DIMENSION IS DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 5. THIS DIMENSION DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSIONS. INTER-LEAD FLASH AND PROTRUSIONS SHALL NOT EXCEED 0.25 MM PER SIDE. THIS DIMENSION IS DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 6. THIS DIMENSION DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED 0.62 MM. 11 6 SEATING PLANE 0.50X45° M0.25 B 0.4916X BM0.25 A T 6.2 5.8 10.0 9.8 A 4.0 3.8 B PIN 1 INDEX PIN'S NUMBER AA 0.25 1.25 0.40 0 0.25 0.19 SECTION A-A 0.35 1.75 1.35 0.25 0.10 6 T 16X 0.1 T 1.27 14X D SUFFIX 16-LEAD SOIC NARROW BODY PLASTIC PACKAGE CASE 751B-05 ISSUE K Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33793 NOTES Freescale Sem iconductor, I Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com nc...

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