33385 FREESCALE | Alldatasheet
Document overview
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Technical content
Features
- RDSON of 250m Ω per Output at 25°C
- Supplied from the main 5V V CC
- Input CMOS Compatible
- Diagnostic through SPI
- Nominal Current of 2A per Output
- Current Limitation at 3A with Automatic Turn Off
- Output Internally Clamped at 50 V typ for Inductive Load Drive
- Junction to Case The rmal Resistance of 4.4°C/W
- Individual Output over Temperature Shutdown
- Pb-Free Packaging Designated by Suffix Code VW
Figure 1. MC33385 Simplified Application Diagram
ORDERING INFORMATION
Range (TA) Package MC33385DH/R2 -40°C to 125°C 20 HSOP MC33385VW/R2 33385 VPWR Voltage Regulator MCU OUT1 OUT2 OUT3 OUT4 GND1-4 VCC NCS CLK SDI SDO NRE NON1 NON2 NON3 NON4
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Figure 2. 33385 Simplified Internal Block Diagram
Figure 3. 33385 Pin Connections Table 1. 33385 Pin Definitions
1 GND2 Ground 2
2 OUT2 Output Channel 2
4 NON2 Input Control Signal for Channel 2
5 SDI Serial Data Input
6 CLK Clock Line for Serial Interface
7 NCS Chip Select for Serial Interface
8 NON4 Input Control Signal for Channel 4
9 OUT4 Output Channel 4
10 GND4 Ground 4
11 GND3 Ground 3
12 OUT3 Output Channel 3
13 NON3 Input Control Signal for Channel 3
14 Vcc 5V Power Supply
15 NRES Reset Input
16 SDO Data Output of Serial Interface
17 NON1 Input Control Signal Channel 1
19 OUT1 Output Channel 1
20 GND1 Ground 1
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ELECTRICAL CHARACTERISTICS
Table 2. Maximum Ratings permanent damage to the device.
- Pin soldering temperature limit is for 10 seconds maximum dur ation. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
- Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
MC33xxxD enter 33xxx), and review parametrics.
Analog Integrated Circuit Device Data Freescale Semiconductor 5 33385 Table 3. Static Electrical Characteristics values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
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Leakage Current 1 (NON = High, VOUT = 25V, VCC = 5V) IOUTL 10 µA Leakage Current 2 (NON = High, VOUT = 16V, VCC = 1V) IOUTL2 10 µA Output Clamp Voltage (IOUT = 1A) VCLP 45 50 58 V Matching Clamp Voltage (Between two outputs) VCLPM VCLP-1 VCLP+1 V Clamped Energy at the Switching OFF (See Figure 9) WOFF 50 mJ for 1ms On Resistance (IOUT = 2A, TJ = 150°C, NON = LOW) RDSON 500 mΩ Output Low Voltage Limitation (IOUT = 150mA) VOUTLIM 65 220 mV Output Capacitance (Guaranteed by design) COUT 350 pF OUTPUTS REVERSE DIODE Reverse Output Current IRD 2,5 A Reverse Peak current (1) IRDP 5.0 A Reverse Voltage Drop - IOUT = - 5A - IOUT = - 2,5A VRD1 VRD2 1.0 0.85 1.7 1.7 V V POWERSTAGE PROTECTION Short Current Limit ISCB 3.0 5 A VCC Undervoltage VCCMIN 3.35 3.95 V DIAGNOSTIC Short to GND Threshold Voltage for IOUT ≤ 2A VREF 0.390xVCC 0.435xVCC V Open Load Threshold Current IOL 10 50 mA Pull-up Resistor ROL 2.0 8.0 kΩ Temperature Detection Threshold TOFF 155 185 °C Notes 1. For t ≤ 2ms. Max. reverse current is limited to - 10A (for all outputs together) Table 3. Static Electrical Characteristics (continued) values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Analog Integrated Circuit Device Data Freescale Semiconductor 7 33385 Table 4. Dynamic Electrical Characteristics values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
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CLK High After NCS High tHCLCH 150 ns NCSLow/High to Output Data Flout tPCHDZ 100 ns Capacitance at SDI, SDO, CLk, CS tPCLD 10 pF NCS Filter time (Pulses ≤ tFNCS will be ignored) tFNCS 10 40 ns Table 4. Dynamic Electrical Characteristics (continued) values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
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Figure 7. Diagram to Short-Circuit to GND Failure (SCG-Failure) Detection Figure 8. Diagram to Open Load Failure (OL-Failure) Detection
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ELECTRICAL PERFORMANCE CURVES Figure 14. Output Clamp Voltage versus Temperature Figure 15. Rdson versus Temperature Figure 16. Open Load versus Temperature Figure 17. Vcc Undervoltage versus Temperature Figure 18. Short Current Limit versus Temperature Figure 19. Inductive Switching
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The device is a Quad Low-side Driver driven by four CMOS input stages. Each output power transistor is protected against short to VBAT by a zener clamp against overvoltage. A diagnostic logic recognizes four failure types at the output stage : overcurrent, short to GND, open-load and overtemperature. The failures are individually stored in a byte which can be read out via the serial interface (SPI). OUTPUT STAGE CONTROL Each of the four output stages is switched ON and OFF by an individual control line (NON-Input). The logic level of the control line is CMOS compatible. The output transistors are switched off when the inputs are not connected. POWER TRANSISTORS Each of the four output stages has its own zener clamp. This causes a voltage limitation at the power transistors when inductive loads are switched off. The drain voltage ramp occurring when output is switched on or off, is within defined limits. Output transistors can be connected in parallel to increase current capability. In this case, the associated inputs should be connected together. SHORT-CIRCUIT AND OVERTEMPERATURE PROTECTION If the output current increases above the short current limit for a time longer than tSCB or if the temperature increases above TOFF then the power transistor is immediately switched off. It remains switched off until the control signal on the NON-Input is switched off and on again. DIAGNOSTICS The following failures at the output stage are recognized : Short -Circuit to VBAT or overtemp = SCB (Highest priority) The SCB failure is recognized by an overcurrent (current above the short current limit) or an overtemperature. If the current through the output stage is lower than the IOL-reference, after a filter time an OL failure will be recognized. This measurement is active while the power stage is switched on. The SCG failure will recognize when the drain voltage is lower than the OL reference limit, while the output stage is switched off. All four outputs have an independent overtemperature detection and shutdown. All failures are stored in individual registers. They can be read by the microprocessor via the serial interface. There is no failure detected if the power stage control time is shorter than the filter time. DIAGNOSTIC INTERFACE The communication between the microprocessor and the failure register runs via the SPI link. If there is a failure stored in the failure register, the first bit of the shift register is set to a high level. With the High/Low change on the NCS pin, the first bit of the diagnostic shift register will be transmitted to the SDO output. The SDO output is the serial output from the diagnostic shift register and it is put into a tri-state when the NCS pin is high. The CLK pin clocks the diagnostic shift register. New SDO data will appear on every rising edge of this pin and new SDI data will be latched on every CLK’s falling edge into the shift register. With the first positive pulse of the CLK, the failure register will be cleared. There is no bus collision at a small spike at the NCS. The CLK is always LOW while the NCS-signal is changing. RESET There are two different reset functions realized : Under voltage reset : as long as the VCC voltage is lower than VCCRES, the power stages are switched off and the failure-registers are reset. Reset pin : as long as the NRES-pin is low, following circuits are reset :
- Power stages
- Failure register UNDERVOLTAGE PROTECTION At low VCC voltage, the device remains switched off even if there is a voltage ramp at the OUT pin.
Analog Integrated Circuit Device Data Freescale Semiconductor 15 33385 PACKAGING PACKAGE DIMENSIONS PACKAGING PACKAGE DIMENSIONS For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below. DH SUFFIX VW (PB-FREE) SUFFIX 20-PIN HSOP PLASTIC PACKAGE 98ASH70702A ISSUE B
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PACKAGE DIMENSIONS (CONTINUED) DH SUFFIX VW (PB-FREE) SUFFIX 20-PIN HSOP PLASTIC PACKAGE 98ASH70702A ISSUE B
Analog Integrated Circuit Device Data Freescale Semiconductor 17 33385
REVISION HISTORY
REVISION DATE DESCRIPTION OF CHANGES 6.0 11/2006 • Implemented Revision History page
- Added Pb-Free suffix code VW
- Converted to Freescale format, and adju sted to the prevailing form and style
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