ICS307-02 RENESAS | Alldatasheet

Document overview

  • Manufacturer or author: mamiller
  • PDF pages: 11

Technical content

Features

  • Packaged in 16-pin (150 mil wide) SOIC – Pb-free, RoHS compliant
  • Highly accurate frequency generation
  • Serially programmable: user determines the output frequency via a 3 wire interface
  • Eliminates need for custom quartz
  • Input crystal frequency of 5 - 27 MHz
  • Output clock frequencies up to 200 MHz
  • Power down tri-state mode
  • Very low jitter
  • Operating voltage of 3.3 V or 5 V
  • 25 mA drive capability at TTL levels
  • Industrial temperature version available Block Diagram VDD GND Reference Divider Phase Comparator, Charge Pump, and Loop Filter VCO VCO Divider Output Divider S2:S0 X1/ICLK Crystal or clock input Optional crystal capacitors Crystal Oscillator Shift Register Function Select STROBE DATA SCLK F1:F0 R6:R7 F1:F0 S2:S0 C1:C0 TTL

9 V8:V0

SERIALLY PROGRAMMABLE CLOCK SOURCE SER PROG CL OCK SYNTHESIZER IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE 2 ICS307-02 REV K 091511 Pin Assignment Pin Descriptions X1/ICLK NC VDD NC NC GND NC PDTS DATA CLK2 CLK1 STROBE NC NC SCLK 16 pin (150 mil) SOIC Pin Number Pin Name Pin Type Pin Description

1 X1/ICLK XI

Crystal connection (REF frequency). Connect to a parallel resonant crystal or an input clock. 2 NC - No connect. Do not connect anything to this pin. 3 VDD Power Connect to 3.3 V or 5 V. 4 NC - No connect. Do not connect anything to this pin. 5 GND Power Connect to ground. 6 CLK2 Output Output clock 2, determined by F0 - F1. Can be reference, REF/2, CLK1/2 , or off. 7 NC - No connect. Do not connect anything to this pin. 8 SCLK Input Serial clock. See timing diagram. 9 STROBE Input Strobe to load data. See timing diagram. 10 NC - No connect. Do not connect anything to this pin. 11 CLK1 Output Output clock 1, determined by R0 - R6, V0 - V8, S0 - S2, and input frequency. 12 DATA Input Data input. Serial input for three words which set the output clock(s).

13 PDTS

Powers down entire chip, tri states CLK1 and CLK2 outputs when low. Internal pull-up. 14 NC - No connect. Do not connect anything to this pin. 15 NC - No connect. Do not connect anything to this pin.

16 X2 XO

Input crystal connection. Connect to a crystal or leave unconnected for clock input.

SERIALLY PROGRAMMABLE CLOCK SOURCE SER PROG CL OCK SYNTHESIZER IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE 3 ICS307-02 REV K 091511 Determining the Output Frequency On power-up, the ICS307-02 on-chip registers can have random values so almost any frequency may be output from the part. CLK1 will always have some clock signal present, but CLK2 could possibly be OFF (low). The ICS307-02 on-chip registers are initially configured to provide a x1 output clock on both the CLK1 and CLK2 outputs. The output frequency will be the same as the input clock or crystal. This is useful if the ICS307 will provide the initial system clock at power-up. Since this feature is an advantage in most systems, the ICS307-02 is recommended for new designs. With programming, the user has full control in changing the desired output frequency to any value over the range shown in Table 1 on page 4. The output of the ICS307 can be determined by the following equation: Where: VCO Divider Word (VDW) = 4 to 511 (0, 1, 2, 3 are not permitted) Reference Divider Word (RDW) = 1 to 127 (0 is not permitted) Output Divider = values on page 4 The following operating ranges should be observed. For the commercial temperature range: And for the industrial temperature range: To determine the best combination of VCO, reference, and output dividers, see the online calculator at www.idt.com or contact IDT by sending an e-mail to cmd-support@idt.com with the desired input crystal or clock and the desired output frequency. CLK1Frequency InputFrequency 2 VDW 8+ 55MHz InputFrequency 2 VDW 8+ 200kHz InputFrequency 60MHz InputFrequency 2 VDW 8+ 200kHz Input Frequency

The tables below show the settings which can be configured, as well as the VCO and Reference dividers. Table 1. Output Divide and Maximum Output Frequency Table 2. CLK2 Output Table 3. Output Duty Cycle Configuration cycle with TTL levels. When VDD is 3.3 V, set this bit to 1 so the 50% duty cycle is achieved at VDD/2. Table 4. Crystal Load Capacitance for crystal frequencies lower than 10 MHz. If a clock input is used, set C1 = 0 and C0 = 0.

00 REF

01 FREF/2

10 OFF (Low)

11 FCLK1/2

SERIALLY PROGRAMMABLE CLOCK SOURCE SER PROG CL OCK SYNTHESIZER IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE 5 ICS307-02 REV K 091511 Bypass Mode If R6:0 is programmed to 0000000, the PLL is powered down and bypassed; the reference frequency will come from both CLK1 and CLK2. It is possible to generate glitches going into and out of this mode. Configuring the ICS307-02 The ICS307-02 can be programmed to set the output functions and frequencies. The three data bytes are written in DATA pin in this order: C1 is loaded into the port first and R0 last. R6:R0 Reference Divder Word (RDW) V8:V0 VCO Divider Word (VDW) S2:S0 Output Divider Select (OD) F1:F0 Function of CLK2 Output TTL Duty Cycle Settings C1:C0 Internal Load Capacitance for Crystal The ICS307-02 can be reprogrammed at any time during operation. If R6:0, V8:0, TTL, or C1:0 are changed, the frequency will transition smoothly to the new value over about 1 ms, without glitches or short cycles. If S2:0 is changed, it is possible to generate glitches on CLK1 and also on CLK2 for F1:0 = 1 1. Changing F1:0 will generate glitches on CLK2. Power up default values for ICS307-02 The input frequency will come from both outputs. A warning about using the default configuration with input frequencies lower than 13.75 MHz The VCO will run only as low as its minimum frequency, which is guaranteed to be no more than 55 MHz. So, in the powerup default condition, the PLL is guaranteed to lock to the input frequency down to 55/4 = 13.75 MHz. However, the part will typically run much slower. The typical minimum VCO frequency is about 30 - 40 MHz, depending on voltage, temperature, and lot variation; so in the powerup default setting, the CLK2 output will be a minimum of 7.5 - 10 MHz even if the input frequency is lower than that. The output is not locked to the reference input and so the frequency is not very stable and the phase noise is higher. In this condition, the CLK2 output will accurately provide the reference frequency down to 0 Hz because this signal path bypasses the PLL. Power-down Mode When the PDTS pin is pulled low, the chip will enter the power-down mode, where the output clocks are tri-stated and the rest of the chip is powered down. The chip can be programmed during power-down mode, however, if the chip is programmed during operation and enters power-down mode, the registers will return to their settings and not reset when exiting power-down mode (PDTS pin is pulled high). C1 C0 TTL F1 F0 S2 S1 S0 V8 V7 V6 V5 V4 V3 V2 V1 V0 R6 R5 R4 R3 R2 R1 R0 MSB LSB MSB LSB MSB LSB 00100011 00000100 00000110

data to the internal latch and the CLK output will lock within 10 ms. unintended changes on the output clocks. Figure 2. Timing Diagram for Programming the ICS307

SERIALLY PROGRAMMABLE CLOCK SOURCE SER PROG CL OCK SYNTHESIZER IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE 7 ICS307-02 REV K 091511 Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS307-02. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Recommended Operation Conditions VDD=3.3 V ±5% , Ambient temperature 0 to +70° C, unless stated otherwise Item Rating Supply Voltage, VDD 7 V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature 0 to +70 ° C Ambient Operating Temperature, Industrial -40 to +85 ° C Storage Temperature -65 to +150 ° C Soldering Temperature 260 ° C Parameter Min. Typ. Max. Units Ambient Operating Temperature 0 +70 ° C Power Supply Voltage (measured in respect to GND) +3.0 +5.5 V Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD 3.0 5.5 V Input High Voltage V IH X1/ICLK only (VDD/2)+1 VDD/2 V Input Low Voltage V IL X1/ICLK only VDD/2 (VDD/2)-1 V Input High Voltage V IH 2V Input Low Voltage V IL PDTS 0.4 V All other inputs 0.8 V Output High Voltage V OH IOH = -25 mA 2.4 V Output Low Voltage V OL IOL = 25 mA 0.4 V Output High Voltage, CMOS level VOH IOH = -4 mA VDD-0.4 V Operating Supply Current IDD 20 MHz crystal No load, 100 MHz out 26 mA 100 MHz out, 3.3 V 13 mA Short Circuit Current CLK outputs ±70 mA Input Capacitance C IN 4p F On-Chip Pull-up Resistor R PU Pin 13 270 k Ω

SERIALLY PROGRAMMABLE CLOCK SOURCE SER PROG CL OCK SYNTHESIZER IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE 8 ICS307-02 REV K 091511 VDD = 3.3 V ±5%, Ambient Temperature 0 to +70° C, unless stated otherwise Note 1: Measured with 15 pF load. Thermal Characteristics Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency F IN Fundamental crystal 52 7 M H z Clock 2 50 MHz Output Frequency (see Table 1) 6 200 MHz I-temp version 6 180 MHz Output Clock Rise Time t OR 0.8 to 2.0 V, Note 1 1 ns Output Clock Fall Time t OF 2.0 to 8.0 V, Note 1 1 ns Output Clock Duty Cycle even output divides 45 49-51 55 % odd output divides 40 60 % Power-up Time STROBE goes high until CLK out 31 0 m s One Sigma Clock Period Jitter 50 ps Maximum Absolute Jitter t ja Deviation from mean ±120 ps Parameter Symbol Conditions Min. Typ. Max. Units Thermal Resistance Junction to Ambient θJA Still air 120 ° C/W θJA 1 m/s air flow 115 ° C/W θJA 3 m/s air flow 105 ° C/W Thermal Resistance Junction to Case θJC 58 ° C/W

SERIALLY PROGRAMMABLE CLOCK SOURCE SER PROG CL OCK SYNTHESIZER IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE 9 ICS307-02 REV K 091511 Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95

Ordering Information

"LF" suffix to the part number denotes Pb-Free configuration, RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. Part / Order Number Marking Shipping packaging Package Temperature 307M-02LF ICS307M-02LF Tubes 16-pin SOIC 0 to +70 ° C 307M-02LFT ICS307M-02LF Tape and Reel 16-pin SOIC 0 to +70 ° C 307M-02ILF 307M-02ILF Tubes 16-pin SOIC -40 to +85 ° C 307M-02ILFT 307M-02ILF Tape and Reel 16-pin SOIC -40 to +85 ° C INDEX AREA 1 2 D E SEATING PLANE A e - C - B .10 (.004) C C L H h x 45 Millimeters Inches Symbol Min Max Min Max A 1.35 1.75 .0532 .0688 A1 0.10 0.25 .0040 .0098 B 0 . 3 30 . 5 1. 0 1 3. 0 2 0 C 0.19 0.25 .0075 .0098 D 9.80 10.00 .3859 .3937 E 3.80 4.00 .1497 .1574 e 1.27 BASIC 0.050 BASIC H 5.80 6.20 .2284 .2440 h 0 . 2 50 . 5 0. 0 1 0. 0 2 0 L 0 . 4 01 . 2 7. 0 1 6. 0 5 0 α 0° 8° 0° 8°

© 2011 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, ICS and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names a nd marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA Corporate Headquarters Integrated Device Technology, Inc. www.idt.com www.idt.com/go/clockhelp For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Innovate with IDT and accelerate your future networks. Contact: www.IDT.com ICS307-02 SERIALLY PROGRAMMABLE CLOCK SOURCE SER PROG CLOCK SYNTHESIZER

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