2AS01

ICE2AS01_06 INFINEON | Alldatasheet

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Off-Line SMPS Current Mode Controller Never stop thinking. Power Management & Supply Datasheet, Version 2.1, 30 Jun 2006

Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München © Infineon Technologies AG 1999. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted charac- teristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infi- neon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representat ives worldwide: see our webpage at http:// www.infineon.com CoolMOS™, CoolSET™ are trademarks of Infineon Technologies AG. ICE2AS01/S01G ICE2BS01/S01G Revision History: 2006-06-30 Datasheet Previous Version: V2.0 Page Subjects (major changes since last revision) 3,5,15,23 update to PB-free package We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: mcdocu.comments@infineon.com

ICE2AS01(G) / ICE2BS01(G) Snubber Power Management Protection Unit Soft-Start Control PWM Controller Current Mode FB 85 ... 270 VAC Feedback Feedback Typical Application Low Power StandBy Precise Low Tolerance Peak Current Limitation RSense Isense GND SoftS Gate Off-Line SMPS Current Mode Controller Product Highlights

• Enhanced Protect ion Functions all with Auto Restart
• Lowest Standby Power Dissipation
• Very Accurate Current Limiting
• PB-free Plating and RoHS compliant

Features

• Only few external Components required
• Input Undervoltage Lockout
• 67kHz/100kHz fixed Switching Frequency
• Max Duty Cycle 72%
• Low Power Standby Mode to support “Blue Angel” Norm
• Latched Thermal Shut Down
• Overload and Open Loop Protection
• Overvoltage Protection during Auto Restart
• Adjustable Peak Curr ent Limitation via External Resistor
• Overall Tolerance of Current Limiting < ±5%
• Internal Leading Edge Blanking
• Soft Start
• Soft gate driving for Low EMI

Description

This stand alone controller provides several special enhancements to satisfy the needs for low power standby and protection features. In standby mode frequency reduction is used to lower the power consumption and provide a stable output voltage in this mode. The frequency reduction is limited to 20kHz / 21.5 kHz (typ.) to avoid audible noise. In case of failure modes like open loop, overvoltage or overload due to short circuit the device switches in Auto Restart Mode which is controlled by the internal protection unit. By means of the internal precise peak current limitation the dimension of the transformer and the secondary diode can be lower which leads to more cost efficiency.

Figure 1 Pin Configuration (top view)

1.2 Pin Functionality

SoftS (Soft Start & Auto Restart Control) This pin combines the function of Soft Start in case of Start Up and Auto Restart Mode and the controlling of the Auto Restart Mode in case of an error detection. FB (Feedback) The information about the regulation is provided by the FB Pin to the internal Protection Unit and to the internal PWM-Comparator to control the duty cycle. Isense (Current Sense) The Current Sense pin senses the voltage developed on the series resistor insert ed in the source of the external Power Switch. When Isense reaches the internal threshold of the Current Limit Comparator, the Driver output is disabl ed. By this mean the Over Current Detection is realized. Furthermore the current information is provided for the PWM-Comparator to realize the Current Mode. Gate (Driver Output) The current and slew rate capability of this pin are suited to drive Power MOSFETs. VCC (Power supply) This pin is the positive supply of the IC. The operating range is between 8.5V and 21V. To provide overvoltage protection the driver gets disabled when the voltage becomes higher than 16.5V during Start up Phase. GND (Ground) This pin is the ground of the primary side of the SMPS.

1.1 Pin Configuration

1 N.C. Not connected

2 SoftS Soft Start & Auto Restart Control

3 FB Regulation Feedback

4 Isense Controller Current Sense Input

5 Gate Driver Output

6 VCC Controller Supply Voltage

7 GND Controller Ground

8 N.C. Not connected GNDSoftS FB Isense N.C. VCC N.C. Gate Package PG-DIP-8 G-Package PG-DSO-8

1 Pin Configuration and Functionality

Representative Blockdiagram Datasheet 6 30 Jun 2006

2 Representative Blockdiagram

Tj >140°C Internal Bias Voltage Reference 6.5V 4.8V Leading Edge Blanking 200ns Undervoltage Lockout Oscillator Duty Cycle max Current-Limit Comparator x3.65 Soft-Start Comparator Current Limiting PWM OP Improved Current Mode Soft Start 13.5V 8.5V 6.5V 16.5V 4.0V RFB 6.5V Protection Unit Power-Down Reset Power-Up Reset Power Management CSoft-Start CVCC RStart-up85 ... 270 VAC CLine VCC GND Converter DC Output VOUT ICE2AS01(G) / ICE2BS01(G) Optocoupler Snubber Spike Blanking 5µs PWM Comparator R SQ Q Error-Latch 5.3V 4.8V RSoft-Start Gate Driver G3G2 SoftS 5.3V Vcsth Propagation-Delay Compensation R S Q Q PWM-Latch 0.72 Clock UFB fosc fnorm fstandby Standby Unit FB 4.0V RSense Gate Isense 0.8V 0.3V 5.6V 10kΩ Frequency in Normal Mode fnorm: ICE2BS01(G) ICE2AS01(G) 67kHz 100kHz Frequency in Standby Mode fstandby: 20kHz 21.5kHz

3 Functional Description

3.1 Power Management

The Undervoltage Lockout monitors the external supply voltage V VCC. In case the IC is inactive the current consumption is max. 55µA. When the SMPS is plugged to the main line the current through R Start-up charges the external Capacitor C VCC. When V VCC exceeds the on-threshold VCCon=13.5V the internal bias circuit and the voltage reference are switched on. After it the internal bandgap generates a reference voltage V REF=6.5V to supply the internal circuits. To avoid uncontrolled ringing at switch-on a hysteresis is implemented which means that switch-off is only after active mode when Vcc falls below 8.5V. In case of switch-on a Power Up Reset is done by reseting the internal error-latch in the protection unit. When VVCC falls below the off-threshold VCCoff=8.5V the internal reference is switched off and the Power Down reset let T1 discharging the soft-start capacitor CSoft-Start at pin SoftS. Thus it is ensured that at every switch-on the voltage ramp at pin SoftS starts at zero.

3.2 Improved Current Mode

Current Mode means that the duty cycle is controlled by the slope of the primary current. This is done by comparison the FB signal with the amplified current sense signal. Figure 5 Pulse Width Modulation In case the amplified current sense signal exceeds the FB signal the on-time T on of the driver is finished by reseting the PWM-Latch (see Figure 5). Internal Bias Voltage Reference 6.5V 4.8V Undervoltage Lockout 13.5V 8.5V Power-Down Reset Power-Up Reset Power Management 5.3V 4.0V PWM-Latch R S Q Q Error-LatchSoftS 6.5V Error-Detection VCC Main Line (100V-380V) Primary Winding Soft-Start Comparator CVCC RSoft-Start RStart-Up CSoft-Start x3.65 PWM OP Improved Current Mode 0.8V PWM Comparator PWM-Latch Isense FB R S Q Q Driver Soft-Start Comparator t FB Amplified Current Signal Ton t 0.8V Driver

The primary current is sensed by the series resistor RSense inserted in the source of the external Power Switch. By means of Current Mode the regulation of the secondary voltage is insensitive on line variations. Line variation causes variation of the increasing current slope which controls the duty cycle. The external R Sense allows an individual adjustment of the maximum source current of the external Power Switch. Figure 6 Improved Current Mode To improve the Current Mode during light load conditions the amplified current ramp of the PWM-OP is superimposed on a voltage ramp, which is built by the switch T 2, the voltage source V 1 and the 1st order low pass filter composed of R 1 and C 1 (see Figure 6, Figure 7). Every time the oscillator shuts down for max. duty cycle limitation the switch T2 is closed by V OSC. When the oscillator triggers the Gate Driver T2 is opened so that the voltage ramp can start (see Figure 7). In case of light load the amplified current ramp is to small to ensure a stable regulation. In that case the Voltage Ramp is a well defined signal for the comparison with the FB-signal. The duty cycle is then controlled by the slope of the Voltage Ramp. By means of the C5 Comparator the Gate Driver is switched-off until the voltage ramp exceeds 0.3V. It allows the duty cycle to be reduced continuously till 0% by decreasing V FB below that threshold. Figure 7 Light Load Conditions

3.2.1 PWM-OP

The input of the PWM-OP is applied over the internal leading edge blanking to th e external sense resistor RSense connected to pin ISense. R Sense converts the source current into a sense voltage. The sense voltage is amplified with a gain of 3.65 by PWM OP. The output of the PWM-OP is connected to the voltage source V1. The voltage ramp with the superimposed amplified current signal is fed into the positive inputs of the PWM- Comparator, C5 and the Soft-Start-Comparator.

3.2.2 PWM-Comparator

The PWM-Comparator compares the sensed current signal of the external Power Switch with the feedback signal VFB (see Figure 8). VFB is created by an external optocoupler or external tran sistor in combination with the internal pullup resistor R FB and provides the load information of the feedback circuitry. When the amplified current signal of the external Power Switch exceeds the signal V FB the PWM-Comparator switches off the Gate Driver. x3.65 PWM OP 0.8V 10kΩ Oscillator PWM Comparator 20pF FB PWM-Latch 0.3V Gate Driver Voltage Ramp VOSC Soft-Start Comparator t t VOSC 0.8V FB Gate Driver Voltage Ramp t max. Duty Cycle 0.3V

3.3 Soft-Start

The Soft-Start is realized by the internal pullup resistor RSoft-Start and the external Capacitor C Soft-Start (see Figure 2). The Soft-Start voltage VSoftS is generated by charging the external capacitor CSoft-Start by the internal pullup resistor R Soft-Start. The Soft-Start-Comparator compares the voltage at pin SoftS at the negative input with the ramp signal of the PWM-OP at the positive input. When Soft-Start voltage V SoftS is less than Feedback voltage VFB the Soft-Start-Comparator limits the pulse width by reseting the PWM-Latch (see Figure 9). In addition to Start-Up, Soft-Start is also activated at each restart attempt during Auto Restart. By means of the above mentioned C Soft-Start the Soft-Start can be defined by the user. The Soft-Start is finished when VSoftS exceeds 5.3V. At that time the Protection Unit is activated by Comparator C4 and senses the FB by Comparator C3 wether the voltage is below 4.8V which means that the voltage on the secondary side of the SMPS is settled. The internal Zener Diode at SoftS with breakthrough voltage of 5.6V is to prevent the internal circuit from saturation (see Figure 10). Figure 10 Activation of Protection Unit The Start-Up time T Start-Up within the converter output voltage VOUT is settled must be shorter than the Soft- Start Phase TSoft-Start (see Figure 11). By means of Soft-Start there is an effective minimization of current a nd voltage stresses on the external Power Switch, the clamp circuit and the output overshoot and prevents satu ration of the transformer during Start-Up. x3.65 PWM OP Improved Current Mode PWM Comparator Isense Soft-Start Comparator 6.5V PWM-Latch 0.8V FB Optocoupler RFB t 5.3V VSoftS Gate Driver t TSoft-Start 5.6V 6.5V RFB 6.5V Power-Up Reset 5.3V 4.8V RSoft-Start FB R S Q Q Error-Latch R S Q Q PWM-Latch Clock Gate Driver 5.6V SoftS 69,1×= StartSoft StartSoft StartSoft R TC

3.4 Oscillator and Frequency

3.4.1 Oscillator

The oscillator generates a frequency fswitch = 100kHz. A resistor, a capacitor and a current source and current sink which determine the frequency are integrated. The charging and discharging cu rrent of the implemented oscillator capacitor are intern ally trimmed, in order to achieve a very accurate switching frequency. The ratio of controlled charge to discharge current is adjusted to reach a max. duty cycle limitation of D max=0.72.

3.4.2 Frequency Reduction

The frequency of the oscillator is depending on the voltage at pin FB. The dependence is shown in Figure 12. This feature allows a power supply to operate at lower frequency at light loads thus lowering the switching losses while maintaining good cross regulation performance and low output ripple. In case of low power the power consumption of the whole SMPS can now be reduced very effective. The minimal reachable frequency is limited to 20kHz / 21.5 kHz to avoid audible noise in any case. Figure 12 Frequency Dependence

3.5 Current Limiting

There is a cycle by cycle current limiting realised by the Current-Limit Comparator to provide an overcurrent detection. The source current of the external Power Switch is sensed via an external sense resistor RSense. By means of RSense the source current is transformed to a sense voltage V Sense. When the voltage V Sense exceeds the internal threshold voltage V csth the Current-Limit-Comparator immediately turns off the gate drive. To prevent t he Current Limiting from distortions caused by leading edge spikes a Leading Edge Blanking is integrated at the Current Sense. Furthermore a Propagation Delay Compensation is added to support the immediate shut down of the Power Switch in case of overcurrent.

3.5.1 Leading Edge Blanking

Figure 13 Leading Edge Blanking Each time when the external Power Switch is switched on a leading spike is generated due to the primary-side capacitances and secondary-side rectifier reverse t t VSoftS t 5.3V 4.8V TSoft-Start VOUT VFB VOUT TStart-Up fstandby fnorm 1,0 1,1 1,2 1,3 1,4 1,5 1,6 1,7 1,8 1,9 2 FBV V kHzOSCf fnorm: ICE2BS01(G) ICE2AS01(G) 67kHz 100kHz fstandby: 20kHz 21.5kHz t VSense Vcsth tLEB = 220ns

recovery time. To avoid a premature termination of the switching pulse this spike is blanked out with a time constant of t LEB = 220ns. During that time the output of the Current-Limit Comparator cannot switch off the gate drive.

3.5.2 Propagation Delay Compensation

In case of overcurrent detection the shut down of the external Power Switch is delayed due to the propagation delay of the circuit. This delay causes an overshoot of the peak current I peak which depends on the ratio of dI/dt of the peak current (see Figure 14). Figure 14 Current Limiting The overshoot of Signal2 is bigger than of Signal1 due to the steeper rising waveform. A propagation delay compens ation is integrated to bound the overshoot dependent on dI/dt of the rising primary current. That means the propagation delay time between exceeding the current sense threshold V csth and the switch off of the external Power Switch is compensated over temperat ure within a range of at least So current limiting is now capable in a very accurate way (see Figure 16). E.g. Ipeak = 0.5A with R Sense = 2. Without propagation delay compensation the current sense threshold is set to a static voltage level V csth=1V. A current ramp of dI/dt = 0.4A/µs, that means dVSense/dt = 0.8V/µs, and a propagation delay time of i.e. t Propagation Delay =180ns leads then to an Ipeak overshoot of 14.4%. By means of propagation delay compensation the overshoot is only about 2% (see Figure 15). The propagation delay compensation is done by means of a dynamic threshold voltage Vcsth (see Figure 15). In case of a steeper slope the switch off of the driver is earlier to compensate the delay. Figure 15 Dynamic Voltage Threshold V csth Figure 16 Overcurrent Shutdown

3.6 PWM-Latch

The oscillator clock output applies a set pulse to the PWM-Latch when initiating the external Power Switch conduction. After setting the PWM-Latch can be reset by the PWM-OP, the Soft-Start-Comparator, the Current-Limit-Comparator, Comparator C3 or the Error-Latch of the Protection Unit. In case of reseting the driver is shut down immediately.

3.7 Driver

The driver is a fast totem pole gate drive, which is designed to avoid cross conduction currents and which is equipped with a Zener diode Z1 (see Figure 17) in order to improve the control of the gate attached power t ISense ILimit tPropagation Delay IOvershoot1 Ipeak1 Signal1Signal2 IOvershoot2Ipeak2 dt dV dt dIR Sensepeak Sense 10 ≤×≤ t Vcsth VOSC Signal1 Signal2 VSense Propagation Delay max. Duty Cycle off time t 0,9 0,95 1,05 1,1 1,15 1,2 1,25 1,3 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2 with compensation without compensation dt dVSense s V µ SenseV V

transistors as well as to protect them against undesirable gate overvoltages. Figure 17 Gate Driver At voltages below the under voltage lockout threshold VVCCoff the gate drive is active low. The driver-stage is optimized to minimize EMI and to provide high circuit efficiency. This is done by reducing the switch on slope when reaching the external Power Switch threshold. This is achieved by a slope control of the rising edge at the driver’s output (see Figure 18). Figure 18 Gate Rising Slope Thus the leading switch on spike is minimized. When the external Power Switch is switch ed off, the falling shape of the driver is slowed down when reaching 2V to prevent an overshoot below ground. Furthermore the driver circuit is designed to eliminate cross conduction of the output stage.

3.8 Protection Unit (Auto Restart Mode)

An overload, open loop and overvoltage detection is integrated within the Protection Unit. These three failure modes are latched by an Error-Latch. Additional thermal shutdown is latched by the Error-Latch. In case of those failure modes the Error-Latch is set after a blanking time of 5µs and the external Power Switch is shut down. That blanking prevents the Error-Latch from distortions caused by spikes during operation mode.

3.8.1 Overload & Open loop with normal

Figure 19 Auto Restart Mode Figure 19 shows the Auto Restart Mode in case of overload or open loop with normal load. The detection of open loop or overload is provided by the Comparator C3, C4 and the AND-gate G2 (see Figure20). VCC PWM-Latch Gate t VGate CLoad = 1nF ca. t = 130ns Overload & Open loop/normal load FB t 4.8V 5.3V SoftS 5µs Blanking Failure Detection Soft-Start Phase VCC 13.5V 8.5V t Driver t TRestart TBurst1 t

The detection is activated by C4 when the voltage at pin SoftS exceeds 5.3V. Till this time the IC operates in the Soft-Start Phase. After this phase the comparator C3 can set the Error-Latch in case of open loop or overload which leads the feedback voltage V FB to exceed the threshold of 4.8V. After latching VCC decreases till 8.5V and inacti vates the IC. At this time the external Soft-Start capacitor is discharged by the internal transistor T1 due to Power Down Reset. When the IC is inactive VCC increases till V CCon = 13.5V by charging the Capacitor CVCC by means of the Start-Up Resistor R Start-Up. Then the Error-Latch is reset by Power Up Reset and the external Soft-Start capacitor CSoft-Start is charged by the internal pullup resistor RSoft- Start. During the Soft-Start Phase which ends when the voltage at pin SoftS exceeds 5.3V the detection of overload and open loop by C3 and G2 is inactive. In this way the Start Up Phase is not detected as an overload. But the Soft-Start Phase must be finished within the Start Up Phase to force the voltage at pin FB below the failure detection threshold of 4.8V.

3.8.2 Overvoltage due to open loop with

Figure 21 Auto Restart Mode Figure 21 shows the Auto Restart Mode for open loop and no load condition. In case of this failure mode the converter output voltage increases and also VCC. An additional protection by the comparators C1, C2 and the AND-gate G1 is implemented to consider this failure mode (see Figure 22). RSoft-Start 6.5V CSoft-Start 5.3V 4.8V G2T1 Error-Latch Power Up Reset RFB 6.5V FB SoftS Open loop & no load condition t Driver 13.5V 16.5V FB 4.8V 5µs Blanking Failure Detection 5.3V SoftS 4.0V Overvoltage Detection Phase Soft-Start Phase t t TRestart TBurst2 VCC 8.5V Overvoltage Detection t

Figure 22 Overvoltage Detection The overvoltage detection is provided by Comparator C1 only in the first time during the Auto Restart Mode till the Soft-Start voltage exceeds the threshold of the Comparator C2 at 4.0V and the voltage at pin FB is above 4.8V. When VCC exceeds 16.5V during the overvoltage detection phase C1 can set the Error-Latch and the Burst Phase during Auto Restart Mode is finished earlier. In that case T Burst2 is shorter than TSoft- Start. By means of C2 the normal operation mode is prevented from overvoltage detection due to varying of VCC concerning the regulation of the converter output. When the voltage VSoftS is above 4.0V the overvoltage detection by C1 is deactivated.

3.8.3 Thermal Shut Down

Thermal Shut Down is latched by the Error-Latch when junction temperature T j of the pwm controller is exceeding an internal threshold of 140°C. In that case the IC switches in Auto Restart Mode. Note: All the values which are mentioned in the functional description are typical. Please refer to Electrical Characteristics for min/max limit values. 6.5V CSoft-Start VCC RSoft-Start 16.5V 4.0V SoftS Error Latch Power Up Reset

Electrical Characteristics

4 Electrical Characteristics

4.1 Absolute Maximum Ratings

Note: Absolute maximum ratings are defined as ratings , which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 6 (VCC) is discharged before assembling the application circuit.

4.2 Operating Range

Note: Within the operati ng range the IC operates as described in the functional description. Parameter Symbol Limit Values Unit Remarks min. max. VCC Supply Voltage VCC -0.3 22 V FB Voltage V FB -0.3 6.5 V SoftS Voltage V SoftS -0.3 6.5 V ISense I Sense -0.3 3 V Junction Temperature Tj -40 150 °C Controller & CoolMOS Storage Temperature TS -50 150 °C Thermal Resistance Junction-Ambient RthJA - 90 K/W PG-DIP-8 Thermal Resistance Junction-Ambient RthJA - 185 K/W PG-DSO-8 ESD Capability1) 1) Equivalent to discharging a 100pF capacitor through a 1.5 kΩ series resistor VESD - 2 kV Human Body Model Parameter Symbol Limit Values Unit Remarks min. max. VCC Supply Voltage VCC VCCoff 21 V Junction Temperature of Controller TJCon -25 130 °C limited due to thermal shut down of controller

4.3 Characteristics

Note: The electrical characteristics involve the spread of values guaranteed within the specified supply voltage and junction temperature range TJ from – 25 °C to 125 °C.Typical values represent the median values, which are related to 25°C. If not otherwise stated, a supply voltage of VCC = 15 V is assumed.

4.3.1 Supply Section

4.3.2 Internal Voltage Reference

4.3.3 Control Section

Parameter Symbol Limit Va lues Unit Test Condition min. typ. max. Start Up Current IVCC1 -2 7 5 5 µ A V CC=VCCon -0.1V Supply Current with Inactive Gate IVCC2 -5 . 3 7 m A V SoftS = 0 IFB = 0 Supply Current with Active Gate ICE2AS01/G IVCC3 -6 . 5 8 m A V SoftS = 5V IFB = 0 CGate = 1nF Supply Current with Active Gate ICE2BS01/G IVCC3 -6 7 . 5 m A V SoftS = 5V IFB = 0 CGate = 1nF VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis VCCon VCCoff VCCHY 4.5 13.5 8.5 5.5 V V V Parameter Symbol Limit Values Unit Test Condition min. typ. max. Trimmed Reference Voltage VREF 6.37 6.50 6.63 V measured at pin FB Parameter Symbol Limit Values Unit Test Condition min. typ. max. Oscillator Frequency ICE2AS01/G fOSC1 93 100 107 kHz V FB = 4V Oscillator Frequency ICE2BS01/G fOSC3 62 67 72 kHz V FB = 4V Reduced Osc. Frequency ICE2AS01/G fOSC2 -2 1 . 5 -k H z V FB = 1V Reduced Osc. Frequency ICE2AS01/G fOSC4 -2 0 -k H z V FB = 1V

4.3.4 Protection Unit

4.3.5 Current Limiting

Frequency Ratio fosc1/fosc2 ICE2AS01/G 4.5 4.65 4.9 Frequency Ratio fosc3/fosc4 ICE2BS01/G 3.18 3.35 3.53 Max Duty Cycle Dmax 0.67 0.72 0.77 Min Duty Cycle D min 0- - V FB < 0V PWM-OP Gain AV 3.45 3.65 3.85 Max. Level of Voltage Ramp VMax-Ramp -0 . 8 5 -V VFB Operating Range Min Level V FBmin 0.3 - - V VFB Operating Range Max level V FBmax --4 . 6 V Feedback Resistance R FB 3.0 3.7 4.9 k Ω Soft-Start Resistance R Soft-Start 42 50 62 k Ω Parameter Symbol Limit Values Unit Test Condition min. typ. max. Over Load & Open Loop Detection Limit VFB2 4.65 4.8 4.95 V V SoftS > 5.5V Activation Limit of Overload & Open Loop Detection VSoftS1 5.15 5.3 5.46 V V FB > 5V Deactivation Limit of Overvoltage Detection VSoftS2 3.88 4.0 4.12 V V FB > 5V VCC > 17.5V Overvoltage Detection Limit V VCC1 16 16.5 17.2 V V SoftS < 3.8V VFB > 5V Latched Thermal Shutdown T jSD 130 140 150 °C guaranteed by design Spike Blanking t Spike -5 -µ s Parameter Symbol Limit Values Unit Test Condition min. typ. max. Peak Current Limitation (incl. Propagation Delay Time) (see Figure 7) Vcsth 0.95 1.00 1.05 V dV sense / dt = 0.6V/µs Leading Edge Blanking t LEB -2 2 0 -n s

4.3.6 Driver Section

Parameter Symbol Limit Values Unit Test Condition min. typ. max. GATE Low Voltage VGATE -0 . 9 5 1 . 2 V V VCC = 5 V IGate = 5 mA -1 . 0 1 . 5 V V VCC = 5 V IGate = 20 mA -0 . 8 8 -V I Gate = 0 A -1 . 6 2 . 2 V I Gate = 50 mA -0.2 0.2 - V I Gate = -50 mA GATE High Voltage VGATE -1 1 . 5 -V V VCC = 20V CL = 4.7nF -1 0 -V V VCC = 11V CL = 4.7nF -7 . 5 -V V VCC = VVCCoff + 0.2V CL = 4.7nF GATE Rise Time tr -1 6 0 -n s V Gate = 2V...9V1) CL = 4.7nF 1) Transient reference value GATE Fall Time tf -6 5 -n s V Gate = 9V...2V1) CL = 4.7nF GATE Current, Peak, Rising Edge IGATE -0.5 - - A C L = 4.7nF2) 2) Design characteristics (not meant for production testing) GATE Current, Peak, Falling Edge IGATE --0 . 7 A C L = 4.7nF2)

Typical Performance Characteristics

5 Typical Performance Characteristics

Figure 23 Start Up Current I VCC1 vs. Tj Figure 24 Supply Current I VCC2 vs. Tj Figure 25 Supply Current I VCC3 vs. Tj Figure 26 VCC Turn-On Threshold V VCCon vs. Tj Figure 27 VCC Turn-Off Threshold V VCCoff vs. Tj Figure 28 VCC Turn-On/Off Hysteresis V VCCHY vs. Tj Junction Temperature [°C] Start Up Current IVCC1 [µA] PI-001-190101 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Supply Current IVCC2 [mA] PI-003-190101 4,5 4,8 5,1 5,4 5,7 6,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] VCC Turn-On Threshold VCCon [V] PI-004-190101 13,42 13,44 13,46 13,48 13,50 13,52 13,54 13,56 13,58 - 2 5 - 1 5- 5 5 1 52 53 54 55 56 57 58 59 5 1 0 5 1 1 5 1 2 5 Junction Temperature [°C] VCC Turn-Off Threshold VVCCoff [V] PI-005-190101 8,40 8,43 8,46 8,49 8,52 8,55 8,58 8,61 8,64 8,67 - 2 5 - 1 5- 5 5 1 52 53 54 55 56 57 58 59 5 1 0 5 1 1 5 1 2 5 Junction Temperature [°C] VCC Turn-On/Off Hysteresis VCCHY [V] PI-006-190101 4,83 4,86 4,89 4,92 4,95 4,98 5,01 5,04 5,07 5,10 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125

6 Outline Dimension

(Plastic Dual Small Outline) PG-DIP-8 (Plastic Dual In-line Package)

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