29F52

29F52 FAIRCHILD | Alldatasheet

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■ 8-bit registered transceivers ■ Separate clock, clock enable and 3-STATE output enable provided for each register ■ AMD Am2952/2953 functional equivalents ■ Both inverting and non-inverting options available ■ 24-Pin slimline package Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols 29F52 IEEE/IEC 29F52 29F53 IEEE/IEC 29F53 Order Number Package Number Package Description 29F52SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 29F52SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide 29F53SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide

www.fairchildsemi.com 2 29F52•29F53 Connection Diagrams Pin Assignment for DIP and SOIC 29F52 Pin Assignment for DIP 29F53 Unit Loading/Fan Out Output Control H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = HIGH Impedance N = LOW-to-HIGH Transition NC = No Change Register Function Table (Applies to A or B Register) Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH /IOL A0–A7 A-Register Inputs/ 3.5/1.083 70 µA/0.65 mA B-Register 3-STATE Outputs 150/40 (33.3) −3 mA/24 mA (20 mA) B0–B7 B Register Inputs/ 3.5/1.083 70 µA/0.65 mA A-Register 3-STATE Outputs 600/106.6 (80) −12 mA/64 mA (48 mA) OEA Output Enable A-Register 1.0/1.0 20 µA/−0.6 mA CPA A-Register Clock 1.0/1.0 20 µA/−0.6 mA CEA A-Register Clock Enable 1.0/1.0 20 µA/−0.6 mA OEB Output Enable B-Register 1.0/1.0 20 µA/−0.6 mA CPB B-Register Clock 1.0/1.0 20 µA/−0.6 mA CEB B-Register Clock Enable 1.0/1.0 20 µA/−0.6 mA OE Internal Y-Output FunctionQ 29F52 29F53 H X Z Z Disable Outputs LLL H Enable OutputsLHH L Inputs Internal FunctionDC P C E Q X X H NC Hold Data LNL L Load DataHNL H

3 www.fairchildsemi.com 29F52•29F53 Block Diagrams 29F52

www.fairchildsemi.com 4 29F52•29F53 Block Diagrams (continued) 29F53

5 www.fairchildsemi.com 29F52•29F53 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C VCC Pin Potential to Ground Pin −0.5V to +7.0V Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Current Applied to Output in LOW State (Max) twice the rated I OL (mA) Free Air Ambient Temperature 0 °C to +70°C Supply Voltage +4.5V to +5.5V Symbol Parameter Min Typ Max Units VCC Conditions VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal VCD Input Clamp Diode Voltage −1.2 V Min I IN = −18 mA (Non I/O Pins) VOH Output HIGH 10% V CC 2.5 VM i n IOH = −1 mA (An) Voltage 10% V CC 2.4 I OH = −3 mA (An, Bn) 10% V CC 2.0 I OH = −15 mA (Bn) 5% VCC 2.7 I OH = −1 mA (An) 5% VCC 2.7 I OH = −3 mA (An, Bn) VOL Output LOW 10% V CC 0.5 VM i n IOL = 24 mA (An) Voltage 10% V CC 0.55 I OL = 64 mA (Bn) IIH Input HIGH Current 20 µAM a x V IN = 2.7V (Non-I/O Pins) IBVI Input HIGH Current 100 µAM a x V IN = 7.0V (Non-I/O Pins) Breakdown Test IBVIT Input HIGH Current 1.0 mA Max V IN = 5.5V (An, Bn) Breakdown Test (I/O) IIL Input LOW Current −0.6 mA Max V IN = 0.5V (Non-I/O Pins) IIH + IOZH Output Leakage Current 70 µAM a x V OUT = 2.7V (An, Bn) IIL + IOZL Output Leakage Current −650 µAM a x V OUT = 0.5V (An, Bn) IOS Output Short-Circuit Current −60 −150 mA Max V OUT = 0V (An) −100 −225 V OUT = 0V (Bn) ICEX Output HIGH Leakage Current 250 µAM a x V OUT = VCC (An, Bn) IZZ Bus Drainage Test 500 µA0 . 0 V V OUT = 5.25V (An, Bn) ICCH Power Supply Current 130 190 mA Max V O = HIGH ICCL Power Supply Current 190 mA Max V O = LOW ICCZ Power Supply Current 190 mA Max V O = HIGH Z

www.fairchildsemi.com 6 29F52•29F53 AC Operating Requirements Symbol Parameter TA = +25°CT A = −55°C to +125°CT A = 0°C to +70°C Units VCC = +5.0V V CC = +5.0V V CC = +5.0V C L = 50 pF C L = 50 pF C L = 50 pF Min Typ Max Min Max Min Max ns Symbol Parameter TA = +25°CT A = −55°C to +125°CT A = 0°C to +70°C UnitsVCC = +5.0V V CC = +5.0V V CC = +5.0V Min Max Min Max Min Max tS(H) Setup Time, HIGH or LOW 4.0 4.5 ns tS(L) A n or Bn to CPA or CPB 4.0 4.5 tH (H) Hold Time, HIGH or LOW 2.0 2.5 ns tH (L) A n or Bn to CPA or CPB 2.0 2.5 tS(H) Setup Time, HIGH or LOW 1.0 1.5 nstS(L) CEA or CEB to CPA or CPB 4.0 4.5 tH (H) Hold Time, HIGH or LOW 2.0 2.5 nstH (L) CEA or CEB to CPA or CPB 2.0 2.5 tW (H) Pulse Width, HIGH or LOW 3.0 3.5 ns tW (L) CPA or CPB 3.0 3.5

7 www.fairchildsemi.com 29F52•29F53 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B

www.fairchildsemi.com 8 29F52•29F53 8-Bit Registered Transceiver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide Package Number N24C Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com