28F256

M28F256 STMICROELECTRONICS | Alldatasheet

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STA 7} SGS-THOMSON ? MICROELECTRONICS M28F256 256K (32K x 8, Chip Erase) FLASH MEMORY a = FAST ACCESS TIME: 90ns = LOW POWER CONSUMPTION — Standby Current: 100A Max = 10,000 ERASE/PROGRAM CYCLES = 12V PROGRAMMING VOLTAGE = TYPICAL BYTE PROGRAMMING TIME 10ps (PRESTO F ALGORITHM) a" m= ELECTRICAL CHIP ERASE IN 1s RANGE E cial = INTEGRATED ERASE/PROGRAM STOP. 1 TIMER » EXTENDED TEMPERATURE RANGES POIPS2 (6) Puce (C) Figure 1. Logic Diagram

DESCRIPTION

The M28F256 FLASH Memory Is a non-volatile memory which may be erased electrically at the chip level and programmed byte-by-byte. It is or- ganised as 32K bytes of 8 bits. It uses acommand register architecture to select the operating modes Voc Vpp and thus provides a simple microprocessor inter- face The M28F256 FLASH Memory is suitable for applications where the memory has to be repro- 15 8 grammed in the equipment. The access time of 700ns makes the device suitable for use in high AO-A14 ILY K > 0aQ0-Da7 speed microprocessor systems. W—d wmesras6 Table 1. Signal Names Ez re

Table 2. Absolute Maximum Ratings periods may affect device reliability Refer also to the SGS-THOMSON SURE Program and other relevant quality documents. and programming. These functions are managed able, Electronic Signature Read and Standby). the voltage applied to the Vee, program voltage, Program operations.

Table 3. Operations “

2 Refer also to the Command Table

Table 4. Electronic Signature igh the outputis the device type code. Standby Mode. In the Standby Mode the maxi- —_ may also be accessed in Read/Write modes.

Table 5. Commands data at any location in memory. Read mode is age (Viko) at 2.5V. Electronic Signature Read modeis set-up with one currents until the operations are terminated. address inputs, command input or provide data to starta Verify or Reset Mode operation. matically setting-up Read operations. In addition a to the command register. mand register to 00h for reading the memory.

Figure 3. AC Testing Input Output Waveforms DEVICE Table 6. Capacitance" (Ta =25 °C, f=1 MHz ) correct erase and programming algorithms for on- dressed byte. . 1 yy writing that all bits of the addressed byte are fully erased. Erase command then erases them to OFFh. The a second read cycle.

Table 7. DC Characteristics

Table 8A. Read Only Mode AC Characteristics (Ta = 0 to 70 °C, —40 to 85 °C, —40 to 125 °C; Vec = 5V + 5% or 5V + 10%; OV < Vep < 6.5V) fore [wf mm | ve ae mene jewel ol [el [l= Chip Enable Low to Ge aprme [ew [eo] [eo] [el [el apasere [aw [ [=| fw[ fol Output Enable Low to =. agers [ew [fo] fo] [el fel es CI Chip Enable High to a. ene fase | em [ote l ele [e tol Address Transition to Ez s ee Cs Note: 1 Sampled only, not 100% tested Table 8B. Read Only Mode AC Characteristics (Ta =0 to 70 °C, —40 to 85 °C, ~40 to 125 °C; Voc =5V + 5% or 5V + 10%; OV < Vers 6.5V) fmf me ve a_i ip Er to Outpt s ee [Tina [roe [ouputenatie owe oupuvais[ ene | [ss [| eo | ve | pom fo [eames Tewew fol Lot [| Note: 1 Sampled only, not 100% tested SGS-THI 7/20 ee

Figure 7. Electronic Signature Command Waveforms be programmed. The rising edge of W during this bits have been programmed. the set-up of the Program Verify Mode stops the command register (for example Read).

Table 9A. Read/Write Mode AC Characteristics, W and E Controlled (Ta = 0 to 70 °C, —40 to 85 °C or -40 to 125 °C; Voc = 5V + 5% or 5V + 10%; Vep= 12V) [ain [tax | tin [tax | in | max [wen | _[VerHiigh to Chip enabiotow [100 | [roof [oof | ns _| Lemme [Vir High to wite Enable vow [00 [ | 100 | [00 [ [ns _| [twana | we [Write oyeetine sf 90 | [too | [off ne | [wm | tas [Address Vatdto witetnablocow | o | | o | [o [| rs _| [iver Aes vatato chip Enablotow [0 | [o] | ol | vs | [imac | tax | Wte Enable Low to Address Transtion | as | [so | [eo | | ns _| [ter [Lip Enable tow to Adress Transiton [50 | | oo | | so [| ns _| [tam | tes [Chin Enabiotowtowrtecnabiotow [5 | [15 | [ao | | ns | [ime] [wie enable Lowe chipEnabiotow —[-o | | o| | ol | ms | [Teme [ouput enatiighio watecrabieuw [of | o | [o|[ | ws | [ism | [ouputeraverighi cipenavetom {0 [fof To [Tw | [omnes [pst vaiso wneenmosrign fe | fo | sof | m | Foe [seve crn enaorin [0s [ [ao [Po [Tos | Write Enable Low to Write Enable High Fm | ow [eamegtomewrenneiis | us | [mo || wo || | Pe | learegmmmrere Tel [~ [fe | To [twwox | ton [Wee Enable High woinput Transtion [10 [ [wo | [of | ns_| [tex |__| Chip Enable Highto Input Transiion | vo | [0 | | wo [ns [inns | | Duration of ProgramOperaion tas | [es | [est | us | [tenn |_| Duration ot ProgramOperatin [25 | [es] [es] | us | [tse | | Duration ofErase Operation st os | es] [es | | ms _| [twwen | ton _[Wete Enable HightoCripenabierign | 0 | [0 | | o | | ns | [tem |_| chin Enable tighto witeenable tin | o | [ o | | o [| ns _| [none [tum [wte Enable High oie nabioLow [ao [| 20 | | 20 | | ns _| iets] [ote neble Highte Cnn Erabiotow | 20 | [20] || | ns | [twcr |__| Wee Enabie High tooutputenabietow | 6 | [6 [ | 6 { | us | [ tex. | [Chip Enableighto Oupuerablouow | 6 | | 6 | [6 | | ws | | wov | taco [Addess Vato data outpt || so | [ ao0 | f vz0 | ns _| [tox | tz [Chip EnabletowtoOutputTranstion | 0 [ [0 [fo | | ns | | taov | toe | ChpEnabletowtoouputvaia || 9 || too [ [rz | ns _| [raw [soz [Ouputeratiotow oun ranstin | o | [of [ol | rs | [ tacv | toe [Output Erabletowiooupuvaid | | a5 | [as | so | ns _| [eur [fori Enable Hghto oumainz | | 0] [so | | so | rs | [towce™ | tor [OupmEnabiorightooupaniz | | 20 | [a0 | | 30 | ns _| [tax [ton [rsress Trnotonto GuputTarsten [oT [ol [el] | m | Notes: 1. Sampled only, not 100% tested — — 2 AWrite is enabled by a valid combination of Chip Enable (E) and Write Enable (W) When White ts controlled by Chip Enable (with a Chip Enable pulse width smaller than ‘Wnite Enable), all mings should be measured relative to Chip Enable waveform

Table 9B. Read/Write Mode AC Characteristics, W and E Controlled (Ta =0 to 70 °C, —40 to 85 °C or —40 to 125 °C; Voc = SV + 5% or 5V + 10%; Vep= 12V) [wears | oom | | Parameter ea | [main [wax [ on | ox | Pie verignciperatwiw Po Poo [Ys | [ie tignownteznabe tow two PPro Tf | ee [wiecyeotie ao P| Ti [adsess Vaktowitecravetw tO | fo fe eT ass vaio criverapouow it ot Lo | te | La Hin [Wwe nate owioasiess Tenant {Too [Ls | LET Tonip erate tow taaieseTenstton oo | [eo ff we | [Tien [cise] Crip Enable Lowiowteeabietow | 20 || 20 | [| ss | Se Two crave tow crinenanerw iP of fo | te | [oun enaverihiowawerbetw to | Te [Ps | Topi enairighto renin to | To [ts | ee a a Tinprvaite crip Eraborign to {Lo | | ee ae [ ie erabe tonto wie Enaborign watwruse) | eo | [reo | [rs | ST crip Enable Lown Chip Eadie igh witoPuse) [70 | | 70 | | rs | Team Lite Ene ighiora tension to | [vo | oe | ee [vs _| et BuratonoPregamopeaion ites [tes fe | ee} —T pursion ot Progam perain it es [fess | [eT uration otiass Operon it 8s | fas {| os | Ter wite crave righ ocnpensbonis | OP oT | eT Tenn eran tigntowetocnaniorign | ot fo fs een [witeEnobetightowntecravetow | ao | [ao | | me | [eT chip Enable ighto Ghérabetow to [ao | fo | [wate crac ign woupuerave tw |e | te | te | ee a So [Tice [toss vat ata una | [Lo |e | Pact [one erate towiv ours Tansion to | fo | |e | Se Tenn enae towwoupavas so [Pao oe TET [ies [ouput enstietow to Gunn Tension to | To | ds ee Live lowenenvetowownvas | ss | fo | TET Torineraverigntoouraiaz | os | foo | eer [oune enaverighiooupanez ts | [a | ne Lr [aatross Tnstonto ua tans Le | Le TT Notes: 1 Sampled only, not 100% tested _ _ 2 AWnite is enabled by a valid combination ‘of Chip Enable (E) and Wate Enable (W) When Wnte is controlled by Chip Enable (with a Chip Enable pulse ‘width smaller than Wnte Enable), all timings should be measured relative to Chip Enable waveform Oo

Figure 8. Erase Set-up and Erase Verify Commands Waveforms, W Controlled

2 FI z go

2 Fa =

Figure 9. Erase Set-up and Erase Verity Commands Waveforms, E Controlled

Figure 10. Program Set-up and Program Verify Commands Waveforms, W Controlled

Figure 11. Program Set-up and Program Verity Commands Waveforms, E Controlled

1 Z 8) 25

3 A 52 an ia

2 Li a ~

Figure 12. Erasing Flowchart Figure 13. Programming Flowchart the data to OFFh fails. If this occurs, the address of margin. from the address of the stored location.

ORDERING INFORMATION SCHEME Example: M28F256 12 X B 1 TR [Seed] [option] -90 90 ns blank = + 10% B PDIP32 1 0t0 70°C TR Tape & Reel 10 100ns X -£8% c PLocs2 3-40 to 125°C Packing 12 120 ns 6 -40 to 85°C 15 150 ns -20 200 ns For alist of available options (Speed, Vcc Tolerance, Package, etc...) refer tothe current Memory Shortform catalogue. For further information on any aspect of this device, please contact the SGS-THOMSON Sales Office nearest to you. < 17/20 iy S8.niosen Be

PDIP32- 32 pin Plastic DIP, 600 mils width sm | [eee] ea Ga Dom po ewe Pos Se Qe a a cc OS a Ca Te OT a Ca ea On [expose P| Ye TT sO es pp ee PDIP32 QVOUNHHE fe — a E BI lB el D Pe oo oe ooo ant ooo oo PDIP Drawing Is not to scale 18/20 -) yeeo gg SS THOMSON ee

PLCC32 - 32 lead Plastic Leaded Chip Carrier, rectangular oe pe et ae a ee | | ise ere ee ae a ee a ee ee ee ae a ee es ae Oe ee eee a ae ee PLCC32 D | 7 Al a - at ST can aN . ° 0 <a a oe =) io ! rtd H e Ne! E| D2/E2 H B an f rid (] a -cor-5 = PLoc [Sjcr} Drawing 1s notto scale ‘/ Ses THOM z ee

Information furnished ts believed to be accurate and reliable However, SGS-THOMSON Microelectronics assumes no responsibility for the Consequences of use of such informationnor for any mfringement of patents or other nghts of third parties which may resut from tts use No license is granted by implication or otherwise under any patent orpatent nights of SGS-THOMSON Microelectronics Spectications mentoned in this publication are subject to change without notice This publication supersedes and replaces all information previously supplied ‘SGS-THOMSON Microelectronics products are not authorized for use ae cntical components in ite support devices or systems withoutexpress written approval of SGS-THOMSON Microelectronics © 1996 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - ‘Singapore - Spain - Sweden - ‘Switzerland - Taiwan - Thailand - United Kingdom -U S A 20/20 k SGS-1 a S6S;THOMSON TT