27C64A PHILIPS | Alldatasheet
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Philips Components-Signetics 27C64A JecnNo, [oroao i 64K-bit CMOS EPROM (8K x 8) [Date of Issue [November 12, 1990 sinus [Prd pectin Memory Products. DESCRIPTION FEATURES PIN CONFIGURATIONS Philips Components—Signetics 27C64A —_e Low power consumption FA,N CMOS EPROM is a 65,536-bit 5V read. __ 4901 maximum CMOS standby 'A, N Packages only memory organized as 8,192 words current vee GH bis} Voc of 8 bits each. It employs advanced . =e CMOS circuitry for systems requiring ° High-performance speed . ae a = “e low power, high-performance speeds, — 90ns maximum access time a’ and immunity to noise. The 27C64A has @ Noise immunity features al fs)» anon-multiplexed addressing interface = £10% Voc tolerance a Gl pa ae and is configured in the JEDEC = Maximum latch-up immunity through uel _ [23) ars standard EPROM pinout. Epitaxial processing af ( \\ [23] OE Quick-pulse programming is employed ~—@ Quick-pulse programming algorithm a \\__/ Bla on plastic devices which may speed up a» [20] CE programming by as much as one PTIO! » ho [19] 07 hundred times. In the absence of PIN DESCRI N oo [i] fia] o8 quick-pulse programming equipment, [ Ao-A12~ | Addresses | of EF) os the intelligent programming algorithm may be utilized. [OE | Output Enable | hea | = ba c ap os The 27C64A is available in windowed |_ce____| ChipEnable___ | Ceramic DIP, the Plastic DIP andthe = [NC PLCC packages. This devicecanbe | GND [Ground programmed with standard EPROM Program voltage programmers. [du | DontUse [FEM | Program sircbe__| APackage AT A12 Vpp DU Voc PGE NC BLOCK DIAGRAM fo) fs) (2) [1] foal By) Bol DATA OUTPUTS. asf] f2s] as mu] p27) att Ad ‘OUTPUT ENABLE sf pa} ne i rom PROGRAMMING LOGIC az(e) p25) OE : te (CHIP ENABLE af a) A10 woul i) CE we [12 2] O7 oo Ey os | bg ES be LF be be eet, 01 G8 GND DU Os O4 08 O-AI2 XDECODE ADORESS INPUTS: Philips Components S PHILIPS
Philips Components-Signetics Memory Products Product Specification rr enone Memory Promas Product Specification 64K-bit CMOS EPROM (8K x 8) 27C64A eee READ MODE: data from the output pins. Data is availableat ~STANDBY MODE The 27C64A has two control functions, both _—the outputs after a delay of tog from the The 27C64A has a standby mode which of which must be logically active in order to _fallling edge of DE, assuming that CE has reduces the maximum Voc current to 100A. obtain data at the outputs. Chip Enable (CE) been low and addresses have been stable for jt is placed in the Standby mode when CE is is the power control and should be used for at least acc - toe. in the High state. When in the Standby mode, device selection. Output Enable (OE) is the the outputs are in a high-impedance state, output control and should be used to gate independent of the OE input.
ORDERING INFORMATION
| COMMERCIAL | [| Automotive | BTOSAA ZEA 27064112 FA 27O64AA12 FA 7 . “ i 27C64A-12 1 Bein Ceramic Dual In-Line with quartz window 27C64A-15 FA 27CB4AN15 FA 27C64AA15 FA " 27C64A-17 FA 27C64A120 FA 27C64AA20 FA 27C64A-20 FA piisorert OGAAL12 N 27064AA12 N . ‘ 27C64A-12 N 27 een Plastic Dual In-Line 27C64A-15 N 27C64Al15 N 27C64AA15 N 27C64A-17 N 27C64A120 N 27C64AA20 N 27C64A-20 N eer 112A 27CB4AA12 A " n . . 27C64A-12A 27C64Al S2-Pin Plastic Loaded Chip Cerrior 27064015 A 27664115 A 27CB4AA15 A 27C64A-17 A 270644120 A 27C64AA20 A 27C64A-20 A ABSOLUTE MAXIMUM RATINGS! [syweot [PARAMETER STSCI Storage temperature range Vola np ar opt ates 0 A ug io eo an) Vata on Vor (Ou regraring Supply voltage? NOTES: 1. Stresses above those listed under “Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied, Exposure to absolute maximum rating conditions for extended periods may affect device reliabiity 2. All voltages are with respect to network ground. DEVICE OPERATION" OPERATING TEMPERATURE RANGE |_wove [ce [ oe [raw | vot [oureurs] [parameter | —_=RATINGCO) to +70 Coy a oe sty [va 96 [ves [i] | Smtr aa: Ta NOTES: AUTOMOTIVE 1. All voltages are with respect to network ground, -40 to +125 2. Vpp may be one diode voltage drop below Voc, and can be con- nected directly to Veo. 3. Xcan be Vy or Vy. November 12, 1990 2
Philips Components-Signetics Memory Products Product Specification 64K-bit CMOS EPROM (8K x 8) 27C64A DC ELECTRICAL CHARACTERISTICS Over operating temperature range, +4.5V < Voc < +5.5V SYMBOL TEST CONDITIONS Lars [win [tes | max | [iw [lewtage vanes om oT | A a YA OCT EC a [uo [eestage Te teva vowr=saveveo Te TT Ta | [os [tonsresin® urea | 00m | CS a 2h Sundiy MOSinge® [ave | dT 00 Ti = Ts [ic [on ry a Se Hh (OHO) [roo Ven | Ten +02 |v a (Gperang [veo-07 [| ver |v Ce a 1 TO a 2 Capacitance? Tarn = 25°C a a | 2. All voltages are with respect to network ground. | 3. Typical limits are at Voc = 5V, Tarp = 25°C. 4, TTLinputs: Spec Vi, Vx levels. | CMOS inputs: GND + 0.2V to Voc + 0.2V. 5. TE is Voc + 0.2V. All other inputs can have any value within spec. 6. Maximum active power usage is the sum of Ip + log and is measured at a frequency of 11.1MHz. 7. Test one output at a time, duration should not exceed 1 second. 8. Vpp may be one diode voltage drop below Vcc, and can be connected directly to Voc. ‘9. Guaranteed by design, not 100% tasted. | November 12, 1990 3
- Guaranteed by design, not 100% tested.
- UE may be delayed up to tce - tog after the falling edge of CE without impact on tce.
Figure 1. Test Configuration
Philips Components—Signetics Memory Products Product Specification 64K-bit CMOS EPROM (8K x 8) 27C64A PROGRAMMING INFORMATION ERASURE CHARACTERISTICS ‘The identifier information for Signetics Complete programming system specifications The erasure characteristics of the 27C64A 270640 is as follows: for both the intelligent programming method are such that erasure begins to occur upon When AO = Vi. and for the quick-pulse programming method —_exposure to light with wavelengths shorter data is “Manufacturer 152%) are available upon request from Signetics than approximately 4000 Angstroms (A). It When AO = Vij Memory Marketing. should be noted that sunlight and certain data is "Product" OBjuex ‘Signetics encourages the purchase of bined pained ‘heap Dota chews et Programming reliability is also ensured as the programming eatuipment from e manufechvTeT constant exposure to room level fuorescent incremental program margin of each byte is who hase tui ibe ne mo lighting could erase the typical 27C64A in continually monitored to determine when it . Signetics also encourages the approximately three years, while it would take has been successfully programmed. The manufacturers of EPROM programming i ramming algorithm utilizes two different vipment to submit their ceummont fer approximately one week to cause erasure Programming algor Watitoation of elochtoal peramnatore and when exposed to direct sunlight. If the pulse types: initial and overprogram. The ication of electrical parameters 27C64A is to be exposed to these types of |-_-duration of the initial PGM pulse(s) is 1ms, Programming procedures. Information on lighting conditions for extended periods of which is then followed by a longer facturers offering equipment certified by {NMG is an iterati manus sed time, opaque labels should be placed over ‘overprogram pulse of 3Xms. X is an iteration Signotics is available upon request from the window to prevent unintentional erasure. counter and is equal to the number of the Signetics. initial 1ms pulses applied to a particular To 27GStA te orpoeur to ehormmave fl before a i Upto - location ore B comme ¢ PROGRAMMING THE 27C84A violt ight which has awavelongth of 2697 pesare ee cunipeogram putt ie apolod Caution: Exceeding 14.0V on Vpp Pin may Angstroms (A). The integrated dose (i.¢., UV cu a permanently damage the 270644. intensity x exposure time) for erasure should When the intelligent programming cycle has ; . . be minimum of 15Wsec/cm?. The erasure been completed, all bytes should be compared Initially, all bits of the 27C64A are in the “1” time with this dosage is approximately 15 to _t0 the original data source with Vcc = 5.0V state. Data is introduced by selectively 20 minutes using an ultraviolet lamp with a _(refer to the following pages for algorithm speci- Programming °0"s into the desired bit 12,000uWicm? power rating. The 27C64A _ fications). tocations. Although only "0"s will be should be placed within one inch of the lamp _ programmed, both "1"s and “0"s can be tubes during erasure. The maximum Brasent in the data word. integrated dose a 27C64A can be exposedto CMOS NOISE ‘The data to be programmed is applied 8 bits without damage is 7258Wsec/cm? (1 week @ CHARACTERISTICS in parallel to the data output pins. The levels 12000nWicm?). Exposure of these CMOS Special epitaxial processing techniques have required for the address and data inputs are © EPROMSs to high intensity UV light for longer —_ enabled Signetics to build CMOS with standard TTL logic levels. Periods may cause permanent damage. features that add to system reliability. These include input/output protection to latch-up for ‘stresses up to 100mA on Address and Data QUICK-PULSE PROGRAMMING INTELLIGENT PROGRAMMING pins that range from -1V to (Vcc + 1V). In ALGORITHM ALGORITHM addition, the Vpp (Programming) pin is Signetics plastic EPROMs can be ‘The 27C64A intelligent programming Gesigned to resist latch-up to the 14V programmed using the quick-pulse algorithms rapidly program CMOS EPROMs maximum device limit. i Programming algorithm to substantially using an efficient and reliable method | reduce the through-put time in the production _ Particularly suited to the production | environment. This algorithm typically allows programming environment. Actual SIGNETICS DISCOURAGES THE ' plastic devices to be programmed in under programming times may vary due to CONSTRUCTION AND USE OF : four seconds, a significant improvement over _ differences in programming equipment. “HOMEMADE” PROGRAMMING Previous algorithms. Actual programming The intelligent identifier also provides the EQUIPMENT time is a function of the EPROM reading out of a binary code from an EPROM _In order to consistently achieve excellent Programming equipment being used. that will identify its manufacturer and type. programming yields, periodic calibration of ‘The quick-pulse programming algorithm uses _This is intended for use by programming the programming equipment is required. i initial pulses of 100s followed by a byte equipment for the purpose of automatically Consult the equipment manufacturer for the \\ verification to determine when the address ‘Matching the device to be programmed with recommended calibration interval. Signetics i byte has been successfully programmed. Up _its corresponding programming algorithm. warranty for programmability extends only to 10 28 100ys pulses per byte are provided This mode is functional in the 25° + 5°C product that has been programmed on i before a failure is recognized (refer to the ambient temperature range that is required certified equipment that has been serviced to | following pages for algorithm specifications). when programming the 27C64A. To activate the manufacturers recommendation. | this mode, the programming equipment must \\ force 11.5V to 12.5V on address AQ of the 27C64A. Two bytes may then be read from the device outputs by toggling address line AO from Vy. to Vys. The CE, OE and all other address lines must be at Vi, during | interrogation. November 12, 1990 5
Philips Components-Signetics Memory Products Product Specification 64K-bit CMOS EPROM (8K x 8) 27C64A INTELLIGENT PROGRAMMING ALGORITHM DC PROGRAMMING CHARACTERISTICS Tamb = 25°C +5°C, Voc = 6.0V +0.25V, Vpp = 12.5V 40.5V ial a [i tnputcurrent(altinputs) T= VuorVe | Tt TA [ve tnputtowievel(atinputsy fT ot TT [vor | inputtighiovel tw ss [vor | Ouptow kage dug veny [natn | os] [vox | Ouuthighvtage ding wry [wana | a8 J | toce | Vecsuppycurent | 0-15 oma TTL mA Livpe | Vor supply current(program) —[CE=M TTA AC PROGRAMMING CHARACTERISTICS SYMBOL TEST CONDITIONS [sours perp reer eee] [us| Addressseupime TT Ts [oes | OEsompime TCT TCU Cs [os | Ostasoup ine i OS [on | Ostahaine 2 i [ce [OE nh upetat aay om oe [ves | Vepsouptme Pa Os [cs | Vocsomptme PC Ts [ccs | CEsompime | Cd TCTs [ow | CE ial program pusewiah [nowt o08 | 10 [ae | mw | [cow | CE owrvogram puso wath [now | 208 | | 7075 | me] H AC CONDITIONS OF TEST NOTES: 1. Initial program pulse width tolerance is 1ms +5%. 2. The length of the overprogram pulse may vary from 2.85msec to 78.75msec as a function of iteration counter value X. 3 The parameter is only sampled and isnot 100% tested. Output Float is defined as the point where data i no longer drivon ~ see timing 4. During programming, a 0. pf capacitor is required from Vpp to GND node, to suppress voltage transients that can damage the device. November 12, 1990 6
Philips Components—Signetics Memory Products Product Specification 64K-bit CMOS EPROM (8K x 8) 27C64A INTELLIGENT PROGRAMMING ALGORITHM WAVEFORMS PROGRAM procrae. READ VERIFY tas DFP ‘ace Vin 1sv vin ov \\_] sov Voc vi ve vw “> | [I vin rom vu ew ‘OES: ve ve i | November 12, 1990 7
Philips Components-Signetics Memory Products Product Specification 64K-bit CMOS EPROM (8K x 8) 27C64A INTELLIGENT PROGRAMMING ALGORITHM FLOWCHART Ss : {=| ‘WORD ‘WORD i OF 3X meec DURATION. | TO ORIGINAL | DATA, j PASS November 12, 1990 8
Philips Components-Signetics Memory Products Product Specification 64K-bit CMOS EPROM (8K x 8) 27C64A QUICK PULSE PROGRAMMING ALGORITHM DC PROGRAMMING CHARACTERISTICS Tanb = 25°C 45°C, Voc = 6.25V #0.25V, Vpp = 12.75V 20.25V A Input low level (all inputs) a a GT Quiputtow voltage during verity [tu =2tma Tas Ourputhigh voltage during verity | tw 2sma ts | 'oce | Voc suppiycurent toma Tc [ tera __| Ver supply current (program) «2 [vee | Programmingvotage | ts | StS AC PROGRAMMING CHARACTERISTICS ‘SYMBOL PARAMETER TEST CONDITIONS | surs si | MIN, | tvp | Max | [is | Aarons setpine 2 [cs OEsouptme TC TU Us [tos | Datasoupime Te oe a [ tore® | OE high to output float delay Po 30 ns [ves [Versoupine |e |wes | Vocsouptme es | ew | CEiniéal program pulsewian [Now | 095 | 100 | 0.105 | ms | [cow | CE ovrpogran pieewiah | owed eas || 98 | me Loc [datavaidtomoe TC ts H AC CONDITIONS OF TEST ' Input Pulse LeVOIS eee ce ceeeeeeesererreeeesestetettitttiteeetitisttetttoteetersssrersrsss, O48V to 2.4V NOTES: 1. Initial program pulse width tolerance is ims +5%. 2. The length of the overprogram pulse may vary from 2.85msec to 78.75msec as a function of iteration counter value X. ES The parameters only sampled and it not 100% ested. uput Float is definod as tho point whore daa is nolongerciven— se ting ram. 4. During programming, a 0.1 capacitors required from Vpp to GND node, to suppress voltage transients that can damage the device. i November 12, 1990 9
Philips Components—Signetics Memory Products Product Specification 64K-bit CMOS EPROM (8K x 8) 27C64A QUICK PULSE PROGRAMMING ALGORITHM WAVEFORMS PROGRAM ieee READ VERIFY i ‘ace WH 1275v vin wv Co easy Voc on a ve vi “— | TT Vu rom w ow ‘OES: WH ve a November 12, 1990 10
Philips Components-Signetics Memory Products Product Specification 64K-bit CMOS EPROM (8K x 8) 27C64A QUICK PULSE PROGRAMMING ALGORITHM FLOWCHART _ Ss : ‘ONE WORD ‘WORD we Se a ! November 12, 1990 "1
Philips Components~Signetics Memory Products Product Specification 64K-bit CMOS EPROM (8K x 8) 27C64A 28-PIN (600 mils wide) CERAMIC DUAL IN-LINE WITH WINDOW (F) PACKAGE SEE NOTE @ NoTEs: 098 (2.49) " 998 (2.49) 1. Controlling dimension: inches. Milimeters are shown in cond 340 (102) pareathases 2. Dmmensions and tolerancing por ANS! Y14.5M - 1982 ! 3.°T", "D". and "E” are reference datums on the body | and include allowance for glass overtun and meniscus on the seal ine. and lid to base mismatch 4. These dimensions measured wi the leads constained to be perpendicular to plane T wok, 5. Pin numbers start with pin 31 and continue ra % 596 (15.19) ‘counterclockwise to pin #28 when viewed from the top. 7 fo} re (1306) 6. Denotes window location for EPROM products (soo FA eed | package), | | ROY VV VV Try ry | Le vw es 1485 0772) (2-1 es ” 10 (178) 620 (1575) ae 175 (445) 300 san | a5 068) woes | FF —— i 225 (5 72) max. ti \\ al j i A ] 7) —} E Hi if ’ fy ] Teeta.19) i \\ PLANE i Sc ee i} (020 (51) LL so ws2e asc | 015 (38) | woes, 010 (25) 695 (1765) 023 (58) _ gy 7 695.0765) rg Oe) ‘Sony 853-0589 84000 Fa3 28-PIN (600 mils wide) PLASTIC DUAL IN-LINE (N) PACKAGE nores: 1. Contoling dimension: inches, Metric are shown in i Package JEDEC i 2 ‘mensions contorm to specication julseanaloanaweeonanananaeal MS-011-A8 for standard dual in-ine (DIP) package .600 inch row spacing (PLASTIC) 28 loads (issue 8. 7/85) 3, Dimensions and tolerancing per ANSI Y14, 5M-1982. i 4.7", "D" and "€" are relerence datums on the molded body and do not include mold flash or protrusions. Mold t $60 14m flash or protrusions shall not exceed _010 inch { 25mm) as (3) on any se i 5. Those dimensions measured with the leads constrainod to be perpendicular to plane T 6. Pin numbors start with pa #1 and continue counterclockwise 10 pin’ #28 when wewed from tho top. Get Oe Ae ee eg 100 54) asc 1.480 (7.08) a 1440 7.08 O04 (1.63) ws 620 (15.75) ory 185.000) “a00-1820 14663 68) (NOTE 5) i eet SAAR AAAARAAAAE 105 14.19) a sexta seasy 650 te 800 (15.24) esc a 5a) a | fos (1785 4 3h sus \\ 853-0413 84099 NG? | November 12, 1990 12
Philips Components-Signetics Memory Products Product Specification 64K-bit CMOS EPROM (8K x 8) 27C64A 32-PIN (450 x 550 mils wide) PLASTIC LEADED CHIP CARRIER (A) PACKAGE | execu eee | Bi | 4B | i Danan plone "Wr tmied 8h top of rola partes _ poonnosns ~~ Seg tacit wi opt Wad, wer ae | = ‘esse a | mn Ps 1 6 Datum "A.B" and "D-E" are determined where thes q fond — Center leads exit from the body at plane “H”. OS (top view). POST . _ ‘9. All dimensions and tolerances include lead trim and Spee | | | das i 10 Sgpeten onda soda fr rocket packaged 8 14 hee i PLCC ia the suffer "A" after the product number. i Sl miean — ; f je fae a a) ae si -- J. an a — rs =n Yi; Yj. a SF= =e J $1. é aren na 4s Sn |. MET NA eee / 77, : 3 "853-0402 84711 AR2 | November 12, 1990 13
Philips Components-Signetics Memory Products Product Specification eee 64K-bit CMOS EPROM (8K x 8) 27C64A ny i | a \\ DEFINITIONS ee Detien i This data choot containe the design spedticatone for product development. Spectications ee eee | ‘This data sheet contains preliminary data, and supplementary data wil be publahed at « later date, 1 Preliminary Specification ‘Signetice reserves the right to make changes at any time without notice in order to improve design and | ‘supply the best possible product. | “This data sheet contain Final Specifications. Signetics reserves the right to make changes at any time | Product Speciication _——— | Signetics reserves the right to make changes without notice in the products, including circuits, standard celis, and/or software, described or contained | herein, in order to improve design and/or performance. Signetics assumes no responsibility or liability for the use of any of these products, conveys | no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work infringement, unless otherwise specified. Applications that are described herein for any of these prod- cts are for ilustrative purposes only. Signetics makes no representation or warranty that such applications will be suitable for the specified use | without further testing or modification. i UFE SUPPORT APPLICATIONS Signetics Products are not designed for use in life support appliances, devices, or systems where malfunction of a Signetics Product can reasonably be expected to result in a personal injury. Signetics customers using or selling Signetics Products for use in such applications do so at their own ‘Signetics Company Signetics registors eligible circuits under s s 811 East Arques Avenue the Semiconductor Chip Protection Act. ‘Sunnyvale, California 94088-3409 All rights reserved. Pris in U.S.A. fl |1 division of North American Phites Comorstion Telephone 408/991-2000 96-6231-240 0382N/AMCR1/1290 i . , \\ November 12, 1990 14 SAN OS tet bo