27C256-12ETS

27C256 MICROCHIP | Alldatasheet

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Technical content

Ó 1996 Microchip Technology Inc. DS11001L-page 1 27C256

FEATURES

• High speed performance - 90 ns access time available
• CMOS Technology for low power consumption - 20 mA Active current - 100 m A Standby current
• Factory programming available
• Auto-insertion-compatible plastic packages
• Auto ID aids automated programming
• Separate chip enable and output enable controls
• High speed “express” programming algorithm
• Organized 32K x 8: JEDEC standard pinouts - 28-pin Dual-in-line package - 32-pin PLCC Package - 28-pin SOIC package - 28-pin Thin Small Outline Package (TSOP) - 28-pin Very Small Outline Package (VSOP) - Tape and reel
• Data Retention > 200 years
• Available for the following temperature ranges: - Commercial: 0˚C to +70˚C - Industrial: -40˚C to +85˚C - Automotive: -40˚C to +125˚C

DESCRIPTION

The Microchip Technology Inc. 27C256 is a CMOS 256K bit electrically Programmable Read Only Memory (EPROM). The device is organized as 32K words by 8 bits (32K bytes). Accessing individual bytes from an address transition or from power-up (chip enable pin going low) is accomplished in less than 90 ns. This very high speed device allows the most sophisticated micro- processors to run at full speed without the need for WAIT states. CMOS design and processing enables this part to be used in systems where reduced power consumption and reliability are requirements. A complete family of packages is offered to provide the most flexibility in applications. For surface mount appli- cations, PLCC, SOIC, VSOP or TSOP packaging is available. Tape and reel packaging is also available for PLCC or SOIC packages. PACKAGE TYPES VPP A12 V SS VCC A14 A13 A11 OE A10 CE OE A11 A13 A14 V CC VPP A12 A10 CE V SS NC A11 NC OE A10 CE A12 V NU Vcc A14 A13 V NU PPSS A10 CE V SS OE A11 V PP A12 A13 A14 V CC TSOP PLCC DIP/SOIC VSOP 27C25627C25627C25627C256 256K (32K x 8) CMOS EPROM This document was created with FrameMaker404

Ó 1996 Microchip Technology Inc.

1.0 ELECTRICAL CHARACTERISTICS

1.1 Maxim um Ratings*

V CC and input voltages w.r.t. V SS V PP voltage w.r.t. V SS during Voltage on A9 w.r.t. V SS Output voltage w.r.t. V SS CC +1.0V *Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rat- ing only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating con- ditions for extended periods may affect device reliability. TABLE 1-1: PIN FUNCTION TABLE Name Function A0-A14 Address Inputs CE Chip Enable OE Output Enable V PP Programming Voltage O0 - O7 Data Output V CC +5V Power Supply V SS Ground NC No Connection; No Internal Connec- tion NU Not Used; No External Connection Is Allowed TABLE 1-2: READ OPERATION DC CHARACTERISTICS V CC = +5V ( 10%) Commercial: Tamb = 0˚C to +70˚C Industrial: Tamb = -40˚C to +85˚C Extended (Automotive): Tamb = -40 C to +125 C Parameter Part* Status Symbol Min. Max. Units Conditions Input Voltages all Logic "1" Logic "0" V IH V IL 2.0 -0.5 V CC 0.8 V V Input Leakage all — I LI -10 10 m AV IN = 0 to V CC Output Voltages all Logic "1" Logic "0" V OH V OL 2.4 0.45 V V I OH = -400 m A I OL = 2.1 mA Output Leakage all — I LO -10 10 m AV OUT = 0V to V CC Input Capacitance all — C IN — 6 pF V IN = 0V; Tamb = 25 f = 1 MHz Output Capacitance all — C OUT —1 2 p F V OUT = 0V; Tamb = 25 f = 1 MHz Power Supply Current, Active C I,E TTL input TTL input I CC 1 I CC 2 mA mA V CC = 5.5V; V PP = V CC f = 1 MHz; OE = CE = V IL I OUT = 0 mA; V IL = -0.1 to 0.8V; V IH = 2.0 to V CC Note 1 Power Supply Current, Standby C I, E all TTL input TTL input CMOS input I CC S )— 2 100 mA mA m AC E = V CC 0.2V I PP Read Current V PP Read Voltage all all Read Mode Read Mode I PP V PP V CC -0.7 100 V CC m A V V PP = 5.5V * Parts: C=Commercial Temperature Range; I, E=Industrial and Extended Temperature Ranges Note 1: Typical active current increases .75 mA per MHz up to operating frequency for all temperature ranges.

Ó 1996 Microchip Technology Inc. DS11001L-page 3 27C256 TABLE 1-3: READ OPERATION AC CHARACTERISTICS FIGURE 1-1: READ WAVEFORMS AC Testing Waveform: V IH = 2.4V and V IL = 0.45V; V OH = 2.0V V OL = 0.8V Output Load: 1 TTL Load + 100 pF Input Rise and Fall Times: 10 ns Ambient Temperature: Commercial: Tamb = 0˚C to +70˚C Industrial: Tamb = -40˚C to +85˚C Automotive: Tamb = -40 C to +125 C Parameter Sym 27C256-90* 27C256-10* 27C256-12 27C256-15 27C256-20 Units Conditions Min Max Min Max Min Max Min Max Min Max Address to Output Delay t ACC — 90 — 100 — 120 — 150 — 200 ns CE =OE =V IL CE to Output Delay t CE — 90 — 100 — 120 — 150 — 200 ns OE = V IL OE to Output Delay t OE — 40 — 45 — 55 — 65 — 75 ns CE = V IL CE or OE to O/P High Impedance t OFF 0 30 0 30 0 35 0 50 0 55 ns Output Hold from Address CE or OE, whichever goes first t OH * -10, -90 AC Testing Waveform: V IH = 2.4V and V IL = .45V; V OH = 1.5V and V OL = 1.5V Output Load: 1 TTL Load + 30pF Address CE VIH VIL VIH VIL VIH VIL OE Outputs O0 - O7 VOH VOL Address Valid tCE(2) tOE(2) High Z Valid Output tACC (1) tOFF is specified for OE or CE, whichever occurs first (2) OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE (3) This parameter is sampled and is not 100% tested. High Z tOH tOFF(1,3) Notes:

Ó 1996 Microchip Technology Inc. TABLE 1-4: PROGRAMMING DC CHARACTERISTICS TABLE 1-5: PROGRAMMING AC CHARACTERISTICS Ambient Temperature: Tamb = 25 C C V CC = 6.5V 0.25V, V PP = V H = 13.0V 0.25V Parameter Status Symbol Min Max. Units Conditions Input Voltages Logic”1” Logic”0” V IH V IL 2.0 -0.1 V CC 0.8 V V Input Leakage — I LI -10 10 m AV IN = 0V to V CC Output Voltages Logic”1” Logic”0” V OH V OL 2.4 0.45 V V I OH = -400 m A I OL = 2.1 mA V CC Current, program & verify — I CC 2 — 20 mA Note 1 V PP Current, program — I PP 2 — 25 mA Note 1 A9 Product Identification — V H 11.5 12.5 V Note 1: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP for Program, Program Verify AC Testing Waveform: V IH=2.4V and VIL=0.45V; VOH =2.0V; VOL =0.8V and Program Inhibit Modes Output Load: 1 TTL Load + 100pF Ambient Temperature: Tamb=25°C – 5°C VCC = 6.5V – 0.25V, VPP = VH = 13.0V – 0.25V Parameter Symbol Min. Max. Units Remarks Address Set-Up Time t AS 2— ms Data Set-Up Time t DS 2— ms Data Hold Time t DH 2— ms Address Hold Time t AH 0— ms Float Delay (2) t DF 0 130 ns VCC Set-Up Time t VCS 2— ms Program Pulse Width (1) t PW 95 105 ms 100 ms typical CE Set-Up Time t CES 2— ms OE Set-Up Time t OES 2— ms VPP Set-Up Time t VPS 2— ms Data Valid from OE tOE — 100 ns Note 1: For express algorithm, initial programming width tolerance is 100 ms –5%. 2: This parameter is only sampled and not 100% tested. Output float is defined as the point where data is no longer driven (see timing diagram).

Ó 1996 Microchip Technology Inc. DS11001L-page 5 27C256 FIGURE 1-2: PROGRAMMING WAVEFORMS TABLE 1-6: MODES Operation Mode CE OE V PP A9 O0 - O7 Read V IL VIL VCC XD OUT Program V IL VIH VH XD IN Program Verify V IH VIL VH XD OUT Program Inhibit V IH VIH VH X High Z Standby V IH XV CC X High Z Output Disable V IL VIH VCC X High Z Identity V IL VIL VCC VH Identity Code X = Don’t Care V IH V IL V IH V IL 13.0V(2) 5.0V 6.5V(2) 5.0V V IH V IL V IH V IL Address Data V PP V CC CE OE tDF and tOE are characteristics of the device but must be accommodated by the programmer V CC = 6.5 V –0.25V, VPP = VH = 13.0V –0.25V for express algorithm tPW tOES Address Stable tAH tDS tVPS tDF (1) tDH tOE (1) tAS Program Data Stable Data Out Valid Verify tVCS Notes: (1) (2) High Z

1.2 Read Mode

(See Timing Diagrams and AC Characteristics) Read Mode is accessed when: a) the CE pin is low to power up (enable) the chip b) the OE pin is low to gate the data to the output pins For Read operations, if the addresses are stable, the address access time (tACC ) is equal to the delay from CE to output (tCE ). Data is transferred to the output after a delay from the falling edge of OE (tOE ).

DS11001L-page 6 Ó 1996 Microchip Technology Inc.

1.3 Standb y Mode

The standby mode is defined when the CE pin is high (VIH) and a program mode is not defined. When these conditions are met, the supply current will drop from 20 mA to 100 mA.

1.4 Output Enab le

This feature eliminates bus contention in multiple bus microprocessor systems and the outputs go to a high impedance when the following condition is true:

• The OE pin is high and the program mode is not defined. 1.5 Erase Mode (U .V. Windo wed Versions) Windowed products offer the ability to erase the mem- ory array. The memory matrix is erased to the all 1’s state when exposed to ultraviolet light. To ensure com- plete erasure, a dose of 15 watt-second/cm 2 is required. This means that the device window must be placed within one inch and directly underneath an ultra- violet lamp with a wavelength of 2537 Angstroms, intensity of 12,000mW/cm 2 for approximately 20 min- utes.

1.6 Pr ogramming Mode

The Express Algorithm has been developed to improve on the programming throughput times in a production environment. Up to ten 100-microsecond pulses are applied until the byte is verified. No overprogramming is required. A flowchart of the express algorithm is shown in Figure 1-3. Programming takes place when: a) V CC is brought to the proper voltage, b) V PP is brought to the proper VH level, c) the OE pin is high, and d) the CE pin is low. Since the erased state is “1” in the array, programming of “0” is required. The address to be programmed is set via pins A0-A14 and the data to be programmed is pre- sented to pins O0-O7. When data and address are sta- ble, a low going pulse on the CE line programs that location.

1.7 V erify

After the array has been programmed it must be veri- fied to ensure all the bits have been correctly pro- grammed. This mode is entered when all the following conditions are met: a) V CC is at the proper level, b) V PP is at the proper VH level, c) the CE line is high, and d) the OE line is low.

1.8 Inhibit

When programming multiple devices in parallel with dif- ferent data, only CE need be under separate control to each device. By pulsing the CE line low on a particular device, that device will be programmed; all other devices with CE held high will not be programmed with the data, although address and data will be available on their input pins.

1.9 Identity Mode

In this mode specific data is output which identifies the manufacturer as Microchip Technology Inc. and device type. This mode is entered when Pin A9 is taken to V H (11.5V to 12.5V). The CE and OE lines must be at VIL. A0 is used to access any of the two non-erasable bytes whose data appears on O0 through O7. Pin Input Output Identity A0 0 O O O O O O O H e x Manufacturer Device Type* V IL VIH * Code subject to change

Ó 1996 Microchip Technology Inc. DS11001L-page 7 27C256 FIGURE 1-3: PROGRAMMING EXPRESS ALGORITHM Start ADDR = First Location VCC = 6.5V VPP = 13.0V X = 0 Program one 100 ms pulse Increment X Verify Byte Pass Fail X = 10 ? No Yes Device Failed Last Address? No Increment Address Conditions: Tamb = 25˚C –5˚C VCC = 6.5 –0.25V VPP = 13.0 –0.25V Yes VCC = VPP = 4.5V, 5.5V Device Passed All bytes = original data? Device Failed NoYes

DS11001L-page 8 Ó 1996 Microchip Technology Inc. NOTES:

Ó 1996 Microchip Technology Inc. DS11001L-page 9 27C256 NOTES:

DS11001L-page 10 Ó 1996 Microchip Technology Inc. NOTES:

Ó 1996 Microchip Technology Inc. DS11001L-page 11 27C256 Product Identification System To order or to obtain information (e.g., on pricing or delivery), please use listed part numbers, and refer to factory or listed sales offices. Package: L = Plastic Leaded Chip Carrier P = Plastic DIP (Mil 600) SO = Plastic SOIC (Mil 300) TS = Thin Small Outline Package (TSOP) 8x20mm VS = Very Small Outline Package (VSOP) 8x13.4mm Temperature Blank = 0˚C to +70˚C Range: I = -40˚C to +85˚C E = -40˚C to +125˚C Access 90 = 90 ns Time: 10 = 100 ns 12 = 120 ns 15 = 150 ns 20 = 200 ns Device 27C256 256K (32K x 8) CMOS EPROM 27C256 – 90 I /TS

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