HA-2620_06 INTERSIL | Alldatasheet

Document overview

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  • PDF pages: 10

Technical content

Features

  • Output Short Circuit Protection
  • Compensation Pin for Unity Gain Capability

Applications

  • Video and RF Amplifier
  • Pulse Amplifier
  • Audio Amplifiers and Filters
  • High-Q Active Filters
  • High Speed Comparators
  • Low Distortion Oscillator Pinouts HA-2625 (PDIP, SOIC) TOP VIEW HA-2620 (METAL CAN) TOP VIEW PART NUMBER PART MARKING TEMP. RANGE (oC) PACKAGE PKG. DWG. # HA2-2620-2 HA2-2620-2 -55 to 125 8 Pin Metal Can T8.C HA3-2625-5 HA3-2625-5 0 to 75 8 Ld PDIP E8.3 HA9P2625-9 26259 -40 to 85 8 Ld SOIC M8.15 BAL -IN +IN COMP OUT BAL COMP OUT-IN BAL +IN BAL Data Sheet January 16, 2006 FN2903.8 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003-2006. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.

2 FN2903.8 Absolute Maximum Ratings Thermal Information Operating Conditions Temperature Range Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W) (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Abs olute Maximum Ratings” may cause permanent dam age to the device. This is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VSUPPLY = ±15V, Unless Otherwise Specified PARAMETER TEMP. ( oC) HA-2620 HA-2625 UNITSMIN TYP MAX MIN TYP MAX INPUT CHARACTERISTICS Offset Voltage (Note 3) 25 - 0.5 4 - 3 5 mV F u l l -26--7 m V Average Offset Voltage Drift Full - 5 - - 5 - µV/oC Bias Current 25 - 1 15 - 5 25 nA F u l l -1 0 3 5- -4 0 n A Offset Current 25 1 15 - 5 25 nA Full - 5 35 - - 40 nA Differential Input Resistance (Note 2) 25 65 500 - 40 300 - M Ω Input Noise Voltage Density (f = 1kHz) 25 - 11 - - 11 - nV/ √Hz Input Noise Current Density (f = 1kHz) Common Mode Range Full ±11 ±12 - ±11 ±12 - V TRANSFER CHARACTERISTICS Large Signal Voltage Gain (Notes 4, 5) 25 100 150 - 80 150 - kV/V Full 70 - - 70 - - kV/V Common Mode Rejection Ratio (Note 6) Full 80 100 - 74 100 - dB Minimum Stable Gain 25 5 - - 5 - - V/V Gain Bandwidth Product (Notes 4, 7, 8) 25 - 100 - - 100 - MHz OUTPUT CHARACTERISTICS Output Voltage Swing (Note 4) Full ±10 ±12 - ±10 ±12 - V Output Current (Note 5) 25 ±15 ±22 - ±10 ±18 - mA Full Power Bandwidth (Notes 4, 5, 9, 13) 25 400 600 - 320 600 - kHz HA-2620, HA-2625

3 FN2903.8 TRANSIENT RESPONSE (Note 8) Rise Time (Notes 4, 9, 10) 25 - 17 45 - 17 45 ns Slew Rate (Notes 4, 9, 10, 12) 25 ±25 ±35 - ±20 ±35 - V/ µs POWER SUPPLY CHARACTERISTICS Supply Current 25 - 3 3.7 - 3 4 mA Power Supply Rejection Ratio (Note 11) Full 80 90 - 74 90 - dB NOTES: 2. This parameter value guarant eed by design calculations. 3. Offset may be externally adjusted to zero. 4. R L = 2kΩ. 5. V OUT = ±10V. 6. V CM = ±10V. 7. V OUT < 90mV. 8. 40dB Gain. 9. See Transient Response Test Circuits and Waveforms. 10. A V = 5 (The HA-2620 family is not stable at unity gain without external compensation). 11. ∆VS = ±5V. 12. V OUT = ±5V. 13. Full Power Bandwidth guaranteed by slew rate measurement: . Electrical Specifications VSUPPLY = ±15V, Unless Otherwise Specified (Continued) PARAMETER TEMP. ( oC) HA-2620 HA-2625 UNITSMIN TYP MAX MIN TYP MAX FPBW Slew Rate 2πVPEAK Test Circuits and Waveforms NOTE: Measured on both positive and negative transitions from 0V to +200mV and 0V to -200mV at output. TRANSIENT RESPONSE SLEW RATE NOTE: Tested Offset Adjustment is |VOS + 1mV| minimum referred to output. Typical range is ±10mV with RT = 100kΩ. SLEW RATE AND TRANSIENT RESPONSE SUGGESTED V OS ADJUSTMENT AND COMPENSATION HOOK-UP ±40mV INPUT ±200mV 90% OUTPUT 10% 0V RISE TIME INPUT -1V +5V 90% OUTPUT 10% -5V SLEW RATE = ∆V/∆t∆t IN 1.6kΩ 400Ω OUT 50pF OUT BAL 100kΩ IN COMP CC HA-2620, HA-2625

FIGURE 1. HIGH INPUT IMPEDANCE COMPARATOR FIGURE 2. FUNCTION GENERATOR

7 FN2903.8 Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): Unbiased TRANSISTOR COUNT: 140 PROCESS: Bipolar Dielectric Isolation Metallization Mask Layout HA-2620, HA-2625 BAL -IN +IN BAL OUT V+COMP HA-2620, HA-2625

8 FN2903.8 Metal Can Packages (Can) NOTES: 1. (All leads) Øb applies between L1 and L2. Øb1 applies between L2 and 0.500 from the reference plane. Diameter is uncontrolled in L1 and beyond 0.500 from the reference plane. 2. Measured from maximum diameter of the product. α is the basic spacing from the centerline of the tab to terminal 1 and β is the basic spacing of eac h lead or lead position (N -1 places) from α, looking at the bottom of the package. 4. N is the maximum number of terminal positions. 5. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 6. Controlling dimension: INCH. Øb ØD2 Øe k1 k βØb1 BASE AND SEATING PLANE F Q ØD ØD1 REFERENCE PLANE L A α Øb2Øb1 BASE METAL LEAD FINISH SECTION A-A A A N CL T8.C MIL-STD-1835 MACY1-X8 (A1)

8 LEAD METAL CAN PACKAGE

A 0.165 0.185 4.19 4.70 - Øb 0.016 0.019 0.41 0.48 1 Øb1 0.016 0.021 0.41 0.53 1 Øb2 0.016 0.024 0.41 0.61 - ØD 0.335 0.375 8.51 9.40 - ØD1 0.305 0.335 7.75 8.51 - ØD2 0.110 0.160 2.79 4.06 - e 0.200 BSC 5.08 BSC - e1 0.100 BSC 2.54 BSC - F - 0.040 - 1.02 - k 0.027 0.034 0.69 0.86 - k1 0.027 0.045 0.69 1.14 2 L 0.500 0.750 12.70 19.05 1 L1 - 0.050 - 1.27 1 L2 0.250 - 6.35 - 1 Q 0.010 0.045 0.25 1.14 - α 45o BSC 45 o BSC 3 β 45o BSC 45 o BSC 3 N8 8 4 Rev. 0 5/18/94 HA-2620, HA-2625

9 FN2903.8 HA-2620, HA-2625 Dual-In-Line Plastic Packages (PDIP) CL E eA C eB eC -B- INDEX 12 3 N / 2 N AREA SEATING BASE PLANE PLANE -C- B e D AA2 L -A- 0.010 (0.25) C AM BS NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protru- sions. Mold flash or protrusi ons shall not exceed 0.010 inch (0.25mm). 6. E and are measured with the leads constrained to be per- pendicular to datum . 7. e B and eC are measured at the lead tips with the leads uncon- strained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). eA -C- E8.3 (JEDEC MS-001-BA ISSUE D)

8 LEAD DUAL-IN-LINE PLASTIC PACKAGE

A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.15 1.77 8, 10 C 0.008 0.014 0.204 0.355 - D 0.355 0.400 9.01 10.16 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2.54 BSC - e A 0.300 BSC 7.62 BSC 6 eB - 0.430 - 10.92 7 L 0.115 0.150 2.93 3.81 4 N8 8 9 Rev. 0 12/93

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnishe d by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN2903.8 HA-2620, HA-2625 Small Outline Plastic Packages (SOIC) INDEX AREA E D N 123 -B- 0.25(0.010) C AM BS e -A- L B M -C- A SEATING PLANE 0.10(0.004) h x 45° C H 0.25(0.010) BM M α NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETE R. Converted inch dimensions are not necessarily exact. M8.15 (JEDEC MS-012-AA ISSUE C)

8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE

A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 e 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N8 8 7 α 0° 8° 0° 8° - Rev. 1 6/05