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ST24/25C02, ST24C02R ST24/25W02 SERIAL 2K (256 x 8) EEPROM NOT FOR NEW DESIGN November 1997 1/16 This is information on a product still in production but not recommended for new design AI00788D E0-E2 SDA VCC ST24x02 ST25x02 ST24C02R MODE/WC* SCL VSS Figure 1. Logic Diagram
1 MILLION ERASE/WRITE CYCLES with
40 YEARS DATA RETENTION
DESCRIPTION
This specification covers a range of 2K bits I2C bus EEPROM products, the ST24/25C02, the ST24C02R and ST24/25W02. In the text, products are referred to as ST24/25x02, where "x" is: "C" for Standard version and "W" for hardware Write Con- trol version. E0-E2 Chip Enable Inputs SDA Serial Data Address Input/Output SCL Serial Clock MODE Multibyte/Page Write Mode (C version) WC Write Control (W version) VCC Supply Voltage VSS Ground Table 1. Signal Names Note: WC signal is only available for ST24/25W02 products.
- Multibyte Write not available in ST24/25W02 versions.
Table 4. Operating Modes (1) Note: The MSB b7 is sent first. Table 3. Device Select Code nated with a STOP condition. and the device will not respond to any command. must be applied before applying any logic signal. to act as a pull up (see Figure 3). and is used to transfer data in or out of the memory. CC to act as pull up (see Figure 3). establish the device select code. the memory area is not write protected.
Figure 3. Maximum RL Value versus Bus Capacitance (CBUS ) for an I2C Bus tailed information about Write Control feature. devices in all communications. the internal EEPROM write cycle. ONLY when the SCL line is low. code (7 bits) and a READ or WRITE bit.
Note: 1. Sampled only, not 100% tested. Table 5. Input Parameters (1) (TA = 25 °C, f = 100 kHz ) Table 6. DC Characteristics
Notes:1. For a reSTART condition, or following a write cycle.
- The minimum value delays the falling/rising edge of SDA away from SCL = 1 in order to avoid unwanted START and/or STOP
- In the Multibyte Write mode only, if accessed bytes are on two consecutive 8 bytes rows (6 address MSB are not constant) the
maximum programming time is doubled to 20ms. Table 7. AC Characteristics bits to its chip enable inputs E2, E1, E0. bit is set to ’1’ for read and ’0’ for write operations. Figure 4. AC Testing Input Output Waveforms
Figure 5. AC Waveforms
Figure 6. I2C Bus Protocol be driven dynamically with CMOS input levels. with WC = 1 will not modify the memory content. or VIL, to minimize the stand-by current.
the memory will not respond to any request. Figure 7. Write Cycle Polling using ACK
Minimizing System Delays by Polling On ACK. tion was already sent during Step 1). address counter. This counter is then incremented. Figure 8. Write Modes Sequence (ST24/25C02 and ST24C02R)
Figure 9. Write Modes Sequence with Write Control = 1 (ST24/25W02) data transfer and switches to a standby state.
Figure 10. Read Modes Sequence Note: * The 7 Most Significant bits of DEV SEL bytes of a Random Read (1st byte and 3rd byte) must be identical.
ORDERING INFORMATION SCHEME Notes: 3 * Temperature range on special request only. 5 * Temperature range for ST24C02R only. Parts are shipped with the memory content set at all "1’s" (FFh). For a list of available options (Operating Voltage, Range, Package, etc...) refer to the current Memory Shortform catalogue. For further information on any aspect of this device, please contact the SGS-THOMSON Sales Office nearest to you. Operating Voltage ST24C02 3V to 5.5V ST24W02 3V to 5.5V ST25C02 2.5V to 5.5V ST25W02 2.5V to 5.5V ST24C02R 1.8V to 5.5V Range Standard Hardware Write Control Standard Hardware Write Control Standard Package B PSDIP8 0.25mm Frame M SO8 150mil Width Temperature Range 1 0 to 70 °C 5 * –20 to 85 °C 6 –40 to 85 °C 3 * –40 to 125 °C Option TR Tape & Reel Packing Example: ST24C02 M 1 TR ST24/25C02, ST24C02R, ST24/25W02
A L D E1 E N C eA eB B Symb mm inches Typ Min Max Typ Min Max A 3.90 5.90 0.154 0.232 A1 0.49 – 0.019 – A2 3.30 5.30 0.130 0.209 B 0.36 0.56 0.014 0.022 B1 1.15 1.65 0.045 0.065 C 0.20 0.36 0.008 0.014 D 9.20 9.90 0.362 0.390 E1 6.00 6.70 0.236 0.264 eA 7.80 – 0.307 – eB 10.00 0.394 L 3.00 3.80 0.118 0.150 N8 8 PSDIP8 Drawing is not to scale PSDIP8 - 8 pin Plastic Skinny DIP , 0.25mm lead frame ST24/25C02, ST24C02R, ST24/25W02
E N CP B e A D C LA1 α H h x 45˚ Symb mm inches Typ Min Max Typ Min Max A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.150 0.157 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 0.90 0.016 0.035 α 0° 8° 0° 8° N8 8 CP 0.10 0.004 SO8 Drawing is not to scale SO8 - 8 lead Plastic Small Outline, 150 mils body width ST24/25C02, ST24C02R, ST24/25W02
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. © 1997 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components by SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in an I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. ST24/25C02, ST24C02R, ST24/25W02