2525

2525 ALLEGRO | Alldatasheet

Document overview

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Technical content

Features

I 2.7 V to 5.8 V Input I Up to 500 mA Continuous Load Current per Port I 140 mΩ Maximum ON-Resistance I 1.25 A Maximum Short-Circuit Current Limit I Individual Open-Drain Fault Flag Outputs I 100 µA Typical ON-State Supply Current I <1 µA Typical OFF-State Supply Current I Outputs Can be Forced Higher Than Input (off-state) I Thermal Shutdown I 2.2 V Typical Undervoltage Lockout I 0.6 ms Turn On (soft-start) and Fast Turn Off I A2525 (active-high) Improved Replacement for MIC2525-1 I A2535 (active-low) Improved Replacement for MIC2525-2

Applications

I USB Hosts and Self-Powered Hubs I USB Bus-Powered Hubs I Hot Plug-In Power Supplies I Battery-Charger Circuits Note that the A2525EM (DIP) and the A2525EL (SOIC) are electrically identical and share a common terminal number assignment. ABSOLUTE MAXIMUM RATINGS Output Current, ENABLE Voltage Range, Package Power Dissipation, Operating Temperature Range, Storage Temperature Range, * Fault conditions that produce excessive junction temperature will activate device thermal shutdown circuitry. These conditions can be tolerated but should be avoided. 8EN FLG GND NC OUT IN NC NC Dwg. PP-070A GATE CONTROL NC NC NC

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

2525 AND 2535

Copyright © 2000, Allegro MicroSystems, Inc. A2535EM Note that the A2535EM (DIP) and the A2535EL (SOIC) are electrically identical and share a common terminal number assignment. 50 75 100 125 150 2.5 0.5 ALLOWABLE PACKAGE POWER DISSIPATION IN WATTSAMBIENT TEMPERATURE IN °C 2.0 1.5 1.0 Dwg. GP-009-2 SUFFIX 'L', RθJA = 108°C/W SUFFIX 'M', RθJA = 60°C/W 8EN FLG GND NC OUT IN NC NC Dwg. PP-070-1A GATE CONTROL NC NC NC CURRENT LIMIT GND OUT 1.2 V REF. Dwg. FP-049 IN FLG EN GATE CONTROL UVLOTSD CHARGE PUMP OSC A2535 ONLY

www.allegromicro.com 3 Electrical Characteristics at TA = 25°C, VIN = 5 V. Limits Parameter Test Conditions Min Typ Max Units Operating Voltage Range V IN 2.7 – 5.8 V Switch Resistance V IN = 5 V, IOUT = 500 mA – 100 140 m Ω VIN = 3.3 V, IOUT = 500 mA – 100 140 m Ω Output Leakage Current Output disabled, V IN = 5 V, VOUT = 0 – <1.0 10 µA Maximum Load Current 500 – – mA Short-Circuit Current Limit Output enabled into load, V OUT = 4 V 0.5 0.75 1.25 A Current-Limit Threshold Ramped load applied to enabled output, V OUT ≤ 4 V – 0.9 – A ENABLE Input Threshold Low-to-high transition – 2.1 2.4 V High-to-low transition 0.8 1.9 – V ENABLE Input Hysteresis – 0.2 – V ENABLE Input Current V EN = 0 V to 5.5 V – ±0.01 ±1.0 µA ENABLE Input Cap. – 1.0 – pF Output Turn-On Delay R L = 10 Ω, CL = 1 µF, 50% VENABLE to 10% VOUT –0 . 5– m s Output Turn-On Rise Time R L = 10 Ω, CL = 1 µF, 10% VOUT to 90% VOUT –0 . 6– m s Output Turn-Off Delay R L = 10 Ω, CL = 1 µF, 50% VENABLE to 90% VOUT –1 0– µs Output Turn-Off Fall Time R L = 10 Ω, CL = 1 µF, 90% VOUT to 10% VOUT –2 5– µs Error Flag Output V IN = 5 V, IL = 10 mA – 8.0 – Ω Resistance VIN = 3.3 V, IL = 10 mA – 10 – Ω Error Flag Off Current V FLG = 5 V – 0.01 – µA Supply Current Switch disabled (see note), OUT = open – 0.2 5.0 µA Switch enabled (see note), OUT = open – 100 160 µA UVLO Threshold Increasing V IN –2 . 3 5– V Decreasing VIN –2 . 2– V Over-Temperature Increasing T J – 165 – °C Shutdown Threshold Decreasing TJ – 155 – °C (active low) for the A2535EL/EM.

Worcester, Massachusetts 01615-0036 (508) 853-5000 The power switch is an N-channel MOSFET with a maximum on-state resistance of 140 m Ω (VIN = 5 V). Configured as a high-side switch, the power switch prevents current flow in either direction if disabled. The drain body diode is discon- nected from the source when the switch is OFF allowing the output voltage to exceed the input voltage without causing current conduction. The power switch supplies a minimum of 500 mA per switch. Charge pump An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V. The charge pump is limited to 2.5 µA to establish a controlled turn on time of typically 1 ms. Driver The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated electromag- netic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall times of the output voltage. The rise time is typically 1 ms. ENABLE (EN or EN) The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce the supply current to less than 5 µA maximum when a logic high is present on EN (A2525) or a logic low is present (A2535). The proper logic level restores bias to the drive and control circuits and turns the power ON. The enable input is a compatible with both TTL and CMOS logic levels. Fault Flag (FLG) This open drain output is asserted (active low) when an overcurrent or over temperature condition is encountered. The output will remain asserted until the overcurrent or over temperature condition is removed. Current sense A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its saturation region, which switches the output into a constant-current mode and holds the current constant while varying the voltage on the load. Thermal sense An internal thermal-sense circuit shuts off the power switch when the junction temperature rises to approximately 165 °C. Hysteresis is built into the thermal sense circuit. After the device has cooled approximately 10 °C, the switch turns back ON. The switch continues to cycle off and on until the fault is removed. Undervoltage lockout A voltage-sense circuit monitors the input voltage. When the input voltage is approximately 2 V, a control signal turns OFF the power switch.

www.allegromicro.com 5 VOUT

1 V//box3

200 µs//box3 VOUT 50 µs//box3 NO-LOAD SWITCHING PERFORMANCE VOUT 50 µs//box3

Worcester, Massachusetts 01615-0036 (508) 853-5000 CAPACITIVE-LOAD SWITCHING PERFORMANCE IOUT 500 mA//box3 VENABLE VFAULT VOUT

2 V//box3

CL = 1000 µF RL = 12 Ω CURRENT LIMITING IOUT 500 mA//box3 VENABLE VFAULT VOUT CL = 50 µF RL = 100 Ω IOUT 500 mA//box3 VENABLE VFAULT VOUT CL = 100 µF RL = 100 Ω

www.allegromicro.com 7 IOUT

4 A//box3

15 mΩ SHORT CIRCUIT IOUT 2 µs//box3 15 mΩ SHORT CIRCUIT IOUT 400 mA//box3 VFAULT 500 ms//box3 15 mΩ SHORT CIRCUIT THERMAL SHUTDOWN IOUT

1 A//box3

RL = 15 mΩ THERMAL SHUTDOWN OUTPUT SHORT-CIRCUIT PERFORMANCE

Worcester, Massachusetts 01615-0036 (508) 853-5000 A sense FET is employed for overcurrent conditions. Unlike current-sense resistors, sense FETs do not increase the series resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only if the fault is present long enough to activate thermal limiting. Three possible overload conditions can occur. In the first condition, the output has been shorted before the device is enabled or between V IN has been applied. The device senses the short and immediately switches into a constant-current output. In the second condition, the short occurs while the device is enabled. At the instant the short occurs, very high currents may flow for a short time before the current-limit circuit can react . After the current-limit circuit has tripped (reached the overcurrent trip threshold) the device switches into constant- current mode. In the third condition, the load has been gradually increased beyond the recommended operating current. The current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is exceeded. The device is capable of delivering current up to the current-limit threshold without damage. Once the threshold has been reached, the device switches into its constant-current mode. Fault Flag (FLG) The FLG open-drain output is asserted (active low) when an overcurrent or over-temperature condition is encountered. The output will remain asserted until the overcurrent or over- temperature condition is removed. Connecting a heavy capacitive load to an enabled device can cause momentary false over-current reporting from the inrush current flowing through the device, charging the downstream capacitor. An RC filter can be connected to the terminal to reduce false overcurrent reporting. Using low-ESR electrolytic capacitors on the output lowers the inrush current flow through the device during hot- plug events by providing a low impedance energy source, thereby reducing erroneous overcurrent reporting. Power dissipation and junction temperature The low on-resistance of the n-channel MOSFET allows small surface-mount packages, such as an SOIC, to pass large currents. The thermal resistance of these packages are high compared to those of power packages; it is good design practice to check power dissipation and junction temperature. The first step is to find r DS(on) at the input voltage and operating tempera- ture. Next, calculate the power dissipation using: PD = rDS(on) x I2 Finally, calculate the junction temperature: TJ = PD x RθJA + TA where: TA = ambient temperature °C RθJA = thermal resistance ( SOIC = 108°C/W, DIP = 60°C/W). Thermal protection Thermal protection prevents damage to the IC when heavy- overload or short-circuit faults are present for extended periods of time. The faults force these devices into constant-current mode, which causes the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across the switch is equal to the input voltage. The increased dissipation causes the junction temperature to rise to high levels. The protection circuit senses the junction temperature of the switch and shuts it OFF. Hysteresis is built into the thermal sense circuit, and after the device has cooled approximately 20 °, the switch turns back ON. The switch continues to cycle in this manner until the load fault or input power is removed. Undervoltage lock-out (UVLO) An undervoltage lockout ensures that the power switch is in the OFF state at power up. Whenever the input voltage falls below approximately 2 V, the power switch will be quickly turned OFF. This facilitates the design of hot-insertion systems where it is not possible to turn OFF the power switch before input power is removed. The UVLO will also keep the switch from being turned ON until the power supply has reached at least 2 V, even if the switch is enabled. Upon reinsertion, the power switch will be turned ON, with a controlled rise time to reduce EMI and voltage overshoots. Power supply considerations A 0.1 µF ceramic bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value electro- lytic capacitor on the output terminals is also desirable when the output load is heavy. The capacitor reduces power supply transients that may cause ringing on the input. Also, bypassing the output with a 0.01 µF to 0.1 µF ceramic capacitor improves the immunity of the device to short-circuit transients. APPLICATIONS INFORMATION

www.allegromicro.com 9 TYPICAL APPLICATIONS USB Host Application USB Bus-Powered Hub A2525EM VIN ON/OFF OVER- CURRENT GROUND 5 V UPSTREAM CONNECTOR 100 mA MAX 10 kΩ DATA USB CONTROLLER GATE CONTROL NC NC NC USB PORT FERRITE BEADS DATA +5 V Dwg. EP-070A VBUS 1 µF 0.1 µF 0.1 µF 4.7 µF VBUS GND 47 µF 3.3 V REG A2525EM VIN ON/OFF OVER- CURRENT GROUND 5 V UPSTREAM CONNECTOR 100 mA MAX 10 kΩ DATA USB CONTROLLER GATE CONTROL NC NC NC USB PORT FERRITE BEADS DATA Dwg. EP-070-10A VBUS 1 µF 0.1 µF 0.1 µF 4.7 µF VBUS GND 1.5 kΩ 47 µF 3.3 V REG

Worcester, Massachusetts 01615-0036 (508) 853-5000 (for reference only) Dimensions in Millimeters (controlling dimensions) 0° TO 8° 0.1968 0.1890 0.2440 0.2284 0.050 0.016 Dwg. MA-007-8 in 0.050 BSC 0.0098 0.0075 0.1574 0.1497 0.020 0.013 0.0688 0.0532 0.0040 MIN. 0° TO 8° 5.00 4.80 6.20 5.80 1.27 0.40 Dwg. MA-007-8 mm 1.27 BSC 0.25 0.19 4.00 3.80 0.51 0.33 1.75 1.35 0.10 MIN. NOTES: 1. Lead spacing tolerance is non-cumulative. 2. Exact body and lead configuration at vendor’s option within limits shown.

www.allegromicro.com 11 NOTES: 1. Leads 1, 4, 5, and 8 may be half leads at vendor’s option. 2. Lead thickness is measured at seating plane or below. 3. Lead spacing tolerance is non-cumulative. 4. Exact body and lead configuration at vendor’s option within limits shown. 0.355 0.204 7.62 BSC Dwg. MA-001-8A mm 10.92 MAX 10.16 9.02 2.54 BSC 0.13 MIN 3.81 2.93 7.11 6.10 5.33 MAX 1.77 1.150.39 MIN 0.558 0.356 A2525EM and A2535EM Dimensions in Inches (controlling dimensions) Dimensions in Millimeters (for reference only) 0.014 0.008 0.300 BSC Dwg. MA-001-8A in 0.430 MAX 0.100 BSC 0.022 0.014 0.400 0.355 0.005 MIN 0.150 0.115 0.280 0.240 0.210 MAX 0.070 0.0450.015 MIN

Worcester, Massachusetts 01615-0036 (508) 853-5000 The products described here are manufactured under one or more Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsi- bility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.