24AA00_V01 MICROCHIP | Alldatasheet

Document overview

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Technical content

Features

  • Single Supply with Operation down to 1.8V for 24AA00 Devices, 2.5V for 24LC00 Devices
  • Low-Power CMOS Technology: - Read current 500 A, typical - Standby current 100 nA, typical
  • 2-Wire Serial Interface, I 2C Compatible
  • Schmitt Trigger Inputs for Noise Suppression
  • Output Slope Control to Eliminate Ground Bounce
  • 100 kHz and 400 kHz Clock Compatibility
  • Page Write Time 3 ms, Typical
  • Self-Timed Erase/Write Cycle
  • ESD Protection >4000V
  • More than 1 Million Erase/Write Cycles
  • Data Retention >200 Years
  • Factory Programming Available
  • Packages include 8-lead PDIP, SOIC, TSSOP, DFN, TDFN and 5-lead SOT-23
  • Pb-Free and RoHS Compliant
  • Temperature Ranges Available: - Industrial (I): -40 C to +85C - Automotive (E): -40 C to +125C

Description

The Microchip Technology Inc. 24AA00/24LC00/ 24C00 (24XX00*) is a 128-bit Electrically Erasable PROM memory organized as 16 x 8 with a 2-wire serial interface. Low-voltage design permits operation down to 1.8 volts for the 24AA00 version, and every version maintains a maximum standby current of only 1 A and typical active current of only 500 A. This device was designed for where a small amount of EEPROM is needed for the storage of calibration values, ID numbers or manufacturing information, etc. The 24XX00 is available in 8-pin PDIP, 8-pin SOIC (3.90 mm), 8-pin TSSOP, 8-pin 2x3 DFN, TDFN and the 5-pin SOT-23 packages. Package Types Block Diagram Device V CC Range Temp Range 24AA00 1.8-5.5 I 24LC00 2.5-5.5 I 24C00 4.5-5.5 I,E 8-PIN PDIP/SOIC 8-PIN TSSOP 5-PIN SOT-23 NC NC NC Vss VCC NC SCL SDA NC NC NC VSS VCC NC SCL SDA SCL V SS SDA VCC NC DFN/TDFN NC NC NC VSS NC SCL SDA VCC8 HV Generator EEPROM Array YDEC XDEC Sense AMP R/W Control Memory Control Logic I/O Control Logic SDA SCL VCC VSS 128-Bit I2C Bus Serial EEPROM *24XX00 is used in this document as a generic part number for the 24AA00/24LC00/24C00 devices.

DS20001178J-page 2  1996-2018 Microchip Technology Inc.

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings(†) FIGURE 1-1: BUS TIMING DATA † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS All Parameters apply across the recommended operating ranges unless otherwise noted Industrial (I): T A = -40°C to +85°C, V CC = 1.8V to 5.5V Automotive (E) T A = -40°C to +125°C, V CC = 4.5V to 5.5V Parameter Symbol Min. Max. Units Conditions SCL and SDA pins: High-level input voltage VIH 0.7 VCC —V (Note) Low-level input voltage V IL — 0.3 V CC V (Note) Hysteresis of Schmitt Trigger inputs VHYS .05 VCC —V V CC  2.5V (Note) Low-level output voltage V OL —0 . 4 V I OL = 3.0 mA, VCC = 4.5V IOL = 2.1 mA, VCC = 2.5V Input leakage current I LI —± 1 AV IN = VCC or VSS Output leakage current I LO —± 1 AV OUT = VCC or VSS Pin capacitance (all inputs/outputs) C IN, COUT —1 0 p F V CC = 5.0V (Note) TA = 25°C, FCLK = 1 MHz Operating current I CC Write — 2 mA V CC = 5.5V, SCL = 400 kHz ICC Read — 1 mA V CC = 5.5V, SCL = 400 kHz Standby current I CCS —1 AV CC = 5.5V, SDA = SCL = VCC Note: This parameter is periodically sampled and not 100% tested. TF THIGH TR TSU:STA TLOW THD:DAT TSU:DAT TSU:STO TBUF TAA TSP SCL SDA IN SDA OUT THD:STA

 1996-2018 Microchip Technology Inc. DS20001178J-page 3 24AA00/24LC00/24C00 TABLE 1-2: AC CHARACTERISTICS All Parameters apply across all recommended operating ranges unless otherwise noted Industrial (I): T A = -40°C to +85°C, V CC = 1.8V to 5.5V Automotive (E): T A = -40°C to +125°C, V CC = 4.5V to 5.5V Parameter Symbol Min Max Units Conditions Clock frequency F CLK — 100 100 400 kHz 4.5V Vcc  5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc  5.5V Clock high time T HIGH 4000 4000 600 ns 4.5V Vcc  5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc  5.5V Clock low time T LOW 4700 4700 1300 ns 4.5V Vcc  5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc  5.5V SDA and SCL rise time (Note 1) TR — 1000 1000 300 ns 4.5V Vcc  5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc  5.5V SDA and SCL fall time T F —3 0 0 n s (Note 1) Start condition hold time T HD:STA 4000 4000 600 ns 4.5V Vcc  5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc  5.5V Start condition setup time T SU:STA 4700 4700 600 ns 4.5V Vcc  5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc  5.5V Data input hold time T HD:DAT 0— n s (Note 2) Data input setup time T SU:DAT 250 250 100 ns 4.5V Vcc  5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc  5.5V Stop condition setup time T SU:STO 4000 4000 600 ns 4.5V Vcc  5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc  5.5V Output valid from clock (Note 2) T AA — 3500 3500 900 ns 4.5V Vcc  5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc  5.5V Bus free time: Time the bus must be free before a new transmis- sion can start T BUF 4700 4700 1300 ns 4.5V Vcc  5.5V (E Temp range) 1.8V Vcc 4.5V 4.5V Vcc  5.5V Output fall time from V IH minimum to VIL maximum TOF 20+0.1 CB 250 ns (Note 1), CB 100 pF Input filter spike suppression (SDA and SCL pins) TSP —5 0 n s (Notes 1, 3) Write cycle time T WC —4 m s Endurance 1M — cycles (Note 4) Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. 3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. 4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ M odel which can be obtained at www.microchip.com.

DS20001178J-page 4  1996-2018 Microchip Technology Inc.

2.0 PIN DESCRIPTIONS

2.1 SDA Serial Data

This is a bidirectional pin used to transfer addresses and data into and data out of the device. It is an open drain terminal, therefore the SDA bus requires a pull-up resistor to V CC (typical 10 k  for 100 kHz, 2 k  for 400 kHz). For normal data transfer SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating the Start and Stop conditions.

2.2 SCL Serial Clock

This input is used to synchronize the data transfer from and to the device.

2.3 Noise Protection

The SCL and SDA inputs have Schmitt Trigger and filter circuits which suppress noise spikes to assure proper device operation even on a noisy bus. Name PDIP SOIC TSSOP DFN (1) TDFN(1) SOT-23 Description NC 1, 2, 3, 7 1, 2, 3, 7 1, 2, 3, 7 1, 2, 3, 7 1, 2, 3, 7 4 Not Connected VSS 4 4 4 4 4 2 Ground SDA 5 5 5 5 5 3 Serial Address/Data I/O SCL 6 6 6 6 6 1 Serial Clock V CC 8 8 8 8 8 5 +1.8V to 5.5V Power Supply Note 1: The exposed pad on the DFN/TDFN packages can be connected to VSS or left floating.

 1996-2018 Microchip Technology Inc. DS20001178J-page 5 24AA00/24LC00/24C00

3.0 FUNCTIONAL DESCRIPTION

The 24XX00 supports a bidirectional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter, and a device receiving data as a receiver. The bus has to be controlled by a master device which generates the Serial Clock (SCL), controls the bus access, and generates the Start and Stop conditions, while the 24XX00 works as slave. Both master and slave can operate as transmitter or receiver, but the master device determines which mode is activated.

4.0 BUS CHARACTERISTICS

The following bus protocol has been defined:

  • Data transfer may be in itiated only when the bus is not busy.
  • During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line while the clock line is high will be interpreted as a Start or Stop condition. Accordingly, the following bus conditions have been defined (Figure 4-1).

4.1 Bus Not Busy (A)

Both data and clock lines remain high.

4.2 Start Data Transfer (B)

A high-to-low transition of the SDA line while the clock (SCL) is high determines a Start condition. All commands must be preceded by a Start condition.

4.3 Stop Data Transfer (C)

A low-to-high transition of the SDA line while the clock (SCL) is high determines a Stop condition. All operations must be ended with a Stop condition.

4.4 Data Valid (D)

The state of the data line represents valid data when, after a Start condition, the data line is stable for the duration of the high period of the clock signal. The data on the line must be changed during the low period of the clock signal. There is one bit of data per clock pulse. Each data transfer is initiated with a Start condition and terminated with a Stop condition. The number of the data bytes transferred between the Start and Stop conditions is determined by the master device and is theoretically unlimited.

DS20001178J-page 6  1996-2018 Microchip Technology Inc.

4.5 Acknowledge

Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this Acknowledge bit. The device that acknowledges has to pull down the SDA line during the Acknowledge clock pulse in such a way that the SDA line is stable low during the high period of the acknowledge related clock pulse. Of course, setup and hold times must be taken into account. A master must signal an end of data to the slave by not generating an Acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the data line high to enable the master to generate the Stop condition (Figure 4-2). FIGURE 4-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS FIGURE 4-2: ACKNOWLEDGE TIMING Note: The 24XX00 does not generate any Acknowledge bits if an internal program- ming cycle is in progress. (A) (B) (C) (D) (A)(C)SCL SDA Start Condition Address or Acknowledge Valid Data Allowed to Change Stop Condition SCL 9876543211 2 3 Transmitter must release the SDA line at this point allowing the Receiver to pull the SDA line low to acknowledge the previous eight bits of data. Receiver must release the SDA line at this point so the Transmitter can continue sending data. Data from transmitter Data from transmitterSDA Acknowledge Bit

 1996-2018 Microchip Technology Inc. DS20001178J-page 7 24AA00/24LC00/24C00

5.0 DEVICE ADDRESSING

After generating a Start condition, the bus master transmits a control byte consisting of a slave address and a Read/Write bit that indicates what type of operation is to be performed. The slave address for the 24XX00 consists of a 4-bit device code ‘1010’ followed by three “don’t care” bits. The last bit of the control byte determines the operation to be performed. When set to a one a read operation is selected, and when set to a zero a write operation is selected (Figure 5-1). The 24XX00 monitors the bus for its corresponding slave address all the time. It generates an Acknowledge bit if the slave address was true and it is not in a programming mode. FIGURE 5-1: CONTROL BYTE FORMAT 10 10 xx xSA C K R/W Device Select Bits Don’t Care Bits Slave Address Acknowledge BitStart Bit Read/Write Bit

DS20001178J-page 8  1996-2018 Microchip Technology Inc.

6.0 WRITE OPERATIONS

6.1 Byte Write

Following the Start signal from the master, the device code (4 bits), the “don’t care” bits (3 bits), and the R/W bit (which is a logic low) are placed onto the bus by the master transmitter. This indicates to the addressed slave receiver that a byte with a word address will follow after it has generated an Acknowledge bit during the ninth clock cycle. Therefore, the next byte transmit- ted by the master is the word address and will be written into the Address Pointer of the 24XX00. Only the lower four address bits are used by the device, and the upper four bits are “don’t cares.” The 24XX00 will acknowledge the address byte and the master device will then transmit the data word to be written into the addressed memory location. The 24XX00 acknowl- edges again and the master generates a Stop condition. This in itiates the in ternal write cycle, and during this time the 24XX00 will not generate Acknowl- edge signals (Figure 6-1). After a byte Write command, the internal address counter will not be incremented and will point to the same address location that was just written. If a Stop bit is transmitted to the device at any point in the Write command sequence before the entire sequence is complete, then the command will abort and no data will be written. If more than 8 data bits are transmitted before the Stop bit is sent, then the device will clear the previously loaded byte and begin loading the data buffer again. If more than one data byte is transmitted to the device and a Stop bit is sent before a full eight data bits have been transmitted, then the Write command will abort and no data will be written. The 24XX00 employs a V CC threshold detector circuit which disables the internal erase/write logic if the VCC is below 1.5V (24AA00 and 24LC00) or 3.8V (24C00) at nominal conditions. FIGURE 6-1: BYTE WRITE S P BUS ACTIVITY MASTER SDA LINE BUS ACTIVITY S T A R T S T O P Control Byte Word Address Data A C K A C K A C K 10 x 10 x xx x = “don’t care” bit xxx0

 1996-2018 Microchip Technology Inc. DS20001178J-page 9 24AA00/24LC00/24C00

7.0 ACKNOWLEDGE POLLING

Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the Stop condition for a Write command has been issued from the master, the device initiates the internally ti med write cycle. ACK polling can be initiated immediately. This involves the master sending a Start condition followed by the control byte for a Write command (R/W = 0). If the device is still busy with the write cycle, then no ACK will be returned. If no ACK is returned, then the Start bit and control byte must be re-sent. If the cycle is complete, then the device will return the ACK and the master can then proceed with the next Read or Write command. See Figure 7-1 for flow diagram. FIGURE 7-1: ACKNOWLEDGE POLLING FLOW Send Write Command Send Stop Condition to Initiate Write Cycle Send Start Send Control Byte with R/W = 0 Did Device Acknowledge (ACK = 0)? Next Operation No Yes

DS20001178J-page 10  1996-2018 Microchip Technology Inc.

8.0 READ OPERATIONS

Read operations are initiated in the same way as write operations with the exce ption that the R/W bit of the slave address is set to one. There are three basic types of read operations: current address read, random read and sequential read.

8.1 Current Address Read

The 24XX00 contains an address counter that main- tains the address of the last word accessed, internally incremented by one. Theref ore, if the previous read access was to address n, the next current address read operation would access data from address n + 1. Upon receipt of the slave address with the R/W bit set to one, the device issues an acknowledge and transmits the eight-bit data word. The master will not acknowledge the transfer, but does generate a Stop condition and the device discontinues transmission (Figure 8-1).

8.2 Random Read

Random read operations allow the master to access any memory location in a random manner. To perform this type of read operation, first the word address must be set. This is done by sending the word address to the device as part of a write operation. After the word address is sent, the master generates a Start condition following the acknowledge. This termi- nates the write operation, but not before the internal Address Pointer is set. Then the master issues the control byte again, but with the R/W bit set to a one. The 24XX00 will then issue an acknowledge and trans- mits the eight bit data word. The master will not acknowledge the transfer, but does generate a Stop condition and the device discontinues transmission (Figure 8-2). After this command, the internal address counter will point to the address location following the one that was just read.

8.3 Sequential Read

Sequential reads are initiat ed in the same way as a random read except that after the device transmits the first data byte, the master issues an acknowledge as opposed to a Stop condition in a random read. This directs the device to transmit the next sequentially addressed 8-bit word (Figure 8-3). To provide sequential reads the 24XX00 contains an internal Address Pointer which is incremented by one at the completion of each read operation. This Address Pointer allows the entire memory contents to be serially read during one operation. FIGURE 8-1: CURRENT ADDRESS READ BUS ACTIVITY MASTER SDA LINE BUS ACTIVITY PS S T O P Control Byte S T A R T Data A C K N O A C K 1100 x x x 1 x = “don’t care” bit

DS20001178J-page 12  1996-2018 Microchip Technology Inc.

9.0 PACKAGING INFORMATION

9.1 Package Marking Information

8-Lead PDIP (300 mil) Example: 8-Lead SOIC (3.90 mm) Example: XXXXXXXT XXXXYYWW NNN 8-Lead TSSOP Example: 24LC00 I/P 13F 0527 24LC00I SN 0527 13F XXXX TYWW NNN 4L00 I527 13F 5-Lead SOT-23 Example: XXNN M03F 8-Lead 2x3 DFN Example: 204 527 XXX YWW NN 8-Lead 2x3 TDFN Example: A04 527 XXX YWW NN

 1996-2018 Microchip Technology Inc. DS20001178J-page 13 24AA00/24LC00/24C00 Part Number 1st Line Marking Codes TSSOP SOT-23 DFN TDFN 24AA00 4A00 B0NN — 201 — A01 — 24LC00 4L00 M0NN — 204 — A04 — 24C00 4C00 D0NN E0NN 207 — A07 A08 Note: NN = Alphanumeric traceability code Legend: XX...X Part number or part number code T Temperature (I, E) Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) Note: For very small packages with no ro om for the Pb-free JEDEC designator , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part numbe r cannot be marked on one line, it will be carried over to the next line, t hus limiting the number of available characters for customer-specific information. Note: Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion. *Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.

DS20001178J-page 14  1996-2018 Microchip Technology Inc. B A For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Microchip Technology Drawing No. C04-018D Sheet 1 of 2 8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP] eB E A L 8X b 8X b1 D c C PLANE .010 C N NOTE 1 TOP VIEW END VIEWSIDE VIEW e

 1996-2018 Microchip Technology Inc. DS20001178J-page 15 24AA00/24LC00/24C00 Microchip Technology Drawing No. C04-018D Sheet 2 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP] Units INCHES Dimension Limits MIN NOM MAX Number of Pins N 8 Pitch e .100 BSC Top to Seating Plane A - - .210 Molded Package Thickness A2 .115 .130 .195 Base to Seating Plane A1 .015 Shoulder to Shoulder Width E .290 .310 .325 Molded Package Width E1 .240 .250 .280 Overall Length D .348 .365 .400 Tip to Seating Plane L .115 .130 .150 Lead Thickness c .008 .010 .015 Upper Lead Width b1 .040 .060 .070 Lower Lead Width b .014 .018 .022 Overall Row Spacing eB - - .430 BSC: Basic Dimension. Theoretically exact value shown without tolerances. protrusions shall not exceed .010" per side. Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or Pin 1 visual index feature may vary, but must be located within the hatched area. § Significant Characteristic Dimensioning and tolerancing per ASME Y14.5M e DATUM A DATUM A e b e b e ALTERNATE LEAD DESIGN (VENDOR DEPENDENT)

DS20001178J-page 16  1996-2018 Microchip Technology Inc. Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

 1996-2018 Microchip Technology Inc. DS20001178J-page 17 24AA00/24LC00/24C00 /g27/g16/g47/g72/g68/g71/g3/g51/g79/g68/g86/g87/g76/g70/g3/g54/g80/g68/g79/g79/g3/g50/g88/g87/g79/g76/g81/g72/g3/g11/g54/g49/g12/g3/g177/g3/g49/g68/g85/g85/g82/g90/g15/g3/g22/g17/g28/g19/g3/g80/g80/g3/g37/g82/g71/g92/g3/g62/g54/g50/g44/g38/g64 /g49/g82/g87/g72/g29/g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87/g3 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74

DS20001178J-page 18  1996-2018 Microchip Technology Inc. /g27/g16/g47/g72/g68/g71/g3/g51/g79/g68/g86/g87/g76/g70/g3/g55/g75/g76/g81/g3/g54/g75/g85/g76/g81/g78/g3/g54/g80/g68/g79/g79/g3/g50/g88/g87/g79/g76/g81/g72/g3/g11/g54/g55/g12/g3/g177/g3/g23/g17/g23/g3/g80/g80/g3/g37/g82/g71/g92/g3/g62/g55/g54/g54/g50/g51/g64 /g49/g82/g87/g72/g86/g29 /g20/g17 /g51/g76/g81/g3/g20/g3/g89/g76/g86/g88/g68/g79/g3/g76/g81/g71/g72/g91/g3/g73/g72/g68/g87/g88/g85/g72/g3/g80/g68/g92/g3/g89/g68/g85/g92/g15/g3/g69/g88/g87/g3/g80/g88/g86/g87/g3/g69/g72/g3/g79/g82/g70/g68/g87/g72/g71/g3/g90/g76/g87/g75/g76/g81/g3/g87/g75/g72/g3/g75/g68/g87/g70/g75/g72/g71/g3/g68/g85/g72/g68/g17 /g21/g17 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g86/g3/g39/g3/g68/g81/g71/g3/g40/g20/g3/g71/g82/g3/g81/g82/g87/g3/g76/g81/g70/g79/g88/g71/g72/g3/g80/g82/g79/g71/g3/g73/g79/g68/g86/g75/g3/g82/g85/g3/g83/g85/g82/g87/g85/g88/g86/g76/g82/g81/g86/g17/g3/g48/g82/g79/g71/g3/g73/g79/g68/g86/g75/g3/g82/g85/g3/g83/g85/g82/g87/g85/g88/g86/g76/g82/g81/g86/g3/g86/g75/g68/g79/g79/g3/g81/g82/g87/g3/g72/g91/g70/g72/g72/g71/g3/g19/g17/g20/g24/g3/g80/g80/g3/g83/g72/g85/g3/g86/g76/g71/g72/g17 /g22/g17 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g76/g81/g74/g3/g68/g81/g71/g3/g87/g82/g79/g72/g85/g68/g81/g70/g76/g81/g74/g3/g83/g72/g85/g3/g36/g54/g48/g40/g3/g60/g20/g23/g17/g24/g48/g17 /g37/g54/g38/g29 /g37/g68/g86/g76/g70/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g17/g3/g55/g75/g72/g82/g85/g72/g87/g76/g70/g68/g79/g79/g92/g3/g72/g91/g68/g70/g87/g3/g89/g68/g79/g88/g72/g3/g86/g75/g82/g90/g81/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g86/g17 /g53/g40/g41/g29 /g53/g72/g73/g72/g85/g72/g81/g70/g72/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g15/g3/g88/g86/g88/g68/g79/g79/g92/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g15/g3/g73/g82/g85/g3/g76/g81/g73/g82/g85/g80/g68/g87/g76/g82/g81/g3/g83/g88/g85/g83/g82/g86/g72/g86/g3/g82/g81/g79/g92/g17 /g49/g82/g87/g72/g29/g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87/g3 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74 /g56/g81/g76/g87/g86 /g48/g44/g47/g47/g44/g48/g40/g55/g40/g53/g54 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g3/g47/g76/g80/g76/g87/g86 /g48/g44/g49 /g49/g50/g48 /g48/g36/g59 /g49/g88/g80/g69/g72/g85/g3/g82/g73/g3/g51/g76/g81/g86 /g49 /g27 /g51/g76/g87/g70/g75 /g72 /g19/g17/g25/g24/g3/g37/g54/g38 /g50/g89/g72/g85/g68/g79/g79/g3/g43/g72/g76/g74/g75/g87 /g36 /g177 /g177 /g20/g17/g21/g19 /g48/g82/g79/g71/g72/g71/g3/g51/g68/g70/g78/g68/g74/g72/g3/g55/g75/g76/g70/g78/g81/g72/g86/g86 /g36/g21 /g19/g17/g27/g19 /g20/g17/g19/g19 /g20/g17/g19/g24 /g54/g87/g68/g81/g71/g82/g73/g73/g3 /g36/g20 /g19/g17/g19/g24 /g177 /g19/g17/g20/g24 /g50/g89/g72/g85/g68/g79/g79/g3/g58/g76/g71/g87/g75 /g40 /g25/g17/g23/g19/g3/g37/g54/g38 /g48/g82/g79/g71/g72/g71/g3/g51/g68/g70/g78/g68/g74/g72/g3/g58/g76/g71/g87/g75 /g40/g20 /g23/g17/g22/g19 /g23/g17/g23/g19 /g23/g17/g24/g19 /g48/g82/g79/g71/g72/g71/g3/g51/g68/g70/g78/g68/g74/g72/g3/g47/g72/g81/g74/g87/g75 /g39 /g21/g17/g28/g19 /g22/g17/g19/g19 /g22/g17/g20/g19 /g41/g82/g82/g87/g3/g47/g72/g81/g74/g87/g75 /g47 /g19/g17/g23/g24 /g19/g17/g25/g19 /g19/g17/g26/g24 /g41/g82/g82/g87/g83/g85/g76/g81/g87 /g47/g20 /g20/g17/g19/g19/g3/g53/g40/g41 /g41/g82/g82/g87/g3/g36/g81/g74/g79/g72 /g73 /g19/g131 /g177 /g27/g131 /g47/g72/g68/g71/g3/g55/g75/g76/g70/g78/g81/g72/g86/g86 /g70 /g19/g17/g19/g28 /g177 /g19/g17/g21/g19 /g47/g72/g68/g71/g3/g58/g76/g71/g87/g75 /g69 /g19/g17/g20/g28 /g177 /g19/g17/g22/g19 D N E NOTE 1 b e c A L1 L φ /g48/g76/g70/g85/g82/g70/g75/g76/g83 /g55/g72/g70/g75/g81/g82/g79/g82/g74/g92 /g39/g85/g68/g90/g76/g81/g74 /g38/g19/g23/g16/g19/g27/g25/g37

 1996-2018 Microchip Technology Inc. DS20001178J-page 19 24AA00/24LC00/24C00 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

DS20001178J-page 20  1996-2018 Microchip Technology Inc. /g27/g16/g47/g72/g68/g71/g3/g51/g79/g68/g86/g87/g76/g70/g3/g39/g88/g68/g79/g3/g41/g79/g68/g87/g15/g3/g49/g82/g3/g47/g72/g68/g71/g3/g51/g68/g70/g78/g68/g74/g72/g3/g11/g48/g38/g12/g3/g177/g3/g21/g91/g22/g91/g19/g17/g28/g3/g80/g80/g3/g37/g82/g71/g92/g3/g62/g39/g41/g49/g64 /g49/g82/g87/g72/g86/g29 /g20/g17 /g51/g76/g81/g3/g20/g3/g89/g76/g86/g88/g68/g79/g3/g76/g81/g71/g72/g91/g3/g73/g72/g68/g87/g88/g85/g72/g3/g80/g68/g92/g3/g89/g68/g85/g92/g15/g3/g69/g88/g87/g3/g80/g88/g86/g87/g3/g69/g72/g3/g79/g82/g70/g68/g87/g72/g71/g3/g90/g76/g87/g75/g76/g81/g3/g87/g75/g72/g3/g75/g68/g87/g70/g75/g72/g71/g3/g68/g85/g72/g68/g17 /g21/g17 /g51/g68/g70/g78/g68/g74/g72/g3/g80/g68/g92/g3/g75/g68/g89/g72/g3/g82/g81/g72/g3/g82/g85/g3/g80/g82/g85/g72/g3/g72/g91/g83/g82/g86/g72/g71/g3/g87/g76/g72/g3/g69/g68/g85/g86/g3/g68/g87/g3/g72/g81/g71/g86/g17 /g22/g17 /g51/g68/g70/g78/g68/g74/g72/g3/g76/g86/g3/g86/g68/g90/g3/g86/g76/g81/g74/g88/g79/g68/g87/g72/g71/g17 /g23/g17 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g76/g81/g74/g3/g68/g81/g71/g3/g87/g82/g79/g72/g85/g68/g81/g70/g76/g81/g74/g3/g83/g72/g85/g3/g36/g54/g48/g40/g3/g60/g20/g23/g17/g24/g48/g17 /g37/g54/g38/g29 /g37/g68/g86/g76/g70/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g17/g3/g55/g75/g72/g82/g85/g72/g87/g76/g70/g68/g79/g79/g92/g3/g72/g91/g68/g70/g87/g3/g89/g68/g79/g88/g72/g3/g86/g75/g82/g90/g81/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g86/g17 /g53/g40/g41/g29 /g53/g72/g73/g72/g85/g72/g81/g70/g72/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g15/g3/g88/g86/g88/g68/g79/g79/g92/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g15/g3/g73/g82/g85/g3/g76/g81/g73/g82/g85/g80/g68/g87/g76/g82/g81/g3/g83/g88/g85/g83/g82/g86/g72/g86/g3/g82/g81/g79/g92/g17 /g49/g82/g87/g72/g29/g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87/g3 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74 /g56/g81/g76/g87/g86 /g48/g44/g47/g47/g44/g48/g40/g55/g40/g53/g54 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g3/g47/g76/g80/g76/g87/g86 /g48/g44/g49 /g49/g50/g48 /g48/g36/g59 /g49/g88/g80/g69/g72/g85/g3/g82/g73/g3/g51/g76/g81/g86 /g49 /g27 /g51/g76/g87/g70/g75 /g72 /g19/g17/g24/g19/g3/g37/g54/g38 /g50/g89/g72/g85/g68/g79/g79/g3/g43/g72/g76/g74/g75/g87 /g36 /g19/g17/g27/g19 /g19/g17/g28/g19 /g20/g17/g19/g19 /g54/g87/g68/g81/g71/g82/g73/g73/g3 /g36/g20 /g19/g17/g19/g19 /g19/g17/g19/g21 /g19/g17/g19/g24 /g38/g82/g81/g87/g68/g70/g87/g3/g55/g75/g76/g70/g78/g81/g72/g86/g86 /g36/g22 /g19/g17/g21/g19/g3/g53/g40/g41 /g50/g89/g72/g85/g68/g79/g79/g3/g47/g72/g81/g74/g87/g75 /g39 /g21/g17/g19/g19/g3/g37/g54/g38 /g50/g89/g72/g85/g68/g79/g79/g3/g58/g76/g71/g87/g75 /g40 /g22/g17/g19/g19/g3/g37/g54/g38 /g40/g91/g83/g82/g86/g72/g71/g3/g51/g68/g71/g3/g47/g72/g81/g74/g87/g75 /g39/g21 /g20/g17/g22/g19 /g177 /g20/g17/g24/g24 /g40/g91/g83/g82/g86/g72/g71/g3/g51/g68/g71/g3/g58/g76/g71/g87/g75 /g40/g21 /g20/g17/g24/g19 /g177 /g20/g17/g26/g24 /g38/g82/g81/g87/g68/g70/g87/g3/g58/g76/g71/g87/g75 /g69 /g19/g17/g21/g19 /g19/g17/g21/g24 /g19/g17/g22/g19 /g38/g82/g81/g87/g68/g70/g87/g3/g47/g72/g81/g74/g87/g75 /g47 /g19/g17/g22/g19 /g19/g17/g23/g19 /g19/g17/g24/g19 /g38/g82/g81/g87/g68/g70/g87/g16/g87/g82/g16/g40/g91/g83/g82/g86/g72/g71/g3/g51/g68/g71 /g46 /g19/g17/g21/g19 /g177 /g177 D N E NOTE 1 1 2 EXPOSED PAD NOTE 1 2 1 K L N e b A3 A1 A NOTE 2 BOTTOM VIEWTOP VIEW /g48/g76/g70/g85/g82/g70/g75/g76/g83 /g55/g72/g70/g75/g81/g82/g79/g82/g74/g92 /g39/g85/g68/g90/g76/g81/g74 /g38/g19/g23/g16/g20/g21/g22/g38

 1996-2018 Microchip Technology Inc. DS20001178J-page 21 24AA00/24LC00/24C00 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

DS20001178J-page 22  1996-2018 Microchip Technology Inc. BA 0.15 C 0.15 C

0.10 C A B

0.05 C (DATUM B) (DATUM A) C SEATING PLANE NOTE 1 N TOP VIEW SIDE VIEW BOTTOM VIEW NOTE 1 N 0.10 C 0.08 C Microchip Technology Drawing No. C04-129-MN Rev E Sheet 1 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.8 mm Body [TDFN] D E A (A3) e 8X b L K With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)

 1996-2018 Microchip Technology Inc. DS20001178J-page 23 24AA00/24LC00/24C00 Microchip Technology Drawing No. C04-129-MN Rev E Sheet 2 of 2 8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.8 mm Body [TDFN] For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: NOM MILLIMETERS

0.50 BSC

2.00 BSC

3.00 BSC

0.20 REF

  1. Pin 1 visual index feature may vary, but must be located within the hatched area. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Contact-to-Exposed Pad Contact Thickness Exposed Pad Width Exposed Pad Length 4. Dimensioning and tolerancing per ASME Y14.5M 3. Package is saw singulated 2. Package may have one or more exposed tie bars at ends. Notes: Contact Width Overall Width Overall Length Contact Length Standoff Number of Pins Overall Height Pitch K 0.20 Units N e A Dimension Limits D b E L 0.20 1.35 1.25 0.25 0.00 0.70 MIN 0.25 0.30 1.30 1.40 1.35 0.30 0.45 1.45 0.75 0.02 0.05 0.80 MAX With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)

DS20001178J-page 24  1996-2018 Microchip Technology Inc. RECOMMENDED LAND PATTERN Dimension Limits Units Optional Center Pad Width Optional Center Pad Length Contact Pitch 1.50 1.60 MILLIMETERS E MAX Contact Pad Length (X8) Contact Pad Width (X8) 0.85 0.25 Microchip Technology Drawing No. C04-129-MN Rev. B NOM 8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.8 mm Body [TDFN] CContact Pad Spacing 2.90 Thermal Via Diameter V Thermal Via Pitch EV 0.30 1.00 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: C E EV EV ØV SILK SCREEN With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)

 1996-2018 Microchip Technology Inc. DS20001178J-page 25 24AA00/24LC00/24C00

0.15 C D

N TOP VIEW SIDE VIEW Microchip Technology Drawing C04-028D [OT] Sheet 1 of For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 0.20 C C SEATING PLANE A A2 e NX bB

0.20 C A-B D

D E1/2 E/2 E DA

0.20 C 2X

(DATUM D) (DATUM A-B) A A SEE SHEET 2 5-Lead Plastic Small Outline Transistor (OT) [SOT23]

DS20001178J-page 26  1996-2018 Microchip Technology Inc. Microchip Technology Drawing C04-091D [OT] Sheet 2 of For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: c L T VIEW A-A SHEET 1 5-Lead Plastic Small Outline Transistor (OT) [SOT23] protrusions shall not exceed 0.25mm per side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Foot Angle Number of Pins Pitch Outside lead pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint Lead Thickness Lead Width Notes: I b c Dimension Limits E D L A Units N e 0.08 0.20 - 10° 0.26 0.51 MILLIMETERS

0.95 BSC

1.90 BSC

0.30 0.90 0.89

0.60 REF

2.90 BSC

2.80 BSC

1.60 BSC

1.45 1.30 0.15 0.60 MAX REF: Reference Dimension, usually without tolerance, for information purposes only. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or Dimensioning and tolerancing per ASME Y14.5M

 1996-2018 Microchip Technology Inc. DS20001178J-page 27 24AA00/24LC00/24C00 RECOMMENDED LAND PATTERN 5-Lead Plastic Small Outline Transistor (OT) [SOT23] For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: 1. Dimensioning and tolerancing per ASME Y14.5M Microchip Technology Drawing No. C04-2091A [OT] Dimension Limits Contact Pad Length (X5) Overall Width Distance Between Pads Contact Pad Width (X5) Contact Pitch Contact Pad Spacing 3.90 1.10 G Z Y 1.70 0.60 MAXMIN C X E Units NOM 2.80 MILLIMETERS Distance Between Pads GX 0.35 X Y Z C E GX G SILK SCREEN

DS20001178J-page 28  1996-2018 Microchip Technology Inc. APPENDIX A: REVISION HISTORY Revision E Added DFN package. Revision F (02/2007) Revised Device Selection Table; Features Section; Changed 1.8V to 1.7V; Revised Tables 1-1, 1-2; Revised Product ID System; Replaced Package Drawings; Replaced On-line Support page. Revision G (03/2007) Replaced Package Drawings (Rev. AM). Revision H (11/2011) Added TDFN Package. Revision J (08/2018) Updated the Pin Function table.

 1998-2018 Microchip Technology Inc. DS20001178J-page 1 DEVICE FAMILY THE MICROCHIP WEBSITE Microchip provides online support via our WWW site at www.microchip.com. This website is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the website contains the following information:

  • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software
  • General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing
  • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip website at www.microchip.com . Under “Support”, click on “Customer Change Notification” and follow the registration instructions. CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels:
  • Distributor or Representative
  • Local Sales Office
  • Field Application Engineer (FAE)
  • Technical Support Customers should contact their distributor, representative or Field Application Engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sa les offices and locations is included in the back of this document. Technical support is available through the website at: http://microchip.com/support

DS20001178J-page 2  1998-2018 Microchip Technology Inc. NOTES:

 1996-2018 Microchip Technology Inc. DS20001178J-page31 24AA00/24LC00/24C00 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX PackageTemperature Range Device Device: 24AA00: = 1.8V, 128 bit I 2C Serial EEPROM 24AA00T: = 1.8V, 128 bit I 2C Serial EEPROM (Tape and Reel) 24LC00: = 2.5V, 128 bit I 2C Serial EEPROM 24LC00T: = 2.5V, 128 bit I 2C Serial EEPROM (Tape and Reel) 24C00: = 5V, 128 bit I 2C Serial EEPROM 24C00T: = 5V, 128 bit I 2C Serial EEPROM (Tape and Reel) Temperature Range: I = -40°C to +85°C E = -40°C to +125°C Package: P = Plastic DIP (300 mil body), 8-lead SN = Plastic SOIC (3.90 mm body), 8-lead ST = Plastic TSSOP (4.4 mm), 8-lead OT = Plastic SOT-23, 5-lead (Tape and Reel only) MC = Plastic DFN (2x3x0.9 mm body), 8-lead MNY (1) = Plastic TDFN, (2x3x0.75 mm body), 8-lead (Tape and Reel only) Note 1: "Y" indicates a Nickel Palladium Gold (NiPdAu) finish. Examples: a) 24AA00-I/P: Industrial Temperature,1.8V PDIP package b) 24AA00-I/SN: Industrial Temperature, 1.8V, SOIC package c) 24AA00T-I/OT: Industrial Temperature, 1.8V, SOT-23 package, tape and reel d) 24LC00-I/P: Industrial Temperature, 2.5V, PDIP package e) 24C00-E/SN: Extended Temperature, 5V, SOIC package f) 24LC00T-I/OT: Industrial Temperature, 2.5V, SOT-23 package, tape and reel g) 24C00T-I/MNY: Industrial Temperature, 5V, TDFN package

DS20001178J-page 32  1996-2018 Microchip Technology Inc. NOTES:

 1996-2018 Microchip Technology Inc. DS20001178J-page 33 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application me ets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY , PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting fr om such use. No licenses are conveyed, implicitly or ot herwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP , INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2018, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-3385-9 Note the following details of the code protection feature on Microchip devices:

  • Microchip products meet the specification cont ained in their particular Microchip Data Sheet.
  • Microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used in the intended manner and under normal conditions.
  • There are dishonest and possibly illegal meth ods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
  • Microchip is willing to work with the customer who is concerned about the integrity of their code.
  • Neither Microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC ® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT S YSTEM CERTIFIED BY DNV == ISO/TS 16949 ==

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