24AA00 MICROCHIP | Alldatasheet

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Technical content

Features

  • Low-power CMOS technology - 500 µA typical active current - 250 nA typical standby current  Organized as 16 bytes x 8 bits  2-wire serial interface bus, I2C™ compatible  100 kHz (1.8V) and 400 kHz (5V) compatibility  Self-timed write cycle (including auto-erase)  4 ms maximum byte write cycle time  1,000,000 erase/write cycles  ESD protection > 4 kV  Data retention > 200 years  8L DIP , SOIC, TSSOP and 5L SOT-23 packages  Standard or Pb-free finish available  Temperature ranges available:

Description

The Microchip Technology Inc. 24AA00/24LC00/ 24C00 (24XX00*) is a 128-bit Electrically Erasable PROM memory organized as 16 x 8 with a 2-wire serial interface. Low voltage design permits operation down to 1.8 volts for the 24XX00 version, and every version maintains a maximum standby current of only 1 µA and typical active current of only 500 µA. This device was designed for where a small amount of EEPROM is needed for the storage of calibration values, ID numbers or manufacturing information, etc. The 24XX00 is available in 8-pin PDIP, 8-pin SOIC (150 mil), 8-pin TSSOP and the 5-pin SOT-23 packages. Package Types Block Diagram Pin Function Table Device V CC Range Temp Range 24AA00 1.8 - 5.5 C,I 24LC00 2.5 - 5.5 C,I 24C00 4.5 - 5.5 C,I,E - Commercial (C): 0 °Ct o+ 7 0 °C - Industrial (I): -40 °Ct o+ 8 5 °C - Automotive (E): -40 °C to +125 °C Name Function VSS Ground SDA Serial Data SCL Serial Clock VCC +1.8V to 5.5V (24AA00) +2.5V to 5.5V (24LC00) +4.5V to 5.5V (24C00) NC No Internal Connection 24XX00 24XX0024XX00 8-PIN PDIP/SOIC 8-PIN TSSOP 5-PIN SOT-23 NC NC NC Vss VCC NC SCL SDA NC NC NC V SS VCC NC SCL SDA SCL VSS SDA VCC NC HV Generator EEPROM Array YDEC XDEC Sense AMP R/W Control Memory Control Logic I/O Control Logic SDA SCL VCC VSS

128 Bit I2C ™ Bus Serial EEPROM

I2C is a trademark of Philips Corporation. *24XX00 is used in this document as a generic part number for the 24AA00/24LC00/24C00 devices.

DS21178D-page 2  2003 Microchip Technology Inc.

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings(†) FIGURE 1-1: BUS TIMING DATA † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS All Parameters apply across the recommended operating ranges unless otherwise noted Commercial (C): TA = 0°C to +70°C, VCC = 1.8V to 5.5V Industrial (I): TA = -40°C to +85°C, VCC = 1.8V to 5.5V Automotive (E) TA = -40°C to +125°C, VCC = 4.5V to 5.5V Parameter Symbol Min. Max. Units Conditions SCL and SDA pins: High-level input voltage VIH 0.7 VCC V (Note) Low-level input voltage V IL 0.3 VCC V (Note) Hysteresis of Schmitt Trigger inputs VHYS .05 VCC —V V CC ≥ 2.5V (Note) Low-level output voltage V OL 0.4 V I OL = 3.0 mA, VCC = 4.5V IOL = 2.1 mA, VCC = 2.5V Input leakage current I LI —± 1 µAV IN = VCC or VSS Output leakage current I LO —± 1 µAV OUT = VCC or VSS Pin capacitance (all inputs/outputs) CIN, C OUT —1 0 p F V CC = 5.0V (Note) TA = 25°C, f = 1 MHz Operating current I CC Write — 2 mA V CC = 5.5V, SCL = 400 kHz ICC Read — 1 mA V CC = 5.5V, SCL = 400 kHz Standby current I CCS —1 µAV CC = 5.5V, SDA = SCL = VCC Note: This parameter is periodically sampled and not 100% tested. TF THIGH TR TSU :STA TLOW THD :DAT TSU :DAT TSU :STO TBUF TAA TSP SCL SDA IN SDA OUT THD :STA

 2003 Microchip Technology Inc. DS21178D-page 3 24AA00/24LC00/24C00 TABLE 1-2: AC CHARACTERISTICS All Parameters apply across all recommended operating ranges unless otherwise noted Commercial (C): T A = 0°C to +70°C, VCC = 1.8V to 5.5V Industrial (I): TA = -40°C to +85°C, VCC = 1.8V to 5.5V Automotive (E): TA = -40°C to +125°C, VCC = 4.5V to 5.5V Parameter Symbol Min Max Units Conditions Clock frequency F CLK — 100 100 400 kHz 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.8V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Clock high time T HIGH 4000 4000 600 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.8V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Clock low time T LOW 4700 4700 1300 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.8V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V SDA and SCL rise time (Note 1) TR — 1000 1000 300 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.8V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V SDA and SCL fall time T F —3 0 0 n s (Note 1) Start condition hold time T HD :STA 4000 4000 600 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.8V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Start condition setup time T SU :STA 4700 4700 600 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.8V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Data input hold time T HD :DAT 0— n s (Note 2) Data input setup time T SU :DAT 250 250 100 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.8V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Stop condition setup time T SU :STO 4000 4000 600 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.8V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Output valid from clock (Note 2) T AA — 3500 3500 900 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.8V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Bus free time: Time the bus must be free before a new transmis- sion can start T BUF 4700 4700 1300 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.8V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Output fall time from V IH minimum to VIL maximum TOF 20+0.1 CB 250 ns (Note 1), CB ≤ 100 pF Input filter spike suppression (SDA and SCL pins) TSP —5 0 n s (Notes 1, 3) Write cycle time T WC —4 m s Endurance 1M — cycles (Note 4) Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. 3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. 4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model which can be obtained on www.microchip.com.

DS21178D-page 4  2003 Microchip Technology Inc.

2.0 PIN DESCRIPTIONS

2.1 SDA Serial Data

This is a bidirectional pin used to transfer addresses and data into and data out of the device. It is an open drain terminal, therefore the SDA bus requires a pull-up resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz). For normal data transfer SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating the Start and Stop conditions.

2.2 SCL Serial Clock

This input is used to synchronize the data transfer from and to the device.

2.3 Noise Protection

The SCL and SDA inputs have Schmitt Trigger and filter circuits which suppress noise spikes to assure proper device operation even on a noisy bus.

3.0 FUNCTIONAL DESCRIPTION

The 24XX00 supports a bidirectional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter, and a device receiving data as a receiver. The bus has to be controlled by a master device which generates the serial clock (SCL), controls the bus access, and generates the Start and Stop conditions, while the 24XX00 works as slave. Both master and slave can operate as transmitter or receiver, but the master device determines which mode is activated.

4.0 BUS CHARACTERISTICS

The following bus protocol has been defined:  Data transfer may be initiated only when the bus is not busy.  During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line while the clock line is high will be interpreted as a Start or Stop condition. Accordingly, the following bus conditions have been defined (Figure 4-1).

4.1 Bus Not Busy (A)

Both data and clock lines remain high.

4.2 Start Data Transfer (B)

A high-to-low transition of the SDA line while the clock (SCL) is high determines a Start condition. All commands must be preceded by a Start condition.

4.3 Stop Data Transfer (C)

A low-to-high transition of the SDA line while the clock (SCL) is high determines a Stop condition. All operations must be ended with a Stop condition.

4.4 Data Valid (D)

The state of the data line represents valid data when, after a Start condition, the data line is stable for the duration of the high period of the clock signal. The data on the line must be changed during the low period of the clock signal. There is one bit of data per clock pulse. Each data transfer is initiated with a Start condition and terminated with a Stop condition. The number of the data bytes transferred between the Start and Stop conditions is determined by the master device and is theoretically unlimited.

 2003 Microchip Technology Inc. DS21178D-page 5 24AA00/24LC00/24C00

4.5 Acknowledge

Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this Acknowledge bit. The device that acknowledges has to pull down the SDA line during the Acknowledge clock pulse in such a way that the SDA line is stable low during the high period of the acknowledge related clock pulse. Of course, setup and hold times must be taken into account. A master must signal an end of data to the slave by not generating an Acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the data line high to enable the master to generate the Stop condition (Figure 4-2). FIGURE 4-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS FIGURE 4-2: ACKNOWLEDGE TIMING Note: The 24XX00 does not generate any Acknowledge bits if an internal program- ming cycle is in progress. (A) (B) (C) (D) (A)(C)SCL SDA START CONDITION ADDRESS OR ACKNOWLEDGE VALID DATA ALLOWED TO CHANGE STOP CONDITION SCL 987654321 123 Transmitter must release the SDA line at this point allowing the Receiver to pull the SDA line low to acknowledge the previous eight bits of data. Receiver must release the SDA line at this point so the Transmitter can continue sending data. Data from transmitter Data from transmitterSDA Acknowledge Bit

DS21178D-page 6  2003 Microchip Technology Inc.

5.0 DEVICE ADDRESSING

After generating a Start condition, the bus master transmits a control byte consisting of a slave address and a Read/Write bit that indicates what type of operation is to be performed. The slave address for the 24XX00 consists of a 4-bit device code ‘1010’ followed by three don't care bits. The last bit of the control byte determines the operation to be performed. When set to a one a read operation is selected, and when set to a zero a write operation is selected. (Figure 5-1). The 24XX00 monitors the bus for its corresponding slave address all the time. It generates an Acknowledge bit if the slave address was true and it is not in a Programming mode. FIGURE 5-1: CONTROL BYTE FORMAT

6.0 WRITE OPERATIONS

6.1 Byte Write

Following the Start signal from the master, the device code (4 bits), the don't care bits (3 bits), and the R/W bit (which is a logic low) are placed onto the bus by the master transmitter. This indicates to the addressed slave receiver that a byte with a word address will follow after it has generated an Acknowledge bit during the ninth clock cycle. Therefore, the next byte transmit- ted by the master is the word address and will be written into the address pointer of the 24XX00. Only the lower four address bits are used by the device, and the upper four bits are don’t cares. The 24XX00 will acknowledge the address byte and the master device will then transmit the data word to be written into the addressed memory location. The 24XX00 acknowl- edges again and the master generates a Stop condition. This initiates the internal write cycle, and during this time the 24XX00 will not generate Acknowl- edge signals (Figure 7-2). After a byte Write command, the internal address counter will not be incremented and will point to the same address location that was just written. If a Stop bit is transmitted to the device at any point in the Write command sequence before the entire sequence is complete, then the command will abort and no data will be written. If more than 8 data bits are transmitted before the Stop bit is sent, then the device will clear the previously loaded byte and begin loading the data buffer again. If more than one data byte is transmitted to the device and a Stop bit is sent before a full eight data bits have been transmitted, then the Write command will abort and no data will be written. The 24XX00 employs a V CC threshold detector circuit which disables the internal erase/write logic if the VCC is below 1.5V (24AA00 and 24LC00) or 3.8V (24C00) at nominal conditions. 10 10 X X XSA C K R/W Device Select Bits Don’t Care Bits Slave Address Acknowledge BitStart Bit Read/Write Bit

 2003 Microchip Technology Inc. DS21178D-page 7 24AA00/24LC00/24C00

7.0 ACKNOWLEDGE POLLING

Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the Stop condition for a Write command has been issued from the master, the device initiates the internally timed write cycle. ACK polling can be initiated immediately. This involves the master sending a Start condition followed by the control byte for a Write command (R/W = 0). If the device is still busy with the write cycle, then no ACK will be returned. If no ACK is returned, then the Start bit and control byte must be re-sent. If the cycle is complete, then the device will return the ACK and the master can then proceed with the next Read or Write command. See Figure 7-1 for flow diagram. FIGURE 7-1: ACKNOWLEDGE POLLING FLOW FIGURE 7-2: BYTE WRITE Send Write Command Send Stop Condition to Initiate Write Cycle Send Start Send Control Byte with R/W = 0 Did Device Acknowledge (ACK = 0)? Next Operation NO YES S P BUS ACTIVITY MASTER SDA LINE BUS ACTIVITY S T A R T S T O P CONTROL BYTE WORD ADDRESS DATA A C K A C K A C K

10 X 10 X XX

X = Don’t Care Bit XXX0

DS21178D-page 8  2003 Microchip Technology Inc.

8.0 READ OPERATIONS

Read operations are initiated in the same way as write operations with the exception that the R/W bit of the slave address is set to one. There are three basic types of read operations: current address read, random read, and sequential read.

8.1 Current Address Read

The 24XX00 contains an address counter that main- tains the address of the last word accessed, internally incremented by one. Therefore, if the previous read access was to address n, the next current address read operation would access data from address n + 1. Upon receipt of the slave address with the R/W bit set to one, the device issues an acknowledge and transmits the eight-bit data word. The master will not acknowledge the transfer but does generate a Stop condition and the device discontinues transmission (Figure 8-1).

8.2 Random Read

Random read operations allow the master to access any memory location in a random manner. To perform this type of read operation, first the word address must be set. This is done by sending the word address to the device as part of a write operation. After the word address is sent, the master generates a Start condition following the acknowledge. This termi- nates the write operation, but not before the internal address pointer is set. Then the master issues the control byte again but with the R/W bit set to a one. The 24XX00 will then issue an acknowledge and transmits the eight bit data word. The master will not acknowl- edge the transfer but does generate a Stop condition and the device discontinues transmission (Figure 8-2). After this command, the internal address counter will point to the address location following the one that was just read.

8.3 Sequential Read

Sequential reads are initiated in the same way as a random read except that after the device transmits the first data byte, the master issues an acknowledge as opposed to a Stop condition in a random read. This directs the device to transmit the next sequentially addressed 8-bit word (Figure 8-3). To provide sequential reads the 24XX00 contains an internal address pointer which is incremented by one at the completion of each read operation. This address pointer allows the entire memory contents to be serially read during one operation. FIGURE 8-1: CURRENT ADDRESS READ BUS ACTIVITY MASTER SDA LINE BUS ACTIVITY PS S T O P CONTROL BYTE S T A R T DATA A C K N O A C K

1100 X X X 1

X = Don’t Care Bit

DS21178D-page 10  2003 Microchip Technology Inc.

9.0 PACKAGING INFORMATION

9.1 Package Marking Information

8-Lead PDIP (300 mil) Example: 8-Lead SOIC (150 mil) Example: XXXXXXXX T/XXYYWW NNN 8-Lead TSSOP Example: 24LC00 I/P13F 0327 24LC00 I/SN0327 13F XXXX TYWW NNN 4L00 I327 13F Legend: XX...X Customer specific information* T Temperature grade (I,E) YY Year code (last 2 digits of calendar year) Y Year code (last digit of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * Standard QTP marking consists of Microchip part number, year code, week code, and traceability code. 5-Lead SOT-23 Example: XXNN M03F Part Number TSSOP Marking Code STD Pb-Free 24AA00 4A00 G4A0 24LC00 4L00 G4L0 SOT-23 Marking Code Part Number C I E 24AA00 A0 B0 — 24LC00 L0 M0 N0 24C00 C0 D0 E0 Note: Pb-free parts are marked same as standard finish. Pb-free part number using “G” suffix is marked on carton..

 2003 Microchip Technology Inc. DS21178D-page 11 24AA00/24LC00/24C00 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) B A L p α E eB β c n D Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 88 Pitch p .100 2.54 Base to Seating Plane A1 .015 0.38 Mold Draft Angle Top α 51 01 5 51 01 5 Mold Draft Angle Bottom β 51 01 5 51 01 5 * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed JEDEC Equivalent: MS-001 Drawing No. C04-018 .010” (0.254mm) per side. § Significant Characteristic

DS21178D-page 12  2003 Microchip Technology Inc. 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC) Foot Angle φ 048048 1512015120βMold Draft Angle Bottom 1512015120αMold Draft Angle Top 1.27.050pPitch 88nNumber of Pins MAXNOMMINMAXNOMMINDimension Limits MILLIMETERSINCHES*Units D n p B E h Lβ c 45° φ α A * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 § Significant Characteristic

 2003 Microchip Technology Inc. DS21178D-page 13 24AA00/24LC00/24C00 8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP) 10501050βMold Draft Angle Bottom 10501050αMold Draft Angle Top 1.10.043AOverall Height 0.65.026pPitch 88nNumber of Pins MAXNOMMINMAXNOMMINDimension Limits MILLIMETERS*INCHESUnits α A L c β φ D n p B E Foot Angle φ 048048 * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005” (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-086 § Significant Characteristic

DS21178D-page 14  2003 Microchip Technology Inc. 5-Lead Plastic Small Outline Transistor (OT) (SOT-23) 10501050βMold Draft Angle Bottom 10501050αMold Draft Angle Top 10501050φFoot Angle 1.90.075p1Outside lead pitch (basic) 0.95.038pPitch 55nNumber of Pins MAXNOMMINMAXNOMMINDimension Limits MILLIMETERSINCHES*Units p D B n E L c β φ α A2A * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-178 Drawing No. C04-091 § Significant Characteristic

 2003 Microchip Technology Inc. DS21178D-page15 24AA00/24LC00/24C00 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. Your local Microchip sales office 2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 3. The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. PART NO. X /XX PackageTemperature Range Device Device: 24AA00: = 1.8V, 128 bit I2C™ Serial EEPROM 24AA00T: = 1.8V, 128 bit I2C Serial EEPROM (Tape and Reel) 24LC00: = 2.5V, 128 bit I2C Serial EEPROM 24LC00T: = 2.5V, 128 bit I2C Serial EEPROM (Tape and Reel) 24C00: = 5V, 128 bit I2C™ Serial EEPROM 24C00T: = 5V, 128 bit I2C™ Serial EEPROM (Tape and Reel) Temperature Range: Blank = 0°C to 70°C I = -40°C to +85°C E = -40°C to +125°C Package: Lead finish P = Plastic DIP (300 mil body), 8-lead SN = Plastic SOIC (150 mil body), 8-lead ST = Plastic TSSOP (4.4 mm), 8-lead OT = SOT-23, 5-lead (Tape and Reel only) Blank = Standard 63/37 SnPb G = Matte Tin (pure Sn) Examples: a) 24AA00-I/P: Industrial Temperature,1.8V PDIP package b) 24AA00-I/SN: Industrial Temperature, 1.8V, SOIC package c) 24AA00T-I/OT: Industrial Temperature, 1.8V, SOT-23 package, tape and reel d) 24LC00-I/P: Industrial Temperature, 2.5V, PDIP package e) 24C00-E/SN: Extended Temperature, 5V, SOIC package f) 24LC00T-I/OT: Industrial Temperature, 2.5V, SOT-23 package, tape and reel g) 24LC00-I/PG: Industrial Temperature, 2.5V PDIP package, Pb-free h) 24LC00T-I/OTG: Industrial Temperature, 2.5V, SOT-23 package, tape and reel, Pb-free Lead Finish X

DS21178D-page 16  2003 Microchip Technology Inc. NOTES:

 2003 Microchip Technology Inc. DS21178D-page 17 Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical com- ponents in life support systems is not authorized except with express written approval by Microchip. No licenses are con- veyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEE LOQ , MPLAB, PIC, PICmicro, PICSTART, PRO MATE and PowerSmart are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Application Maestro, dsPICDEM, dsPICDEM.net, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode, SmartSensor, SmartShunt, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2003, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Note the following details of the code protection feature on Microchip devices:  Microchip products meet the specification contained in their particular Microchip Data Sheet.  Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.  There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  Microchip is willing to work with the customer who is concerned about the integrity of their code.  Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company’s quality system processes and procedures are QS-9000 compliant for its PICmicro® 8-bit MCUs, KEE LOQ ® code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified.

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Kwai Fong, N.T., Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 China - Shanghai Room 701, Bldg. B Far East International Plaza No. 317 Xian Xia Road Shanghai, 200051 Tel: 86-21-6275-5700 Fax: 86-21-6275-5060 China - Shenzhen Rm. 1812, 18/F, Building A, United Plaza No. 5022 Binhe Road, Futian District Shenzhen 518033, China Tel: 86-755-82901380 Fax: 86-755-8295-1393 China - Shunde Room 401, Hongjian Building No. 2 Fengxiangnan Road, Ronggui Town Shunde City, Guangdong 528303, China Tel: 86-765-8395507 Fax: 86-765-8395571 China - Qingdao Rm. B505A, Fullhope Plaza, No. 12 Hong Kong Central Rd. Qingdao 266071, China Tel: 86-532-5027355 Fax: 86-532-5027205 India Divyasree Chambers

1 Floor, Wing A (A3/A4)

No. 11, O’Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-2290061 Fax: 91-80-2290062 Japan Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa, 222-0033, Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Singapore

200 Middle Road

#07-02 Prime Centre Singapore, 188980 Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan Kaohsiung Branch 30F - 1 No. 8 Min Chuan 2nd Road Kaohsiung 806, Taiwan Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan Taiwan Branch 11F-3, No. 207 Tung Hua North Road Taipei, 105, Taiwan Tel: 886-2-2717-7175 Fax: 886-2-2545-0139 EUROPE Austria Durisolstrasse 2 A-4600 Wels Austria Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark Regus Business Centre Lautrup hoj 1-3 Ballerup DK-2750 Denmark Tel: 45-4420-9895 Fax: 45-4420-9910 France Parc d’Activite du Moulin de Massy

43 Rue du Saule Trapu

91300 Massy, France

D-85737 Ismaning, Germany Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy Via Quasimodo, 12

20025 Legnano (MI)

Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands P . A. De Biesbosch 14 NL-5152 SC Drunen, Netherlands Tel: 31-416-690399 Fax: 31-416-690340 United Kingdom

505 Eskdale Road

Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820 07/28/03 W ORLDWIDE SALES AND SERVICE