Memory

24FC128T-I/MS

Microchip Technology

I2C??Serial EEPROM Family Data Sheet 2007

Manufacturer: Microchip Technology

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© 2007 Microchip Technology Inc. DS21930B-page 1 24AA00/24LC00/24C00 24AA01/24LC01B 24AA014/24LC014 24C01C 24AA02/24LC02B 24C02C 24AA024/24LC024 24AA025/24LC025 24AA04/24LC04B 24AA08/24LC08B 24AA16/24LC16B 24AA32A/24LC32A 24AA64/24LC64/24FC64 24AA128/24LC128/24FC128 24AA256/24LC256/24FC256 24AA512/24LC512/24FC512 Features:

128-bit through 512 Kbit devices
Single supply with operation down to 1.7V for 24AAXX devices
Low-power CMOS technology: - 1 mA active current, typical - 1 μA standby current, typical (I-temp)
2-wire serial interface bus, I2C™ compatible
Schmitt Trigger inputs for noise suppression
Output slope control to eliminate ground bounce
100 kHz (1.7V) and 400 kHz (≥ 2.5V) compatibility
1 MHz for 24FCXX products
Self-timed write cycle (including auto-erase)
Page write buffer
Hardware write-protect available on most devices
Factory programming (QTP) available
ESD protection > 4,000V
1 million erase/write cycles
Data retention > 200 years
8-lead PDIP, SOIC, TSSOP and MSOP packages
5-lead SOT-23 package (most 1-16 Kbit devices)
8-lead 2x3mm and 5x6mm DFN packages available
Pb-free and RoHS compliant
Available for extended temperature ranges: - Industrial (I): -40°C to +85°C - Automotive (E): -40°C to +125°C Description: The Microchip Technology Inc. 24CXX, 24LCXX, 24AAXX and 24FCXX (24XX*) devices are a family of 128-bit through 512 Kbit Electrically Erased PROMs. The devices are organized in blocks of x8-bit memory with 2-wire serial interfaces. Low-voltage design permits operation down to 1.7V (for 24AAXX devices), with standby and active currents of only 1 μA and 1 mA, respectively. Devices 1 Kbit and larger have page write capability. Parts having functional address lines allow connection of up to 8 devices on the same bus. The 24XX family is available in the standard 8-pin PDIP, surface mount SOIC, TSSOP and MSOP pack- ages. Most 128-bit through 16 Kbit devices are also available in the 5-lead SOT-23 package. DFN packages (2x3mm or 5x6mm) are also available. All packages are Pb-free (Matte Tin) finish. *24XX is used in this document as a generic part number for 24 series devices in this data sheet. 24XX64, for example, represents all voltages of the 64 Kbit device. Package Types(1) VSS VCC WP(3) SCL SDA PDIP/SOIC VSS VCC WP(3) SCL SDA TSSOP/MSOP(2) SCL VSS SDA VCC NC SOT-23-5 (24XX00) SOT-23-5 SCL VSS SDA WP VCC (all except 24XX00) VSS WP(3) SCL SDA VCC DFN Note 1: Pins A0, A1, A2 and WP are not used by some devices (no internal connections). See Table 1-1, Device Selection Table, for details. Pins A0 and A1 are no-connects for the 24XX128 and 24XX256 MSOP devices. Pin 7 is “not used” for 24XX00, 24XX025 and 24C01C. I2C™ Serial EEPROM Family Data Sheet

© 2007 Microchip Technology Inc. TABLE 1-1: DEVICE SELECTION TABLE Part Number VCC Range Max. Clock Frequency Page Size Write- Protect Scheme Functional Address Pins Temp. Range Packages(5) 128-bit devices 24AA00 1.7-5.5V 400 kHz(1) None None I P, SN, ST, OT, MC 24LC00 2.5-5.5V 400 kHz(1) I 24C00 4.5-5.5V 400 kHz I, E

1 Kb devices

1.7-5.5V 400 kHz (2) 8 bytes Entire Array None I P, SN, ST, MS, OT, MC 24LC01B 2.5-5.5V 400 kHz I, E 24AA014 1.7-5.5V 400 kHz(2) 16 bytes Entire Array A0, A1, A2 I P, SN, ST, MS, MC 24LC014 2.5-5.5V 400 kHz I 24C01C 4.5V-5.5V 400 kHz 16 bytes None A0, A1, A2 I, E P, SN, ST, MC

2 Kb devices

1.7-5.5V 400 kHz (2) 8 bytes Entire Array None I P, SN, ST, MS, OT, MC 24LC02B 2.5-5.5V 400 kHz I, E 24AA024 1.7-5.5V 400 kHz(2) 16 bytes Entire Array A0, A1, A2 I P, SN, ST, MS, MC 24LC024 2.5-5.5V 400 kHz I 24AA025 1.7-5.5V 400 kHz(2) 16 bytes None A0, A1, A2 I P, SN, ST,MS, MC 24LC025 2.5-5.5V 400 kHz I 24C02C 4.5-5.5V 400 kHz 16 bytes Upper Half of Array A0, A1, A2 I, E P, SN, ST, MC

4 Kb devices

1.7-5.5V 400 kHz (2) 16 bytes Entire Array None I P, SN, ST, MS, OT, MC 24LC04B 2.5-5.5V 400 kHz I, E

8 Kb devices

1.7-5.5V 400 kHz (2) 16 bytes Entire Array None I P, SN, ST, MS, OT, MC 24LC08B 2.5-5.5V 400 kHz I, E

16 Kb devices

1.7-5.5V 400 kHz (2) 16 bytes Entire Array None I P, SN, ST, MS, OT, MC 24LC16B 2.5-5.5V 400 kHz I, E

32 Kb devices

1.7-5.5V 400 kHz (2) 32 bytes Entire Array A0, A1, A2 I P, SN, SM, ST, MS, MC 24LC32A 2.5-5.5V 400 kHz I, E

64 Kb devices

1.7-5.5V 400 kHz (2) 32 bytes Entire Array A0, A1, A2 I P, SN, SM, ST, MS, MC 24LC64 2.5-5.5V 400 kHz I, E 24FC64 1.7-5.5V

1 MHz(3)

I Note 1: 100 kHz for VCC <4.5V. 100 kHz for VCC <2.5V. 400 kHz for VCC <2.5V. Pins A0 and A1 are no-connects for the 24XX128 and 24XX256 in the MSOP package. 5: P = 8-PDIP, SN = 8-SOIC (3.90 mm JEDEC), ST = 8-TSSOP, OT = 5 or 6-SOT23, MC = 2x3mm DFN, MS = 8-MSOP, SM = 8-SOIC (200 mil EIAJ), MF = 5x6mm DFN.

128 Kb devices

1.7-5.5V 400 kHz (2) 64 bytes Entire Array A0, A1, A2(4) I P, SN, SM, ST, MS, MF, ST14 24LC128 2.5-5.5V 400 kHz I, E 24FC128 1.7-5.5V I

256 Kb devices

1.7-5.5V 400 kHz (2) 64 bytes Entire Array A0, A1, A2(4) I P, SN, SM, ST, MS, MF, ST14 24LC256 2.5-5.5V 400 kHz I, E 24FC256 1.7-5.5V I

512 Kb devices

1.7-5.5V 400 kHz (2) 128 bytes Entire Array A0, A1, A2 I P, SM, MF, ST14 24LC512 2.5-5.5V 400 kHz I, E 24FC512 1.7-5.5V(3) 1 MHz I TABLE 1-1: DEVICE SELECTION TABLE (CONTINUED) Part Number VCC Range Max. Clock Frequency Page Size Write- Protect Scheme Functional Address Pins Temp. Range Packages(5) Note 1: 100 kHz for VCC <4.5V. 100 kHz for VCC <2.5V. 400 kHz for VCC <2.5V. Pins A0 and A1 are no-connects for the 24XX128 and 24XX256 in the MSOP package. 5: P = 8-PDIP, SN = 8-SOIC (3.90 mm JEDEC), ST = 8-TSSOP, OT = 5 or 6-SOT23, MC = 2x3mm DFN, MS = 8-MSOP, SM = 8-SOIC (200 mil EIAJ), MF = 5x6mm DFN.

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings (†) TABLE 2-1: DC CHARACTERISTICS † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. DC CHARACTERISTICS Electrical Characteristics: Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C Automotive (E): VCC = +2.5V to 5.5V TA = -40°C to 125°C Param. No. Sym. Characteristic Min. Max. Units Conditions A0, A1, A2, SCL, SDA and WP pins: VIH High-level input voltage

0.7 VCC

V VIL Low-level input voltage

0.3 VCC

0.2 VCC

V V VCC ≥ 2.5V VCC < 2.5V VHYS Hysteresis of Schmitt Trigger inputs (SDA, SCL pins)

0.05 VCC

V (Note 1) VOL Low-level output voltage 0.40 V IOL = 3.0 mA @ VCC = 2.5V ILI Input leakage current μA VIN = VSS or VCC ILO Output leakage current μA VOUT = VSS or VCC CIN, COUT Pin capacitance (all inputs/outputs) pF VCC = 5.0V (Note 1) TA = 25°C, FCLK = 1 MHz ICC Read Operating current 400 μA mA 24XX128, 256, 512: VCC = 5.5V, SCL = 400 kHz All except 24XX128, 256, 512: VCC = 5.5V, SCL = 400 kHz ICC Write mA mA VCC = 5.5V, All except 24XX512 VCC = 5.5V, 24XX512 D10 ICCS Standby current μA TA = -40°C to +85°C SCL = SDA = VCC = 5.5V A0, A1, A2, WP = VSS or VCC μA TA = -40°C to 125°C SCL = SDA = VCC = 5.5V A0, A1, A2, WP = VSS or VCC μA 24C01C and 24C02C only SCL = SDA = VCC = 5.5V A0, A1, A2, WP = VSS or VCC Note 1: This parameter is periodically sampled and not 100% tested.

© 2007 Microchip Technology Inc. DS21930B-page 5 24AAXX/24LCXX/24FCXX TABLE 2-2: AC CHARACTERISTICS – ALL EXCEPT 24XX00, 24C01C AND 24C02C AC CHARACTERISTICS Electrical Characteristics: Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C Automotive (E): VCC = +2.5V to 5.5V TA = -40°C to 125°C Param. No. Sym. Characteristic Min. Max. Units Conditions FCLK Clock frequency 100 400 400 1000 kHz 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FCXXX 2.5V ≤ VCC ≤ 5.5V 24FCXXX THIGH Clock high time 4000 600 600 500 ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FCXXX 2.5V ≤ VCC ≤ 5.5V 24FCXXX TLOW Clock low time 4700 1300 1300 500 ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FCXXX 2.5V ≤ VCC ≤ 5.5V 24FCXXX TR SDA and SCL rise time (Note 1) 1000 300 300 ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC ≤ 5.5V 24FCXXX TF SDA and SCL fall time (Note 1) 300 100 ns All except 24FCXXX 1.7V ≤ VCC ≤ 5.5V 24FCXXX THD:STA Start condition hold time 4000 600 600 250 ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FCXXX 2.5V ≤ VCC ≤ 5.5V 24FCXXX TSU:STA Start condition setup time 4700 600 600 250 ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FCXXX 2.5V ≤ VCC ≤ 5.5V 24FCXXX THD:DAT Data input hold time ns (Note 2) TSU:DAT Data input setup time 250 100 100 ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC ≤ 5.5V 24FCXXX TSU:STO Stop condition setup time 4000 600 600 250 ns 1.7 V ≤ VCC < 2.5V 2.5 V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FCXXX 2.5 V ≤ VCC ≤ 5.5V 24FCXXX TSU:WP WP setup time 4000 600 600 ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC ≤ 5.5V 24FCXXX THD:WP WP hold time 4700 1300 1300 ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC ≤ 5.5V 24FCXXX Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. 3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site: www.microchip.com. 4: 24FCXXX denotes the 24FC64, 24FC128, 24FC256 and 24FC512 devices.

© 2007 Microchip Technology Inc. TAA Output valid from clock (Note 2) 3500 900 900 400 ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FCXXX 2.5V ≤ VCC ≤ 5.5V 24FCXXX TBUF Bus free time: Time the bus must be free before a new transmission can start 4700 1300 1300 500 ns 1.7V ≤ VCC < 2.5V 2.5V ≤ VCC ≤ 5.5V 1.7V ≤ VCC < 2.5V 24FCXXX 2.5V ≤ VCC ≤ 5.5V 24FCXXX TOF Output fall time from VIH minimum to VIL maximum CB ≤ 100 pF 10 + 0.1CB 250 250 ns All except 24FCXXX (Note 1) 24FCXXX (Note 1) TSP Input filter spike suppression (SDA and SCL pins) ns All except 24FCXXX (Note 1) TWC Write cycle time (byte or page) ms Endurance 1,000,000 cycles 25°C (Note 3) TABLE 2-2: AC CHARACTERISTICS – ALL EXCEPT 24XX00, 24C01C AND 24C02C (CONTINUED) AC CHARACTERISTICS Electrical Characteristics: Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C Automotive (E): VCC = +2.5V to 5.5V TA = -40°C to 125°C Param. No. Sym. Characteristic Min. Max. Units Conditions Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. 3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site: www.microchip.com. 4: 24FCXXX denotes the 24FC64, 24FC128, 24FC256 and 24FC512 devices.

© 2007 Microchip Technology Inc. DS21930B-page 7 24AAXX/24LCXX/24FCXX TABLE 2-3: AC CHARACTERISTICS – 24XX00, 24C01C AND 24C02C All Parameters apply across all recommended operating ranges unless otherwise noted Industrial (I): TA = -40°C to +85°C, VCC = 1.7V to 5.5V Automotive (E): TA = -40°C to +125°C, VCC = 4.5V to 5.5V Parameter Symbol Min. Max. Units Conditions Clock frequency FCLK 100 100 400 kHz 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.7V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Clock high time THIGH 4000 4000 600 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.7V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Clock low time TLOW 4700 4700 1300 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.7V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V SDA and SCL rise time (Note 1) TR 1000 1000 300 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.7V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V SDA and SCL fall time TF 300 ns (Note 1) Start condition hold time THD:STA 4000 4000 600 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.7V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Start condition setup time TSU:STA 4700 4700 600 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.7V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Data input hold time THD:DAT ns (Note 2) Data input setup time TSU:DAT 250 250 100 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.7V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Stop condition setup time TSU:STO 4000 4000 600 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.7V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Output valid from clock (Note 2) TAA 3500 3500 900 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.7V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Bus free time: Time the bus must be free before a new transmis- sion can start TBUF 4700 4700 1300 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 1.7V ≤ Vcc ≤ 4.5V 4.5V ≤ Vcc ≤ 5.5V Output fall time from VIH minimum to VIL maximum TOF 20+0.1 CB 250 ns (Note 1), CB ≤ 100 pF Input filter spike suppression (SDA and SCL pins) TSP ns (Note 1) Write cycle time TWC 1.5 ms 24XX00 24C01C, 24C02C Endurance 1,000,000 cycles (Note 3) Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model which can be obtained at www.microchip.com.

© 2007 Microchip Technology Inc. DS21930B-page 9 24AAXX/24LCXX/24FCXX 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE 3.1 A0, A1, A2 Chip Address Inputs The A0, A1 and A2 pins are not used by the 24XX01 through 24XX16 devices. The A0, A1 and A2 inputs are used by the 24C01C, 24C02C, 24XX014, 24XX024, 24XX025 and the 24XX32 through 24XX512 for multiple device opera- tions. The levels on these inputs are compared with the corresponding bits in the slave address. The chip is selected if the compare is true. For the 24XX128 and 24XX256 in the MSOP package only, pins A0 and A1 are not connected. Up to eight devices (two for the 24XX128 and 24XX256 MSOP package) may be connected to the same bus by using different Chip Select bit combinations. In most applications, the chip address inputs A0, A1 and A2 are hard-wired to logic ‘0’ or logic ‘1’. For applications in which these pins are controlled by a microcontroller or other programmable device, the chip address pins must be driven to logic ‘0’ or logic ‘1’ before normal device operation can proceed. 3.2 Serial Data (SDA) This is a bidirectional pin used to transfer addresses and data into and out of the device. It is an open drain terminal. Therefore, the SDA bus requires a pull-up resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz and 1 MHz). For normal data transfer, SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating the Start and Stop conditions. 3.3 Serial Clock (SCL) This input is used to synchronize the data transfer to and from the device. 3.4 Write-Protect (WP) This pin must be connected to either VSS or VCC. If tied to VSS, write operations are enabled. If tied to VCC, write operations are inhibited but read operations are not affected. See Table 1-1 for the write-protect scheme of each device. 3.5 Power Supply (VCC) A VCC threshold detect circuit is employed which disables the internal erase/write logic if VCC is below 1.5V at nominal conditions. For the 24C00, 24C01C and 24C02C devices, the erase/write logic is disabled below 3.8V at nominal conditions. Pin Name 8-Pin PDIP and SOIC 8-Pin TSSOP and MSOP 5-Pin SOT-23 24XX00 5-Pin SOT-23 All except 24XX00 14-Pin TSSOP 8-Pin 5x6 DFN and 2x3 DFN Function 1(1) User configurable Chip Select(3) 2(1) User configurable Chip Select(3) User configurable Chip Select(3) VSS Ground SDA Serial Data SCL Serial Clock (NC) 3, 4, 5, 10, 11, 12 Not Connected WP 7(2) 7(2) Write-Protect Input VCC Power Supply Note Pins 1 and 2 are not connected for the 24XX128 and 24XX256 MSOP packages. Pin 7 is not used for 24XX00, 24XX025 and 24C01C. Pins A0, A1 and A2 are not used by some devices (no internal connections). See Table 1-1 for details.

© 2007 Microchip Technology Inc. 4.0 FUNCTIONAL DESCRIPTION Each 24XX device supports a bidirectional, 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter, while a device receiving data is defined as a receiver. The bus has to be controlled by a master device which gener- ates the Serial Clock (SCL), controls the bus access and generates the Start and Stop conditions, while the 24XX works as slave. Both master and slave can operate as transmitter or receiver, but the master device determines which mode is activated. Block Diagram HV Generator EEPROM Array Page Latches* YDEC XDEC Sense Amp. R/W Control Memory Control Logic I/O Control Logic I/O A0*A1*A2* SDA SCL VCC VSS WP* * A0, A1, A2, WP and page latches are not used by some devices. See Table 1-1, Device Selection Table, for details.

Data transfer may be initiated only when the bus is not busy.
During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line while the clock line is high will be interpreted as a Start or Stop condition. Accordingly, the following bus conditions have been defined (Figure 5-1). 5.1 Bus Not Busy (A) Both data and clock lines remain high. 5.2 Start Data Transfer (B) A high-to-low transition of the SDA line while the clock (SCL) is high determines a Start condition. All commands must be preceded by a Start condition. 5.3 Stop Data Transfer (C) A low-to-high transition of the SDA line while the clock (SCL) is high determines a Stop condition. All operations must be ended with a Stop condition. 5.4 Data Valid (D) The state of the data line represents valid data when, after a Start condition, the data line is stable for the duration of the high period of the clock signal. The data on the line must be changed during the low period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a Start condition and terminated with a Stop condition. The number of data bytes transferred between Start and Stop conditions is determined by the master device.

© 2007 Microchip Technology Inc. DS21930B-page 13 24AAXX/24LCXX/24FCXX 5.6 Device Addressing For Devices Without Functional Address Pins A control byte is the first byte received following the Start condition from the master device (Figure 5-3). The control byte begins with a four-bit control code. For the 24XX, this is set as ‘1010’ binary for read and write operations. The next three bits of the control byte are the block-select bits (B2, B1, B0). They are used by the master device to select which of the 256-word blocks of memory are to be accessed. These bits are in effect the three Most Significant bits of the word address. Note that B2, B1 and B0 are “don’t care” for the 24XX00, the 24XX01 and 24XX02. B2 and B1 are “don’t care” for the 24XX04. B2 is “don’t care” for the 24XX08. The last bit of the control byte defines the operation to be performed. When set to ‘1’, a read operation is selected. When set to ‘0’ a write operation is selected. Following the Start condition, the 24XX monitors the SDA bus. Upon receiving a ‘1010’ code, the block select bits and the R/W bit, the slave device outputs an Acknowledge signal on the SDA line. The address byte follows the acknowledge. FIGURE 5-3: CONTROL AND ADDRESS BYTE ASSIGNMENTS FOR DEVICES WITHOUT ADDRESS PINS S x x x R/W ACK S x x x R/W ACK S x x x R/W ACK S x x R/W ACK S x R/W ACK S R/W ACK 24XX01 24XX02 24XX04 24XX08 24XX016 x = “don’t care” bit Acknowledge Control Code Start bit Control Byte Block Select bits Address Byte 24XX00 Read/Write bit (read = 1, write = 0) x x x x x bit

© 2007 Microchip Technology Inc. 5.7 Device Addressing For Devices With Functional Address Pins A control byte is the first byte received following the Start condition from the master device (Figure 5-4). The control byte begins with a 4-bit control code. For the 24XX, this is set as ‘1010’ binary for read and write operations. The next three bits of the control byte are the Chip Select bits (A2, A1, A0). The Chip Select bits allow the use of up to eight 24XX devices on the same bus and are used to select which device is accessed. The Chip Select bits in the control byte must corre- spond to the logic levels on the corresponding A2, A1 and A0 pins for the device to respond. These bits are, in effect, the three Most Significant bits of the word address. For 24XX128 and 24XX256 in the MSOP package, the A0 and A1 pins are not connected. During device addressing, the A0 and A1 Chip Select bits (Figure 5-4) should be set to ‘0’. Only two 24XX128 or 24XX256 MSOP packages can be connected to the same bus. The last bit of the control byte defines the operation to be performed. When set to a ‘1’, a read operation is selected. When set to a ‘0’, a write operation is selected. For higher density devices (24XX32 through 24XX512), the next two bytes received define the address of the first data byte. Depending on the prod- uct density, not all bits in the address high byte are used. A15, A14, A13 and A12 are “don’t care” for 24XX32. A15, A14 and A13 are “don’t care” for 24XX64. A15 and A14 are “don’t care” for 24XX128. A15 is “don’t care” for 24XX256. All address bits are used for the 24XX512. The upper address bits are transferred first, followed by the Less Significant bits. Following the Start condition, the 24XX monitors the SDA bus. Upon receiving a ‘1010’ code, appropriate device select bits and the R/W bit, the slave device out- puts an Acknowledge signal on the SDA line. The address byte(s) follow the acknowledge. FIGURE 5-4: CONTROL AND ADDRESS BYTE ASSIGNMENTS FOR DEVICES WITH ADDRESS PINS S R/W ACK S R/W ACK S R/W ACK S R/W ACK S R/W ACK 24XX64 24XX128 24XX256 24XX512 x = “don’t care” bit Acknowledge Control Code Start bit Control Byte Chip Select bits* Address High Byte 24XX32 Read/Write bit x x x x A11 A10 x x x A12 A11 A10 x x A13 A12 A11 A10 x A14 A13 A12 A11 A10 A15 A14 A13 A12 A11 A10 bit S R/W ACK S R/W ACK S R/W ACK x 24XX024/025 24C02C 24C01C Address Byte Address Low Byte * Chip Select bits A1 and A0 must be set to ‘0’ for 24XX128/256 devices in the MSOP package. Control Byte (Read = 1, Write = 0)

© 2007 Microchip Technology Inc. DS21930B-page 15 24AAXX/24LCXX/24FCXX 5.7.1 CONTIGUOUS ADDRESSING ACROSS MULTIPLE DEVICES Chip Select bits A2, A1 and A0 can be used to expand the contiguous address space by adding up to eight 24XXs on the same bus. Software can use the three address bits of the control byte as the three Most Significant bits of the address byte. For example, in the 24XX32 devices, software can use A0 of the control byte as address bit A12; A1 as address bit A13; and A2 as address bit A14 (Table 5-1). It is not possible to sequentially read across device boundaries. TABLE 5-1: CONTROL BYTE ADDRESS BITS Maximum Devices Maximum Contiguous Address Space Chip Select Bit Chip Select Bit Chip Select Bit 1K (24C01C) 8 Kb A10 1K (24XX014) 8 Kb A10 2K (24C02C) 16 Kb A10 2K (24XX024/025) 16 Kb A10 32K (24XX32) 256 Kb A14 A13 A12 64K (24XX64) 512 Kb A15 A14 A13 128K (24XX128) 1 Mb A16* A15* A14 256K (24XX256) 2 Mb A17* A16* A15 512K (24XX512) 4 Mb A18 A17 A16 * Up to two 24XX128 or 24XX256 devices in the MSOP package can be added for up to 256 kb or 512 kb of address space, respectively. Bits A0 and A1 must be set to ‘0’.

© 2007 Microchip Technology Inc. 6.0 WRITE OPERATIONS 6.1 Byte Write A byte write operation begins with a Start condition from the master followed by the four-bit control code (see Figure 6-1 and Figure 6-2). The next 3 bits are either the Block Address bits (for devices without address pins) or the Chip Select bits (for devices with address pins). Then the master transmitter clocks the R/W bit (which is a logic low) onto the bus. The slave then generates an Acknowledge bit during the ninth clock cycle. The next byte transmitted by the master is the address byte (for 128-bit to 16 Kbit devices) or the high-order address byte (for 32-512 Kbit devices). For 32 through

512 Kbit devices, the high-order address byte is

followed by the low-order address byte. In either case, each address byte is acknowledged by the 24XX and the address bits are latched into the internal address counter of the 24XX. For the 24XX00 devices, only the lower four address bits are used by the device. The upper four bits are “don’t cares.” After receiving the ACK from the 24XX acknowledging the final address byte, the master device transmits the data word to be written into the addressed memory location. The 24XX acknowledges again and the master generates a Stop condition, which initiates the internal write cycle. If an attempt is made to write to an array with the WP pin held high, the device will acknowledge the command, but no write cycle will occur, no data will be written, and the device will immediately accept a new command. After a byte Write command, the internal address counter will increment to the next address location. During a write cycle, the 24XX will not acknowledge commands. FIGURE 6-1: BYTE WRITE: 128-BIT TO 16 KBIT DEVICES FIGURE 6-2: BYTE WRITE: 32 TO 512 KBIT DEVICES S P Bus Activity Master SDA Line Bus Activity S T A R T S T O P Control Byte Address Byte Data A C K A C K A C K Byte Bus Activity Master SDA Line Bus Activity S T A R T Control Byte High Order Address Byte Low Order Address Byte Data S T O P A C K A C K A C K A C K S P Byte

© 2007 Microchip Technology Inc. 8.3 Sequential Read Sequential reads are initiated in the same way as a random read except that after the 24XX transmits the first data byte, the master issues an acknowledge as opposed to the Stop condition used in a random read. This acknowledge directs the 24XX to transmit the next sequentially addressed data byte (Figure 8-4). Follow- ing the final byte transmitted to the master, the master will NOT generate an acknowledge but will generate a Stop condition. To provide sequential reads, the 24XX contains an internal Address Pointer which is incre- mented by one at the completion of each operation. This Address Pointer allows the entire memory con- tents to be serially read during one operation. If the last address byte in the array is acknowledged, the Address Pointer will roll over to address 0x00. FIGURE 8-4: SEQUENTIAL READ Bus Activity Master SDA Line Bus Activity Control Byte Data Byte Data Byte Data Byte Data Byte N O A C K A C K A C K A C K A C K S T O P P Initial Second Third Final

REVISION HISTORY

Original release of document. Combined Serial EEPROM 24XXX device data sheets. Revision B (02/2007) Change 1.8V to 1.7V; Removed 14-Lead TSSOP Package; Replaced Package Drawings; Revised Product ID Section. Updates throughout.

© 2007 Microchip Technology Inc. 9.0 PACKAGING INFORMATION 9.1 Package Marking Information 8-Lead PDIP Package Marking (Pb-free) Device Line 1 Marking Device Line 1 Marking Device Line 1 Marking Device Line 1 Marking 24AA00 24AA00 24LC00 24LC00 24C00 24C00 24AA01 24AA01 24LC01B 24LC01B 24AA014 24AA014 24LC014 24LC014 24C01C 24C01C 24AA02 24AA02 24LC02B 24LC02B 24AA024 24AA024 24LC024 24LC024 24AA025 24AA025 24LC025 24LC025 24C02C 24C02C 24AA04 24AA04 24LC04B 24LC04B 24AA08 24AA08 24LC08B 24LC08B 24AA16 24AA16 24LC16B 24LC16B 24AA32A 24AA32A 24LC32A 24LC32A 24AA64 24AA64 24LC64 24LC64 24FC64 24FC64 24AA128 24AA128 24LC128 24LC128 24FC128 24FC128 24AA256 24AA256 24LC256 24LC256 24FC256 24FC256 24AA512 24AA512 24LC512 24LC512 24FC512 24FC512 Note: Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion. Legend: XX...X Part number or part number code Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) plated devices Note: For very small packages with no room for the Pb-free JEDEC designator , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. e e XXXXXNNN XXXXXXXX YYWW 8-Lead PDIP I/P 1L7 24LC01B 0528 Example: Pb-free e

© 2007 Microchip Technology Inc. DS21930B-page 23 24AAXX/24LCXX/24FCXX Note: T = Temperature range: I = Industrial, E = Extended XXXXXNNN XXXXXXXX YYWW 8-Lead SOIC SN 0528 24LC01BI 1L7 Example: Pb-free e 8-Lead SOIC Package Marking (Pb-free) Device Line 1 Marking Device Line 1 Marking Device Line 1 Marking Device Line 1 Marking 24AA00 24AA00T 24LC00 24LC00T 24C00 24C00T 24AA01 24AA01T 24LC01B 24LC01BT 24AA014 24AA014T 24LC014 24LC014T 24C01C 24C01CT 24AA02 24AA02T 24LC02B 24LC02BT 24AA024 24AA024T 24LC024 24LC024T 24AA025 24AA025T 24LC025 24LC025T 24C02C 24C02CT 24AA04 24AA04T 24LC04B 24LC04BT 24AA08 24AA08T 24LC08B 24LC08BT 24AA16 24AA16T 24LC16B 24LC16BT 24AA32A 24AA32AT 24LC32A 24LC32AT 24AA64 24AA64T 24LC64 24LC64T 24FC64 24FC64T 24AA128 24AA128T 24LC128 24LC128T 24FC128 24FC128T 24AA256 24AA256T 24LC256 24LC256T 24FC256 24FC256T 24AA512 24AA512T 24LC512 24LC512T 24FC512 24FC512T Note: Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion. Legend: XX...X Part number or part number code Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) plated devices Note: For very small packages with no room for the Pb-free JEDEC designator , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. e e

© 2007 Microchip Technology Inc. 8-Lead 2x3 DFN Example: 244 506 XXX YWW NN 8-Lead 2x3mm DFN Package Marking (Pb-free) Device Industrial Line 1 Marking Device Industrial Line 1 Marking E-Temp Line 1 Marking Device Industrial Line 1 Marking E-Temp Line 1 Marking 24AA00 201 24LC00 204 205 24C00 207 208 24AA01 211 24LC01B 214 215 24AA014 2N1 24LC014 2N4 2N5 24C01C 2N7 2N8 24AA02 221 24LC02B 224 225 24AA024 2P1 24LC024 2P4 2P5 24AA025 2R1 24LC025 2R4 2R5 24C02C 2P7 2P8 24AA04 231 24LC04B 234 235 24AA08 241 24LC08B 244 245 24AA16 251 24LC16B 254 255 24AA32A 261 24LC32A 264 265 24AA64 271 24LC64 274 275 24FC64 27A 27B Legend: XX...X Part number or part number code Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) plated devices Note: For very small packages with no room for the Pb-free JEDEC designator , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. e e

© 2007 Microchip Technology Inc. DS21930B-page 25 24AAXX/24LCXX/24FCXX Note: Temperature range (T) listed on second line. I = Industrial, E = Extended 8-Lead DFN Example: Pb-free XXXXXXX T/XXXXX YYWW 24AA128 I/MF 0528 1L7 NNN e 8-Lead 5x6mm DFN Package Marking (Pb-free) Device Line 1 Marking Device Line 1 Marking Device Line 1 Marking 24AA128 24AA128 24LC128 24LC128 24FC128 24FC128 24AA256 24AA256 24LC256 24LC256 24FC256 24FC256 24AA512 24AA512 24LC512 24LC512 24FC512 24FC512 Legend: XX...X Part number or part number code Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) plated devices Note: For very small packages with no room for the Pb-free JEDEC designator , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. e e

© 2007 Microchip Technology Inc. Example: 5-Lead SOT-23 XXNN 5EL7 5-Lead SOT-23 Package Marking (Pb-free) Device Comm. Marking Indust. Marking Device Comm. Marking Indust. Marking E-Temp Marking Device Comm. Marking Indust. Marking E-Temp Marking 24AA00 A0NN B0NN 24LC00 L0NN M0NN N0NN 24C00 C0NN D0NN E0NN 24AA01 A1NN B1NN 24LC01B L1NN M1NN N1NN 24AA02 A2NN B2NN 24LC02B L2NN M2NN N2NN 24AA04 A3NN B3NN 24LC04B L3NN M3NN N3NN 24AA08 A4NN B4NN 24LC08B L4NN M4NN N4NN 24AA16 A5NN B5NN 24LC16B L5NN M5NN N5NN Legend: XX...X Part number or part number code Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) plated devices Note: For very small packages with no room for the Pb-free JEDEC designator , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. e e

© 2007 Microchip Technology Inc. DS21930B-page 27 24AAXX/24LCXX/24FCXX Note: T = Temperature range: I = Industrial, E = Extended 8-Lead MSOP (150 mil) Example: XXXXXXT YWWNNN 4L8BI 2281L7 8-Lead MSOP Package Marking (Pb-free) Device Line 1 Marking Device Line 1 Marking Device Line 1 Marking Device Line 1 Marking 24AA01 4A01T 24LC01B 4L1BT 24AA014 4A14T 24LC014 4L14T 24C01C 4C1CT 24AA02 4A02T 24LC02B 4L2BT 24AA024 4A24T 24LC024 4L24T 24AA025 4A25T 24LC025 4L25T 24C02C 4C2CT 24AA04 4A04T 24LC04B 4L4BT 24AA08 4A08T 24LC08B 4L8BT 24AA16 4A16T 24LC16B 4L16T 24AA32A 4A32AT 24LC32A 4L32AT 24AA64 4A64T 24LC64 4L64T 24FC64 4F64T 24AA128 4A128T 24LC128 4L128T 24FC128 4F128T 24AA256 4A256T 24LC256 4L256T 24FC256 4F256T Legend: XX...X Part number or part number code Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) plated devices Note: For very small packages with no room for the Pb-free JEDEC designator , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. e e

© 2007 Microchip Technology Inc. Note: T = Temperature range: I = Industrial, E = Extended NNN XXXX TYWW 8-Lead TSSOP 1L7 4L08 I228 Example: 8-Lead TSSOP Package Marking (Pb-free) Device Line 1 Marking Device Line 1 Marking Device Line 1 Marking Device Line 1 Marking 24AA00 4A00 24LC00 4L00 24C00 4C00 24AA01 4A01 24LC01B 4L1B 24AA014 4A14 24LC014 4L14 24C01C 4C1C 24AA02 4A02 24LC02B 4L02 24AA024 4A24 24LC024 4L24 24AA025 4A25 24LC025 4L25 24C02C 4C2C 24AA04 4A04 24LC04B 4L04 24AA08 4A08 24LC08B 4L08 24AA16 4A16 24LC16B 4L16 24AA32A 4AA 24LC32A 4LA 24AA64 4AB 24LC64 4LB 24FC64 4FB 24AA128 4AC 24LC128 4LC 24FC128 4FC 24AA256 4AD 24LC256 4LD 24FC256 4FD Legend: XX...X Part number or part number code Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) plated devices Note: For very small packages with no room for the Pb-free JEDEC designator , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. e e

© 2007 Microchip Technology Inc. DS21930B-page 29 24AAXX/24LCXX/24FCXX 8-Lead Plastic Dual In-Line (P or PA) – 300 mil Body [PDIP] Notes: 1. Pin 1 visual index feature may vary, but must be located with the hatched area. 2. § Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units INCHES Dimension Limits MIN NOM MAX Number of Pins N Pitch e .100 BSC Top to Seating Plane A .210 Molded Package Thickness .115 .130 .195 Base to Seating Plane .015 Shoulder to Shoulder Width E .290 .310 .325 Molded Package Width .240 .250 .280 Overall Length D .348 .365 .400 Tip to Seating Plane L .115 .130 .150 Lead Thickness c .008 .010 .015 Upper Lead Width .040 .060 .070 Lower Lead Width b .014 .018 .022 Overall Row Spacing § eB .430 N NOTE 1 D A L b e E eB c Microchip Technology Drawing C04-018B

© 2007 Microchip Technology Inc. 8-Lead Plastic Small Outline (SN or OA) – Narrow, 3.90 mm Body [SOIC] Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. § Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units MILLIMETERS Dimension Limits MIN NOM MAX Number of Pins N Pitch e

1.27 BSC

A 1.75 Molded Package Thickness 1.25 Standoff § 0.10 0.25 Overall Width E

6.00 BSC

3.90 BSC

4.90 BSC

Chamfer (optional) h 0.25 0.50 Foot Length L 0.40 1.27 Footprint

1.04 REF

φ Lead Thickness c 0.17 0.25 Lead Width b 0.31 0.51 Mold Draft Angle Top α 15° Mold Draft Angle Bottom β 15° D N e E NOTE 1 b A L c h h φ β α Microchip Technology Drawing C04-057B

© 2007 Microchip Technology Inc. DS21930B-page 31 24AAXX/24LCXX/24FCXX 8-Lead Plastic Dual Flat, No Lead Package (MC) – 2x3x0.9 mm Body [DFN] Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package may have one or more exposed tie bars at ends. 3. Package is saw singulated. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units MILLIMETERS Dimension Limits MIN NOM MAX Number of Pins N Pitch e

0.50 BSC

A 0.80 0.90 1.00 Standoff 0.00 0.02 0.05 Contact Thickness

0.20 REF

2.00 BSC

3.00 BSC

1.30 1.75 Exposed Pad Width 1.50 1.90 Contact Width b 0.18 0.25 0.30 Contact Length L 0.30 0.40 0.50 Contact-to-Exposed Pad K 0.20 D N E NOTE 1 EXPOSED PAD NOTE 1 K L N e b A NOTE 2 BOTTOM VIEW TOP VIEW Microchip Technology Drawing C04-123B

© 2007 Microchip Technology Inc. 8-Lead Plastic Dual Flat, No Lead Package (MF) – 6x5 mm Body [DFN-S] Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package may have one or more exposed tie bars at ends. 3. Package is saw singulated. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units MILLIMETERS Dimension Limits MIN NOM MAX Number of Pins N Pitch e A 0.80 0.85 1.00 Standoff 0.00 0.01 0.05 Contact Thickness D

5.00 BSC

E 3.90 4.00 4.10 Exposed Pad Width 2.20 2.30 2.40 Contact Width b 0.35 0.40 0.48 Contact Length L 0.50 0.60 0.75 Contact-to-Exposed Pad K 0.20 NOTE 2 A NOTE 1 E N D EXPOSED PAD NOTE 1 L N e b K BOTTOM VIEW TOP VIEW Microchip Technology Drawing C04-122B

© 2007 Microchip Technology Inc. DS21930B-page 33 24AAXX/24LCXX/24FCXX 5-Lead Plastic Small Outline Transistor (OT or CT) [SOT-23] Notes: 1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.127 mm per side. 2. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units MILLIMETERS Dimension Limits MIN NOM MAX Number of Pins N Lead Pitch e

0.95 BSC

1.90 BSC

A 0.90 1.45 Molded Package Thickness 0.89 1.30 Standoff 0.00 0.15 Overall Width E 2.20 3.20 Molded Package Width 1.30 1.80 Overall Length D 2.70 3.10 Foot Length L 0.10 0.60 Footprint 0.35 0.80 Foot Angle φ 30° Lead Thickness c 0.08 0.26 Lead Width b 0.20 0.51 φ N b E D e A c L Microchip Technology Drawing C04-091B

© 2007 Microchip Technology Inc. 8-Lead Plastic Micro Small Outline Package (MS or UA) [MSOP] Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units MILLIMETERS Dimension Limits MIN NOM MAX Number of Pins N Pitch e

0.65 BSC

A 1.10 Molded Package Thickness 0.75 0.85 0.95 Standoff 0.00 0.15 Overall Width E D L 0.40 0.60 0.80 Footprint

0.95 REF

φ Lead Thickness c 0.08 0.23 Lead Width b 0.22 0.40 D N E NOTE 1 e b A c L φ Microchip Technology Drawing C04-111B

© 2007 Microchip Technology Inc. DS21930B-page 35 24AAXX/24LCXX/24FCXX 8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP] Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units MILLIMETERS Dimension Limits MIN NOM MAX Number of Pins N Pitch e A 1.20 Molded Package Thickness 0.80 1.00 1.05 Standoff 0.05 0.15 Overall Width E

6.40 BSC

4.30 4.40 4.50 Molded Package Length D 2.90 3.00 3.10 Foot Length L 0.45 0.60 0.75 Footprint

1.00 REF

φ Lead Thickness c 0.09 0.20 Lead Width b 0.19 0.30 D N E NOTE 1 b e c A L φ Microchip Technology Drawing C04-086B

© 2007 Microchip Technology Inc. DS21930B-page 37 24AAXX/24LCXX/24FCXX THE MICROCHIP WEB SITE Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information:

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Development Systems Information Line Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com

© 2007 Microchip Technology Inc. READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod- uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: Technical Publications Manager RE: Reader Response From: Name Company Address City / State / ZIP / Country Application (optional): Would you like a reply? Y N Device: Literature Number: Questions: DS21930B 24AAXX/24LCXX/24FCXX What are the best features of this document? How does this document meet your hardware and software development needs? Do you find the organization of this document easy to follow? If not, why? What additions to the document do you think would enhance the structure and subject? What deletions from the document could be made without affecting the overall usefulness? Is there any incorrect or misleading information (what and where)? How would you improve this document?

© 2007 Microchip Technology Inc. DS21930B-page 39 24AAXX/24LCXX/24FCXX PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX Package Temperature Range Device Part Examples: 24AA014-I/SN: Kbit, Industrial Temperature, 1.7V, SOIC package 24AA02T-I/OT: Kbit, Industrial Temperature, 1.7V, SOT-23 package, Tape and Reel 24LC16B-I/P: 16 Kbit, Industrial Tempera- ture, 2.5V, PDIP package 24LC32A-E/MS: Kbit, Extended Temperature, 2.5V, MSOP package 24LC64T-I/MC: Kbit, Industrial Temperature, 2.5V 2x3 mm DFN package, Tape and Reel 24FC512T-I/SM: 512 Kbit, Industrial Temperature, 1 MHz, SOIC package, Tape and Reel Device: See Table 1-1 Temperature Range: I -40°C to +85°C E -40°C to +125°C Packaging Medium: T Tape and Reel Blank = Tube Package: P Plastic DIP (300 mil body), 8-lead SN Plastic SOIC (3.90 mm body), 8-lead SM Plastic SOIC (208 mil body), 8-lead ST Plastic TSSOP (4.4 mm), 8-lead MS Plastic Micro Small Outline (MSOP), 8-lead OT SOT-23, 5-lead (Tape and Reel only) MC 2x3 mm DFN, 8-lead MF 5x6 mm DFN, 8-lead Number (Table 1-1) X Packaging Medium

© 2007 Microchip Technology Inc. DS21930B-page 41 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Note the following details of the code protection feature on Microchip devices: Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.

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Product Information

24FC128T-I/MS specifications and overview.

Summary

I2C??Serial EEPROM Family Data Sheet 2007

Description

I2C??Serial EEPROM Family Data Sheet 2007

Source title 24FC128T-I/MS Datasheet(PDF) - Microchip Technology

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