232ECBNZ

HIN202E INTERSIL | Alldatasheet

Document overview

Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
PDF pages: 22

Technical content

Features

Pb-Free Plus Anneal Available (RoHS Compliant)
ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)
Meets All RS-232E and V.28 Specifications
Requires Only 0.1 µF or Greater External Capacitors
Two Receivers Active in Shutdown Mode (HIN213E)
Requires Only Single +5V Power Supply
Onboard Voltage Doubler/Inverter
Three-State TTL/CMOS Receiver Outputs
Multiple Drivers - ±10V Output Swing for +5V Input -3 0 0Ω Power-Off Source Impedance - Output Current Limiting - TTL/CMOS Compatible
Multiple Receivers - ±30V Input Voltage Range -3 k Ω to 7kΩ Input Impedance - 0.5V Hysteresis to Improve Noise Rejection

Applications

Any System Requiring High-Speed RS-232 Communications Port - Computer - Portable, Mainframe, Laptop - Peripheral - Printers and Terminals - Instrumentation, UPS - Modems, ISDN Terminal Adaptors Selection Table PART NUMBER POWER SUPPLY VOLTAGE NUMBER OF RS-232 DRIVERS NUMBER OF RS-232 RECEIVERS NUMBER OF 0.1µF EXTERNAL CAPACITORS LOW POWER SHUTDOWN/TTL THREE-STATE NUMBER OF RECEIVERS ACTIVE IN SHUTDOWN HIN202E +5V 2 2 4 Capacitors No/No 0 HIN206E +5V 4 3 4 Capacitors Yes/Yes 0 HIN207E +5V 5 3 4 Capacitors No/No 0 HIN208E +5V 4 4 4 Capacitors No/No 0 HIN211E +5V 4 5 4 Capacitors Yes/Yes 0 HIN213E +5V 4 5 4 Capacitors Yes/Yes 2 HIN232E +5V 2 2 4 Capacitors No/No 0 Data Sheet November 4, 2005 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003-2005. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.

2 FN4315.16 November 4, 2005

Ordering Information

PART NO. PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # HIN202ECB HIN202ECB 0 to 70 16 Ld SOIC (W) M16.3 HIN202ECB-T HIN202ECB 16 Ld SOIC (W) Tape and Reel M16.3 HIN202ECBZ (Note) 202ECBZ 0 to 70 16 Ld SOIC (W) (Pb-free) M16.3 HIN202ECBZ-T (Note) 202ECBZ 16 Ld SOIC (W) Tape and Reel (Pb-free) M16.3 HIN202ECBN HIN202ECBN 0 to 70 16 Ld SOIC (N) M16.15 HIN202ECBN-T HIN202ECBN 16 Ld SOIC (N) Tape and Reel M16.15 HIN202ECBNZ (Note) 202ECBNZ 0 to 70 16 Ld SOIC (N) (Pb-free) M16.15 HIN202ECBNZ-T (Note) 202ECBNZ 16 Ld SOIC (N) Tape and Reel (Pb-free) M16.15 HIN202ECP HIN202ECP 0 to 70 16 Ld PDIP E16.3 HIN202ECPZ (Note) 202ECPZ 0 to 70 16 Ld PDIP* (Pb-free) E16.3 HIN202EIB HIN202EIB -40 to 85 16 Ld SOIC (W) M16.3 HIN202EIB-T HIN202EIB 16 Ld SOIC (W) Tape and Reel M16.3 HIN202EIBZ (Note) 202EIBZ -40 to 85 16 Ld SOIC (W) (Pb-free) M16.3 HIN202EIBZ-T (Note) 202EIBZ 16 Ld SOIC (W) Tape and Reel (Pb-free) M16.3 HIN202EIBN HIN202EIBN -40 to 85 16 Ld SOIC (N) M16.15 HIN202EIBN-T HIN202EIBN 16 Ld SOIC (N) Tape and Reel M16.15 HIN202EIBNZ (Note) 202EIBNZ -40 to 85 16 Ld SOIC (N) (Pb-free) M16.15 HIN202EIBNZ-T (Note) 202EIBNZ 16 Ld SOIC (N) Tape and Reel (Pb-free) M16.15 HIN206ECB HIN206ECB 0 to 70 24 Ld SOIC M24.3 HIN206ECB-T HIN206ECB 24 Ld SOIC Tape and Reel M24.3 HIN206ECBZ (Note) HIN206ECBZ 0 to 70 24 Ld SOIC (Pb-free) M24.3 HIN206ECBZ-T (Note) HIN206ECBZ 24 Ld SOIC Tape and Reel (Pb-free) M24.3 HIN206EIA HIN206EIA -40 to 85 24 Ld SSOP M24.209 HIN206EIAZ (Note) HIN206EIAZ -40 to 85 24 Ld SSOP (Pb-free) M24.209 HIN206EIAZ-T (Note) HIN206EIAZ 24 Ld SSOP Tape and Reel (Pb-free) M24.209 HIN206EIAZA (Note) HIN206EIAZ -40 to 85 24 Ld SSOP (Pb-free) M24.209 HIN206EIAZA-T (Note) HIN206EIAZ 24 Ld SSOP Tape and Reel (Pb-free) M24.209 HIN207ECA-T HIN207ECA 24 Ld SSOP Tape and Reel M24.209 HIN207ECAZ (Note) HIN207ECAZ 0 to 70 24 Ld SSOP (Pb-free) M24.209 HIN207ECAZ-T (Note) HIN207ECAZ 24 Ld SSOP Tape and Reel (Pb-free) M24.209 HIN207ECB HIN207ECB 0 to 70 24 Ld SOIC M24.3 HIN207ECB-T HIN207ECB 24 Ld SOIC Tape and Reel M24.3 HIN207ECBZ (Note) HIN207ECBZ 0 to 70 24 Ld SOIC (Pb-free) M24.3 HIN207ECBZ-T (Note) HIN207ECBZ 24 Ld SOIC Tape and Reel (Pb-free) M24.3 HIN207EIA HIN207EIA -40 to 85 24 Ld SSOP M24.209 HIN207EIAZ (Note) HIN207EIAZ -40 to 85 24 Ld SSOP (Pb-free) M24.209 HIN207EIAZ-T (Note) HIN207EIAZ 24 Ld SSOP Tape and Reel (Pb-free) M24.209 HIN207EIB HIN207EIB -40 to 85 24 Ld SOIC M24.3 HIN207EIB-T HIN207EIB 24 Ld SOIC Tape and Reel M24.3 HIN207EIBZ (Note) HIN207EIBZ -40 to 85 24 Ld SOIC (Pb-free) M24.3 HIN207EIBZ-T (Note) HIN207EIBZ 24 Ld SOIC Tape and Reel (Pb-free) M24.3 HIN208ECA HIN208ECA 0 to 70 24 Ld SSOP M24.209 HIN208ECA-T HIN208ECA 24 Ld SSOP Tape and Reel M24.209 HIN208ECAZ (Note) HIN208ECAZ 0 to 70 24 Ld SSOP (Pb-free) M24.209 HIN208ECAZ-T (Note) HIN208ECAZ 24 Ld SSOP Tape and Reel (Pb-free) M24.209 HIN208ECAZA-T (Note) HIN208ECAZ 24 Ld SSOP Tape and Reel (Pb-free) M24.209 HIN208ECB HIN208ECB 0 to 70 24 Ld SOIC M24.3 HIN208ECB-T HIN208ECB 24 Ld SOIC Tape and Reel M24.3 HIN208ECBZ (Note) HIN208ECBZ 0 to 70 24 Ld SOIC (Pb-free) M24.3 HIN208ECBZ-T (Note) HIN208ECBZ 24 Ld SOIC Tape and Reel (Pb-free) M24.3 HIN208EIA HIN208EIA -40 to 85 24 Ld SSOP M24.209 HIN208EIA-T HIN208EIA 24 Ld SSOP Tape and Reel M24.209 Ordering Information (Continued) PART NO. PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E

3 FN4315.16 November 4, 2005 HIN208EIAZ (Note) HIN208EIAZ -40 to 85 24 Ld SSOP (Pb-free) M24.209 HIN208EIAZ-T (Note) HIN208EIAZ 24 Ld SSOP Tape and Reel (Pb-free) M24.209 HIN208EIB HIN208EIB -40 to 85 24 Ld SOIC M24.3 HIN208EIBZ (Note) HIN208EIBZ -40 to 85 24 Ld SOIC (Pb-free) M24.3 HIN211ECA HIN211ECA 0 to 70 28 Ld SSOP M28.209 HIN211ECA-T HIN211ECA 28 Ld SSOP Tape and Reel M28.209 HIN211ECAZ (Note) HIN211ECAZ 0 to 70 28 Ld SSOP (Pb-free) M28.209 HIN211ECAZ-T (Note) HIN211ECAZ 28 Ld SSOP Tape and Reel (Pb-free) M28.209 HIN211ECB HIN211ECB 0 to 70 28 Ld SOIC M28.3 HIN211ECBZ (Note) HIN211ECBZ 0 to 70 28 Ld SOIC (Pb-free) M28.3 HIN211ECBZ-T (Note) HIN211ECBZ 28 Ld SOIC Tape and Reel (Pb-free) M28.3 HIN211EIA HIN211EIA -40 to 85 28 Ld SSOP M28.209 HIN211EIA-T HIN211EIA 28 Ld SSOP Tape and Reel M28.209 HIN211EIAZ (Note) HIN211EIAZ -40 to 85 28 Ld SSOP (Pb-free) M28.209 HIN211EIAZ-T (Note) HIN211EIAZ 28 Ld SSOP Tape and Reel (Pb-free) M28.209 HIN211EIB HIN211EIB -40 to 85 28 Ld SOIC M28.3 HIN211EIBZ (Note) HIN211EIBZ -40 to 85 28 Ld SOIC (Pb-free) M28.3 HIN213ECA HIN213ECA 0 to 70 28 Ld SSOP M28.209 HIN213ECA-T HIN213ECA 28 Ld SSOP Tape and Reel M28.209 HIN213ECAZ (Note) HIN213ECAZ 0 to 70 28 Ld SSOP (Pb-free) M28.209 HIN213ECAZ-T (Note) HIN213ECAZ 28 Ld SSOP Tape and Reel (Pb-free) M28.209 HIN213EIA HIN213EIA -40 to 85 28 Ld SSOP M28.209 HIN213EIA-T HIN213EIA 28 Ld SSOP Tape and Reel M28.209 HIN213EIAZ (Note) HIN213EIAZ -40 to 85 28 Ld SSOP (Pb-free) M28.209 HIN213EIAZ-T (Note) HIN213EIAZ 28 Ld SSOP Tape and Reel (Pb-free) M28.209 HIN213EIB HIN213EIB -40 to 85 28 Ld SOIC M28.3 HIN213EIBZ (Note) HIN213EIBZ -40 to 85 28 Ld SOIC (Pb-free) M28.3 Ordering Information (Continued) PART NO. PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # HIN232ECA HIN232ECA 0 to 70 16 Ld SSOP M16.209 HIN232ECA-T HIN232ECA 16 Ld SSOP Tape and Reel M16.209 HIN232ECAZ-T (Note) HIN232ECAZ 16 Ld SSOP Tape and Reel (Pb-free) M16.209 HIN232ECB HIN232ECB 0 to 70 16 Ld SOIC (W) M16.3 HIN232ECB-T HIN232ECB 16 Ld SOIC (W) Tape and Reel M16.3 HIN232ECBN HIN232ECBN 0 to 70 16 Ld SOIC (N) M16.15 HIN232ECBN-T HIN232ECBN 16 Ld SOIC (N) Tape and Reel M16.15 HIN232ECBNZ (Note) 232ECBNZ 0 to 70 16 Ld SOIC (N) (Pb-free) M16.15 HIN232ECBNZ-T (Note) 232ECBNZ 16 Ld SOIC (N) Tape and Reel (Pb-free) M16.15 HIN232ECBZ (Note) 232ECBZ 0 to 70 16 Ld SOIC (W) (Pb-free) M16.3 HIN232ECBZ-T (Note) 232ECBZ 16 Ld SOIC (W) Tape and Reel (Pb-free) M16.3 HIN232ECP HIN232ECP 0 to 70 16 Ld PDIP E16.3 HIN232ECPZ (Note) HIN232ECPZ 0 to 70 16 Ld PDIP* (Pb-free) E16.3 HIN232EIBN HIN232EIBN -40 to 85 16 Ld SOIC (N) M16.15 HIN232EIBN-T HIN232EIBN 16 Ld SOIC (N) Tape and Reel M16.15 HIN232EIBNZ (Note) 232EIBNZ -40 to 85 16 Ld SOIC (N) (Pb-free) M16.15 HIN232EIBNZ-T (Note) 232EIBNZ 16 Ld SOIC (N) Tape and Reel (Pb-free) M16.15 HIN232EIV HIN232EIV -40 to 85 16 Ld TSSOP M16.173 HIN232EIV-T HIN232EIV 16 Ld TSSOP Tape and Reel M16.173 HIN232EIVZ (Note) 232EIVZ -40 to 85 16 Ld TSSOP (Pb-free) M16.173 HIN232EIVZ-T (Note) 232EIVZ 16 Ld TSSOP Tape and Reel (Pb-free) M16.173 *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Ordering Information (Continued) PART NO. PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E

4 FN4315.16 November 4, 2005 Pinouts HIN202E (PDIP, SOIC) TOP VIEW HIN206E (SOIC, SSOP) TOP VIEW C1+ C1- C2+ C2- R2IN T2OUT VCC T1OUT R1IN R1OUT T1IN T2IN R2OUT GND T3OUT T1OUT T2OUT R1IN R1OUT T2IN T1IN GND VCC C1+ C1- T4OUT R2OUT SD EN T4IN R3OUT C2- C2+ IN T3IN R3IN VCC +5V T1OUT T2OUT T1IN T2IN +5V 400kΩ +5V 400kΩ R1OUT R1IN 1312 5kΩ R2OUT R2IN 5kΩ +10V TO -10V VOLTAGE INVERTER 0.1µF 6 V- C2+ C2- +0.1µF +5V TO 10V VOLTAGE INVERTER C1+ C1- +0.1µF 0.1µF GND VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1OUT T2OUT T3OUT T4OUTT4IN T1IN T2IN T3IN +5V 0.1µF 0.1µF +0.1µF 18 1 19 24 C1+ C1- C2+ C2- +5V 400kΩ +5V 400kΩ +5V 400kΩ +5V 400kΩ +0.1µF R1OUT R1IN 5kΩ R2OUT R2IN 2322 5kΩ R3OUT R3IN 1617 5kΩ EN 20 21 SD GND HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E

5 FN4315.16 November 4, 2005 HIN207E (SOIC, SSOP) TOP VIEW HIN208E (SOIC, SSOP) TOP VIEW Pinouts (Continued) T3OUT T1OUT T2OUT R1IN R1OUT T2IN T1IN GND VCC C1+ C1- T4OUT R2OUT T5IN T5OUT T4IN R3OUT C2- C2+ IN T3IN R3IN T2OUT T1OUT R2IN R2OUT T1IN R1OUT R1IN GND VCC C1+ C1- T3OUT R3OUT T4IN T4OUT T3IN R4OUT C2- C2+ IN T2IN R4IN VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1OUT T2OUT T3OUT T4OUTT4IN T1IN T2IN T3IN +5V 0.1µF 0.1µF +0.1µF 18 1 19 24 C1+ C1- C2+ C2- +5V 400kΩ +5V 400kΩ +5V 400kΩ +5V 400kΩ +0.1µF R1OUT R1IN 5kΩ R2OUT R2IN 2322 5kΩ R3OUT R3IN 1617 5kΩ T5OUTT5IN 21 20 +5V 400kΩ GND VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1OUT T2OUT T3OUT T4OUTT4IN T1IN T2IN T3IN +5V 0.1µF 0.1µF +0.1µF 19 24 21 20 C1+ C1- C2+ C2- +5V 400kΩ +5V 400kΩ +5V 400kΩ +5V 400kΩ +0.1µF R1OUT R1IN 5kΩ R2OUT R2IN 5kΩ R3OUT R3IN 2322 5kΩ R4OUT R4IN 1617 5kΩ GND HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E

6 FN4315.16 November 4, 2005 HIN211E (SOIC, SSOP) TOP VIEW HIN213E (SOIC, SSOP) TOP VIEW NOTE: R4 and R5 active in shutdown. Pinouts (Continued) T3OUT T1OUT T2OUT R2IN R2OUT T2IN T1IN R1OUT R1IN GND VCC C1+ C1- T4OUT R3OUT SD EN R4IN T4IN R5OUT R5IN C2- C2+ R3IN R4OUT T3IN T3OUT T1OUT T2OUT R2IN R2OUT T2IN T1IN R1OUT R1IN GND VCC C1+ C1- T4OUT R3OUT SD EN R4IN T4IN R5OUT R5IN C2- C2+ R3IN R4OUT T3IN VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1OUT T2OUT T3OUT T1IN T2IN T3IN +5V 0.1µF 0.1µF +0.1µF 20 1 C1+ C1- C2+ C2- +5V 400kΩ +5V 400kΩ +5V 400kΩ +0.1µF R1OUT R1IN 5kΩ R2OUT R2IN 5kΩ R3OUT R3IN 2726 5kΩ R4OUT R4IN 2322 5kΩ R5OUT R5IN 1819 5kΩ EN T4OUTT4IN 21 28 +5V 400kΩ SD GND VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1OUT T2OUT T3OUT T1IN T2IN T3IN +5V 0.1µF 0.1µF +0.1µF 20 1 C1+ C1- C2+ C2- +5V 400kΩ +5V 400kΩ +5V 400kΩ +0.1µF R1OUT R1IN 5kΩ R2OUT R2IN 5kΩ R3OUT R3IN 2726 5kΩ R4OUT R4IN 2322 5kΩ R5OUT R5IN 1819 5kΩ EN T4OUTT4IN 21 28 +5V 400kΩ SD GND HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E

7 FN4315.16 November 4, 2005 HIN232E (PDIP, SOIC, SSOP, TSSOP) TOP VIEW Pin Descriptions PIN FUNCTION VCC Power Supply Input 5V ±10%, (5V ±5% HIN207E). V+ Internally generated posit ive supply (+10V nominal). V- Internally generated negative supply (-10V nominal). GND Ground Lead. Connect to 0V. C1+ External capacitor (+ termi nal) is connected to this lead. C1- External capacitor (- terminal) is connected to this lead. C2+ External capacitor (+ termi nal) is connected to this lead. C2- External capacitor (- terminal) is connected to this lead. TIN Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400kΩ pull-up resistor to VCC is connected to each lead. TOUT Transmitter Outputs. These are RS-232 levels (nominally ±10V). RIN Receiver Inputs. These inputs accept RS-232 input levels. An internal 5kΩ pull-down resistor to GND is connected to each input. ROUT Receiver Outputs. These are TTL/CMOS levels. EN, EN Receiver Enable Input. With EN = 5V (HIN213E EN=0V), the receiver outputs are placed in a high impedance state. SD, SD Shutdown Input. With SD = 5V (HIN213E SD = 0V), the charge pump is disabled, the receiver outputs are in a high impedance state (except R4 and R5 of HIN213E) and the transmitters are shut off. NC No Connect. No connections are made to these leads. Pinouts (Continued) C1+ C1- C2+ C2- R2IN T2OUT VCC T1OUT R1IN R1OUT T1IN T2IN R2OUT GND VCC +5V T1OUT T2OUT T1IN T2IN +5V 400kΩ +5V 400kΩ R1OUT R1IN 1312 5kΩ R2OUT R2IN 5kΩ +10V TO -10V VOLTAGE INVERTER 0.1µF 6 V- C2+ C2- +0.1µF +5V TO 10V VOLTAGE INVERTER C1+ C1- +0.1µF 0.1µF GND HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E

8 FN4315.16 November 4, 2005 Absolute Maximum Ratings Thermal Information Input Voltages T Output Voltages Short Circuit Duration Operating Conditions Temperature Range Thermal Resistance (Typical, Note 1) θJA (°C/W) (SOIC and SSOP - Lead Tips Only) *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. CAUTION: Stresses above those listed in “Abs olute Maximum Ratings” may cause permanent dam age to the device. This is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Range PARAMETER TEST CONDITIONS MIN TYP MAX UNITS SUPPLY CURRENTS Power Supply Current, I CC No Load, TA = 25°C HIN202E - 8 15 mA HIN206E - HIN208E, HIN211E, HIN213E -1 1 2 0 m A HIN232E - 5 10 mA Shutdown Supply Current, ICC(SD) T A = 25°C HIN206E, HIN211E - 1 10 µA HIN213E - 15 50 µA LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS Input Logic Low, VlL TIN, EN, SD, EN, SD -- 0 . 8 V Input Logic High, VlH TIN 2.0 - - V EN, SD, EN, SD 2.4 - - V Transmitter Input Pullup Current, IP TIN = 0V - 15 200 µA TTL/CMOS Receiver Output Voltage Low, VOL IOUT = 1.6mA (HIN202E, HIN232E, I OUT = 3.2mA) - 0.1 0.4 V TTL/CMOS Receiver Output Voltage High, VOH IOUT = -1mA 3.5 4.6 - V TTL/CMOS Receiver Output Leakage EN = VCC, EN = 0, 0V < ROUT < VCC -0 . 5 ±10 µA RECEIVER INPUTS RS-232 Input Voltage Range, VIN -30 - +30 V Receiver Input Impedance, RIN TA = 25°C, VIN = ±3V 3.0 5.0 7.0 k Ω Receiver Input Low Threshold, VIN (H-L) V CC = 5V, TA = 25°C Active Mode - 1.2 - V Shutdown Mode HIN213E R4 and R5 - 1.5 - V Receiver Input High Threshold, VIN (L-H) V CC = 5V, TA = 25°C Active Mode - 1.7 2.4 V Shutdown Mode HIN213E R4 and R5 - 1.5 2.4 V Receiver Input Hysteresis, VHYST VCC = 5V, No Hysteresis in Shutdown Mode 0.2 0.5 1.0 V HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E

FIGURE 1. GENERAL TEST CIRCUIT F IGURE 2. POWER-OFF SOURCE RESISTANCE

FIGURE 9. V- SUPPLY VOLTAGE vs V CC FIGURE 10. V+, V- OUTPUT VOLTAGE vs LOAD

16 VCC

FIGURE 8. COMBINING TWO HIN232Es FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS

13 FN4315.16 November 4, 2005 Die Characteristics METALLIZATION: Type: Al Thickness: 10k Å ±1kÅ SUBSTRATE POTENTIAL GND PASSIVATION: Type: Nitride over Silox Nitride Thickness: 8k Å Silox Thickness: 7k Å TRANSISTOR COUNT: 185 PROCESS: CMOS Metal Gate Metallization Mask Layout HIN232E PIN 1 C1+ PIN 2 V+ C1- PIN 7 PIN 17 V CC PIN 3 C2+ PIN 4 C2- PIN 5 PIN 6 T2IN PIN 11 T1IN PIN 12 R1OUT PIN 13 R1IN PIN 14 T1OUT PIN 15 GND PIN 16 T2OUT PIN 8R2IN PIN 9T3OUT PIN 10R2OUT HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E

14 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Dual-In-Line Plastic Packages (PDIP) NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JE- DEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and are measured with the leads constrained to be perpendic- ular to datum . 7. e B and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. eA -C- CL E eA C eB eC -B- INDEX 12 3 N / 2 N AREA SEATING BASE PLANE PLANE -C- B e D AA2 L -A- 0.010 (0.25) C AM BS E16.3 (JEDEC MS-001-BB ISSUE D)

16 LEAD DUAL-IN-LINE PLASTIC PACKAGE

A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.15 1.77 8, 10 C 0.008 0.014 0.204 0.355 - D 0.735 0.775 18.66 19.68 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2.54 BSC - e A 0.300 BSC 7.62 BSC 6 eB - 0.430 - 10.92 7 L 0.115 0.150 2.93 3.81 4 N1 6 1 6 9 Rev. 0 12/93

15 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. INDEX AREA E D N 123 -B- 0.25(0.010) C AM BS e -A- L B M -C- A SEATING PLANE 0.10(0.004) h x 45° C H 0.25(0.010) BM M α M16.15 (JEDEC MS-012-AC ISSUE C)

16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE

A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.3859 0.3937 9.80 10.00 3 E 0.1497 0.1574 3.80 4.00 4 e 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N1 6 1 6 7 α 0° 8° 0° 8° - Rev. 1 6/05

16 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Thin Shrink Small Outline Plastic Packages (TSSOP) NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AB, Issue E. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimen- sions are not necessarily exact. (Angles in degrees) α INDEX AREA D N 123 -B- 0.10(0.004) C AM BS e -A- b M -C- A SEATING PLANE 0.10(0.004) c E 0.25(0.010) BM M L 0.25 0.010 GAUGE PLANE 0.05(0.002) M16.173

16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE

A - 0.043 - 1.10 - A1 0.002 0.006 0.05 0.15 - A2 0.033 0.037 0.85 0.95 - b 0.0075 0.012 0.19 0.30 9 c 0.0035 0.008 0.09 0.20 - D 0.193 0.201 4.90 5.10 3 E1 0.169 0.177 4.30 4.50 4 e 0.026 BSC 0.65 BSC - E 0.246 0.256 6.25 6.50 - L 0.020 0.028 0.50 0.70 6 N1 6 1 6 7 α 0o 8o 0o 8o - Rev. 1 2/02

17 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SSOP) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen- sion at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. INDEX AREA E D N 123 -B- 0.25(0.010) C AM BS e -A- L B M -C- A SEATING PLANE 0.10(0.004) C H 0.25(0.010) BM M α 0.25 0.010 GAUGE PLANE M16.209 (JEDEC MO-150-AC ISSUE B)

16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE

A - 0.078 - 2.00 - A2 0.065 0.072 1.65 1.85 - B 0.009 0.014 0.22 0.38 9 C 0.004 0.009 0.09 0.25 - D 0.233 0.255 5.90 6.50 3 E 0.197 0.220 5.00 5.60 4 e 0.026 BSC 0.65 BSC - H 0.292 0.322 7.40 8.20 - L 0.022 0.037 0.55 0.95 6 N1 6 1 6 7 α 0° 8° 0° 8° - Rev. 3 6/05

18 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. INDEX AREA E D N 123 -B- 0.25(0.010) C AM BS e -A- L B M -C- A SEATING PLANE 0.10(0.004) h x 45° C H 0.25(0.010) BM M α M16.3 (JEDEC MS-013-AA ISSUE C)

16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE

A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.3977 0.4133 10.10 10.50 3 E 0.2914 0.2992 7.40 7.60 4 e 0.050 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N1 6 1 6 7 α 0° 8° 0° 8° - Rev. 1 6/05

19 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Shrink Small Outline Plastic Packages (SSOP) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Inter- lead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen- sion at maximum material condition. 10. Controlling dimension: MILLIMETE R. Converted inch dimensions are not necessarily exact. INDEX AREA E D N 123 -B- 0.25(0.010) C AM BS e -A- L B M -C- A SEATING PLANE 0.10(0.004) C H µ 0.25(0.010) BM M α 0.25 0.010 GAUGE PLANE M24.209 (JEDEC MO-150-AG ISSUE B)

24 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE

A - 0.078 - 2.00 - A2 0.065 0.072 1.65 1.85 - B 0.009 0.014 0.22 0.38 9 C 0.004 0.009 0.09 0.25 - D 0.312 0.334 7.90 8.50 3 E 0.197 0.220 5.00 5.60 4 e 0.026 BSC 0.65 BSC - H 0.292 0.322 7.40 8.20 - L 0.022 0.037 0.55 0.95 6 N2 4 2 4 7 α 0o 8o 0o 8o - Rev. 1 3/95

20 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETE R. Converted inch dimensions are not necessarily exact. INDEX AREA E D N 123 -B- 0.25(0.010) C AM BS e -A- L B M -C- A SEATING PLANE 0.10(0.004) h x 45o C H µ 0.25(0.010) BM M α M24.3 (JEDEC MS-013-AD ISSUE C)

24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE

A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.020 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.5985 0.6141 15.20 15.60 3 E 0.2914 0.2992 7.40 7.60 4 e 0.05 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N2 4 2 4 7 α 0o 8o 0o 8o - Rev. 0 12/93

21 FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Shrink Small Outline Plastic Packages (SSOP) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional . If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETE R. Converted inch dimensions are not necessarily exact. INDEX AREA E D N 123 -B- 0.25(0.010) C AM BS e -A- L B M -C- A SEATING PLANE 0.10(0.004) C H 0.25(0.010) BM M α 0.25 0.010 GAUGE PLANE M28.209 (JEDEC MO-150-AH ISSUE B)

28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE

A - 0.078 - 2.00 - A2 0.065 0.072 1.65 1.85 - B 0.009 0.014 0.22 0.38 9 C 0.004 0.009 0.09 0.25 - D 0.390 0.413 9.90 10.50 3 E 0.197 0.220 5.00 5.60 4 e 0.026 BSC 0.65 BSC - H 0.292 0.322 7.40 8.20 - L 0.022 0.037 0.55 0.95 6 N2 8 2 8 7 α 0° 8° 0° 8° - Rev. 2 6/05

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnishe d by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN4315.16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M -1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. In- terlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional . If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimen- sions are not necessarily exact. INDEX AREA E D N 123 -B- 0.25(0.010) C AM BS e -A- L B M -C- A SEATING PLANE 0.10(0.004) h x 45o C H µ 0.25(0.010) BM M α M28.3 (JEDEC MS-013-AE ISSUE C)

28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE

A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.6969 0.7125 17.70 18.10 3 E 0.2914 0.2992 7.40 7.60 4 e 0.05 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.01 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N2 8 2 8 7 α 0o 8o 0o 8o - Rev. 0 12/93

Summary

짹15kV, ESD-Protected, +5V Powered, RS-232 Transmitters/Receivers

Description